mirror of https://gitee.com/openkylin/linux.git
ARM: davinci: cp-intc: remove cp_intc.h
There's no need to have a local header for cp-intc. Move the only declaration for a public function to common.h. Move all register offsets into the driver source file and drop all unused defines. Make cp_intc_of_init() static. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This commit is contained in:
parent
0145beed9d
commit
ed4d189b7c
|
@ -39,7 +39,6 @@
|
|||
#include <mach/mux.h>
|
||||
#include <mach/da8xx.h>
|
||||
|
||||
#include "cp_intc.h"
|
||||
#include "irqs.h"
|
||||
|
||||
#define DA830_EVM_PHY_ID ""
|
||||
|
|
|
@ -46,7 +46,6 @@
|
|||
#include <mach/da8xx.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#include "cp_intc.h"
|
||||
#include "irqs.h"
|
||||
#include "sram.h"
|
||||
|
||||
|
|
|
@ -29,7 +29,6 @@
|
|||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <mach/common.h>
|
||||
#include "cp_intc.h"
|
||||
#include <mach/da8xx.h>
|
||||
#include <linux/platform_data/mtd-davinci.h>
|
||||
#include <linux/platform_data/mtd-davinci-aemif.h>
|
||||
|
|
|
@ -27,7 +27,6 @@
|
|||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <mach/common.h>
|
||||
#include "cp_intc.h"
|
||||
#include <mach/da8xx.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
|
|
|
@ -21,7 +21,22 @@
|
|||
|
||||
#include <asm/exception.h>
|
||||
#include <mach/common.h>
|
||||
#include "cp_intc.h"
|
||||
|
||||
#define CP_INTC_CTRL 0x04
|
||||
#define CP_INTC_HOST_CTRL 0x0C
|
||||
#define CP_INTC_GLOBAL_ENABLE 0x10
|
||||
#define CP_INTC_SYS_STAT_IDX_CLR 0x24
|
||||
#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
|
||||
#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
|
||||
#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
|
||||
#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
|
||||
#define CP_INTC_PRIO_IDX 0x80
|
||||
#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
|
||||
#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
|
||||
#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
|
||||
#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
|
||||
#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
|
||||
#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
|
||||
|
||||
#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
|
||||
#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
|
||||
|
@ -141,7 +156,8 @@ static const struct irq_domain_ops cp_intc_host_ops = {
|
|||
.xlate = irq_domain_xlate_onetwocell,
|
||||
};
|
||||
|
||||
int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
|
||||
static int __init cp_intc_of_init(struct device_node *node,
|
||||
struct device_node *parent)
|
||||
{
|
||||
u32 num_irq = davinci_soc_info.intc_irq_num;
|
||||
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
|
||||
|
|
|
@ -1,57 +0,0 @@
|
|||
/*
|
||||
* TI Common Platform Interrupt Controller (cp_intc) definitions
|
||||
*
|
||||
* Author: Steve Chen <schen@mvista.com>
|
||||
* Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
#ifndef __ASM_HARDWARE_CP_INTC_H
|
||||
#define __ASM_HARDWARE_CP_INTC_H
|
||||
|
||||
#define CP_INTC_REV 0x00
|
||||
#define CP_INTC_CTRL 0x04
|
||||
#define CP_INTC_HOST_CTRL 0x0C
|
||||
#define CP_INTC_GLOBAL_ENABLE 0x10
|
||||
#define CP_INTC_GLOBAL_NESTING_LEVEL 0x1C
|
||||
#define CP_INTC_SYS_STAT_IDX_SET 0x20
|
||||
#define CP_INTC_SYS_STAT_IDX_CLR 0x24
|
||||
#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
|
||||
#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
|
||||
#define CP_INTC_GLOBAL_WAKEUP_ENABLE 0x30
|
||||
#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
|
||||
#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
|
||||
#define CP_INTC_PACING_PRESCALE 0x40
|
||||
#define CP_INTC_VECTOR_BASE 0x50
|
||||
#define CP_INTC_VECTOR_SIZE 0x54
|
||||
#define CP_INTC_VECTOR_NULL 0x58
|
||||
#define CP_INTC_PRIO_IDX 0x80
|
||||
#define CP_INTC_PRIO_VECTOR 0x84
|
||||
#define CP_INTC_SECURE_ENABLE 0x90
|
||||
#define CP_INTC_SECURE_PRIO_IDX 0x94
|
||||
#define CP_INTC_PACING_PARAM(n) (0x0100 + (n << 4))
|
||||
#define CP_INTC_PACING_DEC(n) (0x0104 + (n << 4))
|
||||
#define CP_INTC_PACING_MAP(n) (0x0108 + (n << 4))
|
||||
#define CP_INTC_SYS_RAW_STAT(n) (0x0200 + (n << 2))
|
||||
#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
|
||||
#define CP_INTC_SYS_ENABLE_SET(n) (0x0300 + (n << 2))
|
||||
#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
|
||||
#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
|
||||
#define CP_INTC_HOST_MAP(n) (0x0800 + (n << 2))
|
||||
#define CP_INTC_HOST_PRIO_IDX(n) (0x0900 + (n << 2))
|
||||
#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
|
||||
#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
|
||||
#define CP_INTC_WAKEUP_ENABLE(n) (0x0E00 + (n << 2))
|
||||
#define CP_INTC_DEBUG_SELECT(n) (0x0F00 + (n << 2))
|
||||
#define CP_INTC_SYS_SECURE_ENABLE(n) (0x1000 + (n << 2))
|
||||
#define CP_INTC_HOST_NESTING_LEVEL(n) (0x1100 + (n << 2))
|
||||
#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
|
||||
#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
|
||||
#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
|
||||
|
||||
void cp_intc_init(void);
|
||||
int cp_intc_of_init(struct device_node *, struct device_node *);
|
||||
|
||||
#endif /* __ASM_HARDWARE_CP_INTC_H */
|
|
@ -22,6 +22,7 @@
|
|||
#define DAVINCI_INTC_START NR_IRQS
|
||||
#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
|
||||
|
||||
void cp_intc_init(void);
|
||||
void davinci_timer_init(struct clk *clk);
|
||||
|
||||
struct davinci_timer_instance {
|
||||
|
|
Loading…
Reference in New Issue