mirror of https://gitee.com/openkylin/linux.git
ARM: OMAP2+: Move most of plat/io.h into local iomap.h
There's no need to have these defines in plat/io.h. Note that we now need to ifdef omap_read/write calls as they will be available for omap1 only. While at it, clean up the includes to group them like they typically are grouped. Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren
parent
2e3ee9f45b
commit
ee0839c22c
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@ -19,6 +19,7 @@
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#include <plat/clkdev_omap.h>
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#include "iomap.h"
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#include "clock.h"
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#include "clock2xxx.h"
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#include "opp2xxx.h"
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@ -23,6 +23,7 @@
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#include <plat/clock.h>
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#include "iomap.h"
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#include "clock.h"
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#include "clock2xxx.h"
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#include "cm2xxx_3xxx.h"
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@ -19,6 +19,7 @@
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#include <plat/clkdev_omap.h>
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#include "iomap.h"
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#include "clock.h"
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#include "clock2xxx.h"
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#include "opp2xxx.h"
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@ -20,14 +20,15 @@
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#include <linux/clk.h>
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#include <linux/list.h>
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#include <plat/hardware.h>
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#include <plat/clkdev_omap.h>
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#include "iomap.h"
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#include "clock.h"
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#include "clock3xxx.h"
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#include "clock34xx.h"
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#include "clock36xx.h"
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#include "clock3517.h"
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#include "cm2xxx_3xxx.h"
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#include "cm-regbits-34xx.h"
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#include "prm2xxx_3xxx.h"
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@ -26,8 +26,11 @@
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/clk.h>
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#include <plat/hardware.h>
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#include <plat/clkdev_omap.h>
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#include "iomap.h"
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#include "clock.h"
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#include "clock44xx.h"
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#include "cm1_44xx.h"
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@ -18,8 +18,8 @@
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#include <linux/err.h>
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#include <linux/io.h>
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#include "iomap.h"
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#include "common.h"
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#include "cm.h"
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#include "cm2xxx_3xxx.h"
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#include "cm-regbits-24xx.h"
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@ -18,8 +18,8 @@
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#include <linux/err.h>
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#include <linux/io.h>
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#include "iomap.h"
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#include "common.h"
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#include "cm.h"
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#include "cm1_44xx.h"
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#include "cm2_44xx.h"
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@ -20,8 +20,8 @@
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#include <linux/err.h>
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#include <linux/io.h>
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#include "iomap.h"
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#include "common.h"
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#include "cm.h"
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#include "cm1_44xx.h"
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#include "cm2_44xx.h"
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@ -17,12 +17,12 @@
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#include <linux/clk.h>
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#include <linux/io.h>
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#include "common.h"
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#include <plat/board.h>
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#include <plat/mux.h>
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#include <plat/clock.h>
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#include "iomap.h"
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#include "common.h"
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#include "sdrc.h"
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#include "control.h"
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@ -15,9 +15,10 @@
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "common.h"
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#include <plat/sdrc.h>
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#include "iomap.h"
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#include "common.h"
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#include "cm-regbits-34xx.h"
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#include "prm-regbits-34xx.h"
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#include "prm2xxx_3xxx.h"
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@ -16,7 +16,6 @@
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#ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H
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#define __ARCH_ARM_MACH_OMAP2_CONTROL_H
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#include <mach/io.h>
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#include <mach/ctrl_module_core_44xx.h>
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#include <mach/ctrl_module_wkup_44xx.h>
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#include <mach/ctrl_module_pad_core_44xx.h>
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@ -24,7 +24,7 @@
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#include <asm/mach/map.h>
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#include <asm/pmu.h>
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#include <plat/tc.h>
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#include "iomap.h"
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#include <plat/board.h>
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#include <plat/mcbsp.h>
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#include <plat/mmc.h>
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@ -30,6 +30,7 @@
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#include <plat/omap-pm.h>
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#include "common.h"
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#include "iomap.h"
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#include "mux.h"
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#include "control.h"
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#include "display.h"
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@ -21,6 +21,8 @@
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#include <linux/clk.h>
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#include <linux/err.h>
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#include "iomap.h"
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Alexander Shishkin");
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@ -24,27 +24,24 @@
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#include <linux/omapfb.h>
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#include <asm/tlb.h>
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#include <asm/mach/map.h>
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#include <plat/sram.h>
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#include <plat/sdrc.h>
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#include <plat/serial.h>
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#include <plat/omap-pm.h>
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#include <plat/omap_hwmod.h>
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#include <plat/multi.h>
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#include "iomap.h"
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#include "voltage.h"
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#include "powerdomain.h"
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#include "clockdomain.h"
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#include "common.h"
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#include "clock2xxx.h"
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#include "clock3xxx.h"
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#include "clock44xx.h"
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#include "common.h"
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#include <plat/omap-pm.h>
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#include "voltage.h"
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#include "powerdomain.h"
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#include "clockdomain.h"
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#include <plat/omap_hwmod.h>
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#include <plat/multi.h>
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#include "common.h"
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/*
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* The machine specific code may provide the extra mapping besides the
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* default mapping provided here.
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@ -0,0 +1,203 @@
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/*
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* IO mappings for OMAP2+
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifdef __ASSEMBLER__
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#define IOMEM(x) (x)
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#else
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#define IOMEM(x) ((void __force __iomem *)(x))
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#endif
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#define OMAP2_L3_IO_OFFSET 0x90000000
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#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
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#define OMAP2_L4_IO_OFFSET 0xb2000000
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#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
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#define OMAP4_L3_IO_OFFSET 0xb4000000
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#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
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#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
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#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
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#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
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#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
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#define OMAP4_GPMC_IO_OFFSET 0xa9000000
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#define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
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#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
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#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
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/*
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* ----------------------------------------------------------------------------
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* Omap2 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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/* We map both L3 and L4 on OMAP2 */
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#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
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#define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
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#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
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#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
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#define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
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#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
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#define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_WK_243X_SIZE SZ_1M
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#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
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#define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
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/* 0x6e000000 --> 0xfe000000 */
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#define OMAP243X_GPMC_SIZE SZ_1M
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#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
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/* 0x6D000000 --> 0xfd000000 */
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#define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP243X_SDRC_SIZE SZ_1M
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#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
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/* 0x6c000000 --> 0xfc000000 */
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#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP243X_SMS_SIZE SZ_1M
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/* 2420 IVA */
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#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
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/* 0x58000000 --> 0xfc100000 */
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#define DSP_MEM_2420_VIRT 0xfc100000
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#define DSP_MEM_2420_SIZE 0x28000
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#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
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/* 0x59000000 --> 0xfc128000 */
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#define DSP_IPI_2420_VIRT 0xfc128000
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#define DSP_IPI_2420_SIZE SZ_4K
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#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
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/* 0x5a000000 --> 0xfc129000 */
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#define DSP_MMU_2420_VIRT 0xfc129000
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#define DSP_MMU_2420_SIZE SZ_4K
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/* 2430 IVA2.1 - currently unmapped */
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/*
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* ----------------------------------------------------------------------------
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* Omap3 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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/* We map both L3 and L4 on OMAP3 */
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#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
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#define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
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#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
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#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
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#define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
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/*
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* ----------------------------------------------------------------------------
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* AM33XX specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
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#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
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#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
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/*
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* Need to look at the Size 4M for L4.
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* VPOM3430 was not working for Int controller
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*/
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#define L4_PER_34XX_PHYS L4_PER_34XX_BASE
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/* 0x49000000 --> 0xfb000000 */
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#define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_PER_34XX_SIZE SZ_1M
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#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
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/* 0x54000000 --> 0xfe800000 */
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#define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
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#define L4_EMU_34XX_SIZE SZ_8M
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#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
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/* 0x6e000000 --> 0xfe000000 */
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#define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP34XX_GPMC_SIZE SZ_1M
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#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
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/* 0x6c000000 --> 0xfc000000 */
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#define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP343X_SMS_SIZE SZ_1M
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#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
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/* 0x6D000000 --> 0xfd000000 */
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#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP343X_SDRC_SIZE SZ_1M
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/* 3430 IVA - currently unmapped */
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/*
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* ----------------------------------------------------------------------------
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* Omap4 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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/* We map both L3 and L4 on OMAP4 */
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#define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
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#define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
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#define L3_44XX_SIZE SZ_1M
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#define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
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#define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_44XX_SIZE SZ_4M
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#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
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/* 0x48000000 --> 0xfa000000 */
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#define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_PER_44XX_SIZE SZ_4M
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#define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE
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/* 0x49000000 --> 0xfb000000 */
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#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_ABE_44XX_SIZE SZ_1M
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#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
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/* 0x54000000 --> 0xfe800000 */
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#define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
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#define L4_EMU_44XX_SIZE SZ_8M
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#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
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/* 0x50000000 --> 0xf9000000 */
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#define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
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#define OMAP44XX_GPMC_SIZE SZ_1M
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#define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
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/* 0x4c000000 --> 0xfd100000 */
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#define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
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#define OMAP44XX_EMIF1_SIZE SZ_1M
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#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
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/* 0x4d000000 --> 0xfd200000 */
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#define OMAP44XX_EMIF2_SIZE SZ_1M
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#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
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#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
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/* 0x4e000000 --> 0xfd300000 */
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#define OMAP44XX_DMM_SIZE SZ_1M
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#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
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@ -14,10 +14,13 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <asm/exception.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "iomap.h"
|
||||
|
||||
/* selected INTC register offsets */
|
||||
|
||||
|
|
|
|||
|
|
@ -23,11 +23,12 @@
|
|||
#include <asm/cacheflush.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
#include <asm/smp_scu.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/omap-secure.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "common.h"
|
||||
|
||||
#include "clockdomain.h"
|
||||
|
||||
/* SCU base address */
|
||||
|
|
|
|||
|
|
@ -35,12 +35,14 @@
|
|||
#include <asm/mach/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/sram.h>
|
||||
#include <plat/dma.h>
|
||||
#include <plat/board.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "common.h"
|
||||
#include "prm2xxx_3xxx.h"
|
||||
#include "prm-regbits-24xx.h"
|
||||
|
|
@ -49,7 +51,6 @@
|
|||
#include "sdrc.h"
|
||||
#include "pm.h"
|
||||
#include "control.h"
|
||||
|
||||
#include "powerdomain.h"
|
||||
#include "clockdomain.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -15,8 +15,8 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "common.h"
|
||||
|
||||
#include "prcm_mpu44xx.h"
|
||||
#include "cm-regbits-44xx.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -17,10 +17,11 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "common.h"
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/prcm.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "common.h"
|
||||
#include "vp.h"
|
||||
#include "prm44xx.h"
|
||||
#include "prm-regbits-44xx.h"
|
||||
|
|
|
|||
|
|
@ -16,8 +16,8 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "common.h"
|
||||
|
||||
#include "prm44xx.h"
|
||||
#include "prminst44xx.h"
|
||||
#include "prm-regbits-44xx.h"
|
||||
|
|
|
|||
|
|
@ -17,7 +17,6 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <plat/io.h>
|
||||
#include "common.h"
|
||||
#include <plat/clock.h>
|
||||
#include <plat/sdrc.h>
|
||||
|
|
|
|||
|
|
@ -24,13 +24,14 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "common.h"
|
||||
#include <plat/clock.h>
|
||||
#include <plat/sram.h>
|
||||
#include <plat/sdrc.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "common.h"
|
||||
#include "prm2xxx_3xxx.h"
|
||||
#include "clock.h"
|
||||
#include <plat/sdrc.h>
|
||||
#include "sdrc.h"
|
||||
|
||||
/* Memory timing, DLL mode flags */
|
||||
|
|
|
|||
|
|
@ -27,7 +27,6 @@
|
|||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
#include <mach/io.h>
|
||||
|
||||
#include <plat/omap24xx.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -23,10 +23,12 @@
|
|||
* MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
#include <plat/sram.h>
|
||||
#include <mach/io.h>
|
||||
|
||||
#include <asm/assembler.h>
|
||||
|
||||
#include <plat/sram.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "cm2xxx_3xxx.h"
|
||||
#include "prm2xxx_3xxx.h"
|
||||
#include "sdrc.h"
|
||||
|
|
|
|||
|
|
@ -29,10 +29,12 @@
|
|||
* These crashes may be intermittent.
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#include <asm/assembler.h>
|
||||
#include <mach/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "prm2xxx_3xxx.h"
|
||||
#include "cm2xxx_3xxx.h"
|
||||
#include "sdrc.h"
|
||||
|
|
|
|||
|
|
@ -29,10 +29,12 @@
|
|||
* These crashes may be intermittent.
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#include <asm/assembler.h>
|
||||
#include <mach/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "prm2xxx_3xxx.h"
|
||||
#include "cm2xxx_3xxx.h"
|
||||
#include "sdrc.h"
|
||||
|
|
|
|||
|
|
@ -26,11 +26,12 @@
|
|||
* MA 02111-1307 USA
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#include <asm/assembler.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <mach/io.h>
|
||||
|
||||
#include "iomap.h"
|
||||
#include "sdrc.h"
|
||||
#include "cm2xxx_3xxx.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -60,180 +60,6 @@
|
|||
#define IOMEM(x) ((void __force __iomem *)(x))
|
||||
#endif
|
||||
|
||||
#define OMAP2_L3_IO_OFFSET 0x90000000
|
||||
#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
|
||||
|
||||
|
||||
#define OMAP2_L4_IO_OFFSET 0xb2000000
|
||||
#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
|
||||
|
||||
#define OMAP4_L3_IO_OFFSET 0xb4000000
|
||||
#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
|
||||
|
||||
#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
|
||||
#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
|
||||
|
||||
#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
|
||||
#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
|
||||
|
||||
#define OMAP4_GPMC_IO_OFFSET 0xa9000000
|
||||
#define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
|
||||
|
||||
#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
|
||||
#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* Omap2 specific IO mapping
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* We map both L3 and L4 on OMAP2 */
|
||||
#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
|
||||
#define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
|
||||
#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
|
||||
#define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
|
||||
#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
|
||||
|
||||
#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
|
||||
#define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
|
||||
#define L4_WK_243X_SIZE SZ_1M
|
||||
#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
|
||||
#define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
/* 0x6e000000 --> 0xfe000000 */
|
||||
#define OMAP243X_GPMC_SIZE SZ_1M
|
||||
#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
|
||||
/* 0x6D000000 --> 0xfd000000 */
|
||||
#define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
#define OMAP243X_SDRC_SIZE SZ_1M
|
||||
#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
|
||||
/* 0x6c000000 --> 0xfc000000 */
|
||||
#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
#define OMAP243X_SMS_SIZE SZ_1M
|
||||
|
||||
/* 2420 IVA */
|
||||
#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
|
||||
/* 0x58000000 --> 0xfc100000 */
|
||||
#define DSP_MEM_2420_VIRT 0xfc100000
|
||||
#define DSP_MEM_2420_SIZE 0x28000
|
||||
#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
|
||||
/* 0x59000000 --> 0xfc128000 */
|
||||
#define DSP_IPI_2420_VIRT 0xfc128000
|
||||
#define DSP_IPI_2420_SIZE SZ_4K
|
||||
#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
|
||||
/* 0x5a000000 --> 0xfc129000 */
|
||||
#define DSP_MMU_2420_VIRT 0xfc129000
|
||||
#define DSP_MMU_2420_SIZE SZ_4K
|
||||
|
||||
/* 2430 IVA2.1 - currently unmapped */
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* Omap3 specific IO mapping
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* We map both L3 and L4 on OMAP3 */
|
||||
#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
|
||||
#define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
|
||||
|
||||
#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
|
||||
#define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
|
||||
#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* AM33XX specific IO mapping
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
|
||||
#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
|
||||
#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
|
||||
|
||||
/*
|
||||
* Need to look at the Size 4M for L4.
|
||||
* VPOM3430 was not working for Int controller
|
||||
*/
|
||||
|
||||
#define L4_PER_34XX_PHYS L4_PER_34XX_BASE
|
||||
/* 0x49000000 --> 0xfb000000 */
|
||||
#define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
|
||||
#define L4_PER_34XX_SIZE SZ_1M
|
||||
|
||||
#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
|
||||
/* 0x54000000 --> 0xfe800000 */
|
||||
#define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
|
||||
#define L4_EMU_34XX_SIZE SZ_8M
|
||||
|
||||
#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
|
||||
/* 0x6e000000 --> 0xfe000000 */
|
||||
#define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
#define OMAP34XX_GPMC_SIZE SZ_1M
|
||||
|
||||
#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
|
||||
/* 0x6c000000 --> 0xfc000000 */
|
||||
#define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
#define OMAP343X_SMS_SIZE SZ_1M
|
||||
|
||||
#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
|
||||
/* 0x6D000000 --> 0xfd000000 */
|
||||
#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
|
||||
#define OMAP343X_SDRC_SIZE SZ_1M
|
||||
|
||||
/* 3430 IVA - currently unmapped */
|
||||
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* Omap4 specific IO mapping
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* We map both L3 and L4 on OMAP4 */
|
||||
#define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
|
||||
#define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
|
||||
#define L3_44XX_SIZE SZ_1M
|
||||
|
||||
#define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
|
||||
#define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
|
||||
#define L4_44XX_SIZE SZ_4M
|
||||
|
||||
#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
|
||||
/* 0x48000000 --> 0xfa000000 */
|
||||
#define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
|
||||
#define L4_PER_44XX_SIZE SZ_4M
|
||||
|
||||
#define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE
|
||||
/* 0x49000000 --> 0xfb000000 */
|
||||
#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
|
||||
#define L4_ABE_44XX_SIZE SZ_1M
|
||||
|
||||
#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
|
||||
/* 0x54000000 --> 0xfe800000 */
|
||||
#define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
|
||||
#define L4_EMU_44XX_SIZE SZ_8M
|
||||
|
||||
#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
|
||||
/* 0x50000000 --> 0xf9000000 */
|
||||
#define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
|
||||
#define OMAP44XX_GPMC_SIZE SZ_1M
|
||||
|
||||
|
||||
#define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
|
||||
/* 0x4c000000 --> 0xfd100000 */
|
||||
#define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
|
||||
#define OMAP44XX_EMIF1_SIZE SZ_1M
|
||||
|
||||
#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
|
||||
/* 0x4d000000 --> 0xfd200000 */
|
||||
#define OMAP44XX_EMIF2_SIZE SZ_1M
|
||||
#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
|
||||
|
||||
#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
|
||||
/* 0x4e000000 --> 0xfd300000 */
|
||||
#define OMAP44XX_DMM_SIZE SZ_1M
|
||||
#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
|
||||
/*
|
||||
* ----------------------------------------------------------------------------
|
||||
* Omap specific register access
|
||||
|
|
|
|||
|
|
@ -89,7 +89,8 @@
|
|||
* from NOR flash (using external chipselect 3) rather than mask ROM,
|
||||
* which uses BM to interchange the physical CS0 and CS3 addresses.
|
||||
*/
|
||||
static inline u32 omap_cs0_phys(void)
|
||||
#ifdef CONFIG_ARCH_OMAP1
|
||||
static inline u32 omap_cs0m_phys(void)
|
||||
{
|
||||
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
|
||||
? OMAP_CS3_PHYS : 0;
|
||||
|
|
@ -100,6 +101,7 @@ static inline u32 omap_cs3_phys(void)
|
|||
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
|
||||
? 0 : OMAP_CS3_PHYS;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
|
||||
|
|
|
|||
|
|
@ -31,11 +31,10 @@
|
|||
|
||||
#include "sram.h"
|
||||
|
||||
/* XXX These "sideways" includes are a sign that something is wrong */
|
||||
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
|
||||
# include "../mach-omap2/prm2xxx_3xxx.h"
|
||||
# include "../mach-omap2/sdrc.h"
|
||||
#endif
|
||||
/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
|
||||
#include "../mach-omap2/iomap.h"
|
||||
#include "../mach-omap2/prm2xxx_3xxx.h"
|
||||
#include "../mach-omap2/sdrc.h"
|
||||
|
||||
#define OMAP1_SRAM_PA 0x20000000
|
||||
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
|
||||
|
|
|
|||
Loading…
Reference in New Issue