openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

drm/amd/powerplay: add common interface in smumgr to help to visit fw image. 

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2016-08-08 13:44:59 +08:00 committed by Alex Deucher
parent 6a99a964f6
commit ee1a51f882
2 changed files with 169 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

69
drivers/gpu/drm/amd/powerplay/inc/smumgr.h
View File

@ -28,6 +28,7 @@
struct pp_smumgr;
struct pp_instance;
struct pp_hwmgr;
#define smu_lower_32_bits(n) ((uint32_t)(n))
#define smu_upper_32_bits(n) ((uint32_t)(((n)>>16)>>16))
@ -53,6 +54,44 @@ enum AVFS_BTC_STATUS {
AVFS_BTC_SMUMSG_ERROR
};
enum SMU_TABLE {
SMU_UVD_TABLE = 0,
SMU_VCE_TABLE,
SMU_SAMU_TABLE,
SMU_BIF_TABLE,
};
enum SMU_TYPE {
SMU_SoftRegisters = 0,
SMU_Discrete_DpmTable,
};
enum SMU_MEMBER {
HandshakeDisables = 0,
VoltageChangeTimeout,
AverageGraphicsActivity,
PreVBlankGap,
VBlankTimeout,
UvdBootLevel,
VceBootLevel,
SamuBootLevel,
LowSclkInterruptThreshold,
};
enum SMU_MAC_DEFINITION {
SMU_MAX_LEVELS_GRAPHICS = 0,
SMU_MAX_LEVELS_MEMORY,
SMU_MAX_LEVELS_LINK,
SMU_MAX_ENTRIES_SMIO,
SMU_MAX_LEVELS_VDDC,
SMU_MAX_LEVELS_VDDGFX,
SMU_MAX_LEVELS_VDDCI,
SMU_MAX_LEVELS_MVDD,
SMU_UVD_MCLK_HANDSHAKE_DISABLE,
};
struct pp_smumgr_func {
int (*smu_init)(struct pp_smumgr *smumgr);
int (*smu_fini)(struct pp_smumgr *smumgr);
@ -69,6 +108,18 @@ struct pp_smumgr_func {
int (*download_pptable_settings)(struct pp_smumgr *smumgr,
void **table);
int (*upload_pptable_settings)(struct pp_smumgr *smumgr);
int (*update_smc_table)(struct pp_hwmgr *hwmgr, uint32_t type);
int (*process_firmware_header)(struct pp_hwmgr *hwmgr);
int (*update_sclk_threshold)(struct pp_hwmgr *hwmgr);
int (*thermal_setup_fan_table)(struct pp_hwmgr *hwmgr);
int (*thermal_avfs_enable)(struct pp_hwmgr *hwmgr);
int (*init_smc_table)(struct pp_hwmgr *hwmgr);
int (*populate_all_graphic_levels)(struct pp_hwmgr *hwmgr);
int (*populate_all_memory_levels)(struct pp_hwmgr *hwmgr);
int (*initialize_mc_reg_table)(struct pp_hwmgr *hwmgr);
uint32_t (*get_offsetof)(uint32_t type, uint32_t member);
uint32_t (*get_mac_definition)(uint32_t value);
bool (*is_dpm_running)(struct pp_hwmgr *hwmgr);
};
struct pp_smumgr {
@ -127,6 +178,24 @@ extern int tonga_smum_init(struct pp_smumgr *smumgr);
extern int fiji_smum_init(struct pp_smumgr *smumgr);
extern int polaris10_smum_init(struct pp_smumgr *smumgr);
extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
extern int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
extern int smum_process_firmware_header(struct pp_hwmgr *hwmgr);
extern int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr,
void *input, void *output, void *storage, int result);
extern int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr,
void *input, void *output, void *storage, int result);
extern int smum_init_smc_table(struct pp_hwmgr *hwmgr);
extern int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
extern int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
extern int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
extern uint32_t smum_get_offsetof(struct pp_smumgr *smumgr,
uint32_t type, uint32_t member);
extern uint32_t smum_get_mac_definition(struct pp_smumgr *smumgr, uint32_t value);
extern bool smum_is_dpm_running(struct pp_hwmgr *hwmgr);
#define SMUM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
#define SMUM_FIELD_MASK(reg, field) reg##__##field##_MASK

101
drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
View File

@ -86,6 +86,57 @@ int smum_fini(struct pp_smumgr *smumgr)
return 0;
}
int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr,
void *input, void *output, void *storage, int result)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->thermal_avfs_enable)
return hwmgr->smumgr->smumgr_funcs->thermal_avfs_enable(hwmgr);
return 0;
}
int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr,
void *input, void *output, void *storage, int result)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->thermal_setup_fan_table)
return hwmgr->smumgr->smumgr_funcs->thermal_setup_fan_table(hwmgr);
return 0;
}
int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->update_sclk_threshold)
return hwmgr->smumgr->smumgr_funcs->update_sclk_threshold(hwmgr);
return 0;
}
int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->update_smc_table)
return hwmgr->smumgr->smumgr_funcs->update_smc_table(hwmgr, type);
return 0;
}
uint32_t smum_get_offsetof(struct pp_smumgr *smumgr, uint32_t type, uint32_t member)
{
if (NULL != smumgr->smumgr_funcs->get_offsetof)
return smumgr->smumgr_funcs->get_offsetof(type, member);
return 0;
}
int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->process_firmware_header)
return hwmgr->smumgr->smumgr_funcs->process_firmware_header(hwmgr);
return 0;
}
int smum_get_argument(struct pp_smumgr *smumgr)
{
if (NULL != smumgr->smumgr_funcs->get_argument)
@ -94,13 +145,20 @@ int smum_get_argument(struct pp_smumgr *smumgr)
return 0;
}
uint32_t smum_get_mac_definition(struct pp_smumgr *smumgr, uint32_t value)
{
if (NULL != smumgr->smumgr_funcs->get_mac_definition)
return smumgr->smumgr_funcs->get_mac_definition(value);
return 0;
}
int smum_download_powerplay_table(struct pp_smumgr *smumgr,
void **table)
{
if (NULL != smumgr->smumgr_funcs->download_pptable_settings)
return smumgr->smumgr_funcs->download_pptable_settings(smumgr,
table);
return 0;
}
@ -267,3 +325,44 @@ int smu_free_memory(void *device, void *handle)
return 0;
}
int smum_init_smc_table(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->init_smc_table)
return hwmgr->smumgr->smumgr_funcs->init_smc_table(hwmgr);
return 0;
}
int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->populate_all_graphic_levels)
return hwmgr->smumgr->smumgr_funcs->populate_all_graphic_levels(hwmgr);
return 0;
}
int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->populate_all_memory_levels)
return hwmgr->smumgr->smumgr_funcs->populate_all_memory_levels(hwmgr);
return 0;
}
/*this interface is needed by island ci/vi */
int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->initialize_mc_reg_table)
return hwmgr->smumgr->smumgr_funcs->initialize_mc_reg_table(hwmgr);
return 0;
}
bool smum_is_dpm_running(struct pp_hwmgr *hwmgr)
{
if (NULL != hwmgr->smumgr->smumgr_funcs->is_dpm_running)
return hwmgr->smumgr->smumgr_funcs->is_dpm_running(hwmgr);
return true;
}