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dmaengine: dw: disable BLOCK IRQs for non-cyclic xfer
The commit2895b2cad6
("dmaengine: dw: fix cyclic transfer callbacks") re-enabled BLOCK interrupts with regard to make cyclic transfers work. However, this change becomes a regression for non-cyclic transfers as interrupt counters under stress test had been grown enormously (approximately per 4-5 bytes in the UART loop back test). Taking into consideration above enable BLOCK interrupts if and only if channel is programmed to perform cyclic transfer. Fixes:2895b2cad6
("dmaengine: dw: fix cyclic transfer callbacks") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mans Rullgard <mans@mansr.com> Tested-by: Mans Rullgard <mans@mansr.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: <stable@vger.kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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ee1cdcdae5
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@ -156,7 +156,6 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
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/* Enable interrupts */
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channel_set_bit(dw, MASK.XFER, dwc->mask);
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channel_set_bit(dw, MASK.BLOCK, dwc->mask);
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channel_set_bit(dw, MASK.ERROR, dwc->mask);
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dwc->initialized = true;
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@ -588,6 +587,9 @@ static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc,
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spin_unlock_irqrestore(&dwc->lock, flags);
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}
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/* Re-enable interrupts */
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channel_set_bit(dw, MASK.BLOCK, dwc->mask);
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}
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/* ------------------------------------------------------------------------- */
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@ -618,11 +620,8 @@ static void dw_dma_tasklet(unsigned long data)
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dwc_scan_descriptors(dw, dwc);
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}
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/*
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* Re-enable interrupts.
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*/
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/* Re-enable interrupts */
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channel_set_bit(dw, MASK.XFER, dw->all_chan_mask);
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channel_set_bit(dw, MASK.BLOCK, dw->all_chan_mask);
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channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask);
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}
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@ -1261,6 +1260,7 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
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int dw_dma_cyclic_start(struct dma_chan *chan)
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{
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struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
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struct dw_dma *dw = to_dw_dma(chan->device);
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unsigned long flags;
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if (!test_bit(DW_DMA_IS_CYCLIC, &dwc->flags)) {
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@ -1269,7 +1269,12 @@ int dw_dma_cyclic_start(struct dma_chan *chan)
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}
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spin_lock_irqsave(&dwc->lock, flags);
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/* Enable interrupts to perform cyclic transfer */
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channel_set_bit(dw, MASK.BLOCK, dwc->mask);
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dwc_dostart(dwc, dwc->cdesc->desc[0]);
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spin_unlock_irqrestore(&dwc->lock, flags);
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return 0;
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