mirror of https://gitee.com/openkylin/linux.git
usb: host: xhci-rcar: Use xhci_plat_priv.quirks instead of code settings
This patch uses xhci_plat_priv.quirks to simplify. The previous code had conditions to set some quirks in xhci_rcar_init_quirk(). But, the xhci_rcar_init_quirk() is called at the same conditions. So, no behavior change. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1567425698-27560-4-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -107,15 +107,6 @@ static int xhci_rcar_is_gen2(struct device *dev)
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of_device_is_compatible(node, "renesas,rcar-gen2-xhci");
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}
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static int xhci_rcar_is_gen3(struct device *dev)
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{
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struct device_node *node = dev->of_node;
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return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
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of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
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of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
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}
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void xhci_rcar_start(struct usb_hcd *hcd)
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{
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u32 temp;
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@ -226,32 +217,13 @@ static bool xhci_rcar_wait_for_pll_active(struct usb_hcd *hcd)
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/* This function needs to initialize a "phy" of usb before */
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int xhci_rcar_init_quirk(struct usb_hcd *hcd)
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{
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struct xhci_hcd *xhci = hcd_to_xhci(hcd);
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/* If hcd->regs is NULL, we don't just call the following function */
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if (!hcd->regs)
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return 0;
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/*
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* On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
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* to 1. However, these SoCs don't support 64-bit address memory
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* pointers. So, this driver clears the AC64 bit of xhci->hcc_params
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* to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
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* xhci_gen_setup().
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*
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* And, since the firmware/internal CPU control the USBSTS.STS_HALT
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* and the process speed is down when the roothub port enters U3,
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* long delay for the handshake of STS_HALT is neeed in xhci_suspend().
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*/
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if (xhci_rcar_is_gen2(hcd->self.controller) ||
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xhci_rcar_is_gen3(hcd->self.controller)) {
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xhci->quirks |= XHCI_NO_64BIT_SUPPORT | XHCI_SLOW_SUSPEND;
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}
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if (!xhci_rcar_wait_for_pll_active(hcd))
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return -ETIMEDOUT;
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xhci->quirks |= XHCI_TRUST_TX_LENGTH;
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return xhci_rcar_download_firmware(hcd);
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}
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@ -32,8 +32,22 @@ static inline int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
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}
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#endif
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/*
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* On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
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* to 1. However, these SoCs don't support 64-bit address memory
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* pointers. So, this driver clears the AC64 bit of xhci->hcc_params
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* to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
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* xhci_gen_setup() by using the XHCI_NO_64BIT_SUPPORT quirk.
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*
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* And, since the firmware/internal CPU control the USBSTS.STS_HALT
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* and the process speed is down when the roothub port enters U3,
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* long delay for the handshake of STS_HALT is neeed in xhci_suspend()
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* by using the XHCI_SLOW_SUSPEND quirk.
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*/
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#define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware) \
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.firmware_name = firmware, \
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.quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH | \
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XHCI_SLOW_SUSPEND, \
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.init_quirk = xhci_rcar_init_quirk, \
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.plat_start = xhci_rcar_start, \
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.resume_quirk = xhci_rcar_resume_quirk,
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