mirror of https://gitee.com/openkylin/linux.git
RealView: Move the IRQ_* definitions out of the board-*.h files
The IRQ_* macros need to be made visible via the mach/irqs.h file but without the additional macros defined in the board-*.h files. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Catalin Marinas
parent
8c7e65742f
commit
ee8c957119
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@ -48,6 +48,9 @@
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#include <asm/hardware/gic.h>
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#include <mach/platform.h>
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#include <mach/irqs.h>
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#include "core.h"
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#include "clock.h"
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@ -62,111 +62,6 @@
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#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
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#endif
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#define IRQ_EB_GIC_START 32
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/*
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* RealView EB interrupt sources
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*/
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#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
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#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
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#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
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#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
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#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
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#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
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#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
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#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
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#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
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#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
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#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
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#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
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#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
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#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
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#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
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#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
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#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
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#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
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#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
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#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
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/*
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* RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
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*/
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#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
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#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
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#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
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#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
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#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
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#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
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#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
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#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
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#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
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#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
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#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
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#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
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#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
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#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
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#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
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#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
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#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
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#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
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#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
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#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
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#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
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#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
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#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
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#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
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#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
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#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
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#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
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#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
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#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
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#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
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#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
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#define IRQ_EB11MP_UART2 -1
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#define IRQ_EB11MP_UART3 -1
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#define IRQ_EB11MP_CLCD -1
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#define IRQ_EB11MP_DMA -1
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#define IRQ_EB11MP_WDOG -1
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#define IRQ_EB11MP_GPIO0 -1
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#define IRQ_EB11MP_GPIO1 -1
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#define IRQ_EB11MP_GPIO2 -1
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#define IRQ_EB11MP_SCI -1
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#define IRQ_EB11MP_SSP -1
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#define NR_GIC_EB11MP 2
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/*
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* Only define NR_IRQS if less than NR_IRQS_EB
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*/
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#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
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#if defined(CONFIG_MACH_REALVIEW_EB) \
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&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_EB
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#endif
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#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
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&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_EB11MP
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#endif
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/*
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* Core tile identification (REALVIEW_SYS_PROCID)
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*/
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@ -73,82 +73,4 @@
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#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
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#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
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/*
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* Irqs
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*/
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#define IRQ_DC1176_GIC_START 32
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#define IRQ_PB1176_GIC_START 64
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/*
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* ARM1176 DevChip interrupt sources (primary GIC)
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*/
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#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
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#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
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#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
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#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
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#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
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#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
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#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
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#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
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#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
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#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
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#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
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#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
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#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
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#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
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#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
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#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
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/*
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* RealView PB1176 interrupt sources (secondary GIC)
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*/
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#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
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#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
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#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
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#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
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#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
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#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
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#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
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#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
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#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
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#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
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#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
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#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
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#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
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#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
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#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
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#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
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#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
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#define IRQ_PB1176_GPIO0 -1
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#define IRQ_PB1176_SSP -1
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#define IRQ_PB1176_SCTL -1
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#define NR_GIC_PB1176 2
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/*
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* Only define NR_IRQS if less than NR_IRQS_PB1176
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*/
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#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
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#if defined(CONFIG_MACH_REALVIEW_PB1176)
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#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_PB1176
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#endif
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#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_PB1176
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#endif
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#endif /* CONFIG_MACH_REALVIEW_PB1176 */
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#endif /* __ASM_ARCH_BOARD_PB1176_H */
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@ -81,105 +81,4 @@
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#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
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#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
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/*
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* Irqs
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*/
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#define IRQ_TC11MP_GIC_START 32
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#define IRQ_PB11MP_GIC_START 64
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/*
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* ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
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*/
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#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
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#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
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#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
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#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
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#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
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#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
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#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
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#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
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#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
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#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
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#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
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#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
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#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
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#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
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#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
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#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
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#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
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#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
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#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
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#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
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#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
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#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
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#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
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#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
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#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
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#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
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#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
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#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
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#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
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#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
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#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
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/*
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* RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
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*/
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#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
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#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
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#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
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#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
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#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
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#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
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#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
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#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
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#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
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#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
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#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
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#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
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#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
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#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
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#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
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#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
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#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PB11MP_SMC -1
|
||||
#define IRQ_PB11MP_SCTL -1
|
||||
|
||||
#define NR_GIC_PB11MP 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PB11MP
|
||||
*/
|
||||
#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PB11MP)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PB11MP
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PB11MP
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PB11MP */
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PB11MP_H */
|
||||
|
|
|
|||
|
|
@ -70,81 +70,4 @@
|
|||
#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
|
||||
#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
|
||||
|
||||
/*
|
||||
* Irqs
|
||||
*/
|
||||
#define IRQ_PBA8_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
|
||||
#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
|
||||
#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PB-A8 on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
|
||||
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
|
||||
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
|
||||
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBA8_SMC -1
|
||||
#define IRQ_PBA8_SCTL -1
|
||||
|
||||
#define NR_GIC_PBA8 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBA8
|
||||
*/
|
||||
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBA8)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBA8
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBA8
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBA8 */
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PBA8_H */
|
||||
|
|
|
|||
|
|
@ -80,101 +80,6 @@
|
|||
#define REALVIEW_PBX_PCI_IO_SIZE 0x1000 /* 4 Kb */
|
||||
#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000 /* 512 MB */
|
||||
|
||||
/*
|
||||
* Irqs
|
||||
*/
|
||||
#define IRQ_PBX_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
|
||||
#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
|
||||
#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PB-X on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */
|
||||
#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33)
|
||||
#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34)
|
||||
#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35)
|
||||
#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36)
|
||||
#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37)
|
||||
#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38)
|
||||
#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39)
|
||||
|
||||
#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */
|
||||
#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
|
||||
/* ... */
|
||||
#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
|
||||
#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45)
|
||||
#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46)
|
||||
#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47)
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
|
||||
#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)
|
||||
#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)
|
||||
#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBX_SMC -1
|
||||
#define IRQ_PBX_SCTL -1
|
||||
|
||||
#define NR_GIC_PBX 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBX
|
||||
*/
|
||||
#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBX)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBX
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBX
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBX */
|
||||
|
||||
/*
|
||||
* Core tile identification (REALVIEW_SYS_PROCID)
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -0,0 +1,129 @@
|
|||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-eb.h
|
||||
*
|
||||
* Copyright (C) 2007 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_EB_H
|
||||
#define __MACH_IRQS_EB_H
|
||||
|
||||
#define IRQ_EB_GIC_START 32
|
||||
|
||||
/*
|
||||
* RealView EB interrupt sources
|
||||
*/
|
||||
#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
|
||||
#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
|
||||
#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
/*
|
||||
* RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
|
||||
*/
|
||||
#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
|
||||
#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
|
||||
#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
|
||||
#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
|
||||
#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
|
||||
#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
|
||||
#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
|
||||
#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
|
||||
#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
|
||||
#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
|
||||
#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
|
||||
#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
|
||||
#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
|
||||
#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
|
||||
#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
|
||||
#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
|
||||
|
||||
#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
|
||||
#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
|
||||
#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
|
||||
#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
|
||||
#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
|
||||
#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
|
||||
#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
|
||||
#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
|
||||
#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
|
||||
#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
|
||||
#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
|
||||
#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
|
||||
|
||||
#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
|
||||
#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
|
||||
#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
|
||||
|
||||
#define IRQ_EB11MP_UART2 -1
|
||||
#define IRQ_EB11MP_UART3 -1
|
||||
#define IRQ_EB11MP_CLCD -1
|
||||
#define IRQ_EB11MP_DMA -1
|
||||
#define IRQ_EB11MP_WDOG -1
|
||||
#define IRQ_EB11MP_GPIO0 -1
|
||||
#define IRQ_EB11MP_GPIO1 -1
|
||||
#define IRQ_EB11MP_GPIO2 -1
|
||||
#define IRQ_EB11MP_SCI -1
|
||||
#define IRQ_EB11MP_SSP -1
|
||||
|
||||
#define NR_GIC_EB11MP 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_EB
|
||||
*/
|
||||
#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_EB) \
|
||||
&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_EB
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
|
||||
&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_EB11MP
|
||||
#endif
|
||||
|
||||
#endif /* __MACH_IRQS_EB_H */
|
||||
|
|
@ -0,0 +1,99 @@
|
|||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pb1176.h
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PB1176_H
|
||||
#define __MACH_IRQS_PB1176_H
|
||||
|
||||
#define IRQ_DC1176_GIC_START 32
|
||||
#define IRQ_PB1176_GIC_START 64
|
||||
|
||||
/*
|
||||
* ARM1176 DevChip interrupt sources (primary GIC)
|
||||
*/
|
||||
#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
|
||||
#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
|
||||
#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
|
||||
#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
|
||||
#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
|
||||
#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
|
||||
#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
|
||||
#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
|
||||
#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
|
||||
#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
|
||||
#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
|
||||
#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
|
||||
|
||||
#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
|
||||
#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
|
||||
|
||||
/*
|
||||
* RealView PB1176 interrupt sources (secondary GIC)
|
||||
*/
|
||||
#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
|
||||
#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
|
||||
#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
|
||||
#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
|
||||
#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
|
||||
#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
|
||||
#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
|
||||
#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
|
||||
#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
|
||||
|
||||
#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
|
||||
|
||||
#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
|
||||
|
||||
#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
|
||||
#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
|
||||
#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
|
||||
|
||||
#define IRQ_PB1176_GPIO0 -1
|
||||
#define IRQ_PB1176_SSP -1
|
||||
#define IRQ_PB1176_SCTL -1
|
||||
|
||||
#define NR_GIC_PB1176 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PB1176
|
||||
*/
|
||||
#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PB1176)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PB1176
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PB1176
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PB1176 */
|
||||
|
||||
#endif /* __MACH_IRQS_PB1176_H */
|
||||
|
|
@ -0,0 +1,122 @@
|
|||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pb11mp.h
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PB11MP_H
|
||||
#define __MACH_IRQS_PB11MP_H
|
||||
|
||||
#define IRQ_TC11MP_GIC_START 32
|
||||
#define IRQ_PB11MP_GIC_START 64
|
||||
|
||||
/*
|
||||
* ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
|
||||
*/
|
||||
#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
|
||||
#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
|
||||
#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
|
||||
#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
|
||||
#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
|
||||
#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
|
||||
#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
|
||||
#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
|
||||
#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
|
||||
#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
|
||||
#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
|
||||
#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
|
||||
#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
|
||||
#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
|
||||
#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
|
||||
#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
|
||||
|
||||
#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
|
||||
#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
|
||||
#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
|
||||
#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
|
||||
#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
|
||||
#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
|
||||
#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
|
||||
#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
|
||||
#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
|
||||
#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
|
||||
#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
|
||||
#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
|
||||
|
||||
#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
|
||||
#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
|
||||
#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
|
||||
|
||||
/*
|
||||
* RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
|
||||
*/
|
||||
#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PB11MP_SMC -1
|
||||
#define IRQ_PB11MP_SCTL -1
|
||||
|
||||
#define NR_GIC_PB11MP 2
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PB11MP
|
||||
*/
|
||||
#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PB11MP)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PB11MP
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PB11MP
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PB11MP */
|
||||
|
||||
#endif /* __MACH_IRQS_PB11MP_H */
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pba8.h
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PBA8_H
|
||||
#define __MACH_IRQS_PBA8_H
|
||||
|
||||
#define IRQ_PBA8_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
|
||||
#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
|
||||
#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PB-A8 on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
|
||||
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
|
||||
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
|
||||
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBA8_SMC -1
|
||||
#define IRQ_PBA8_SCTL -1
|
||||
|
||||
#define NR_GIC_PBA8 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBA8
|
||||
*/
|
||||
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBA8)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBA8
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBA8
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBA8 */
|
||||
|
||||
#endif /* __MACH_IRQS_PBA8_H */
|
||||
|
|
@ -0,0 +1,115 @@
|
|||
/*
|
||||
* arch/arm/mach-realview/include/mach/irqs-pbx.h
|
||||
*
|
||||
* Copyright (C) 2009 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IRQS_PBX_H
|
||||
#define __MACH_IRQS_PBX_H
|
||||
|
||||
#define IRQ_PBX_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBX_L220_EVENT (IRQ_PBX_GIC_START + 29)
|
||||
#define IRQ_PBX_L220_SLAVE (IRQ_PBX_GIC_START + 30)
|
||||
#define IRQ_PBX_L220_DECODE (IRQ_PBX_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PBX on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */
|
||||
#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33)
|
||||
#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34)
|
||||
#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35)
|
||||
#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36)
|
||||
#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37)
|
||||
#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38)
|
||||
#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39)
|
||||
|
||||
#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */
|
||||
#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
|
||||
/* ... */
|
||||
#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
|
||||
#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 45)
|
||||
#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 46)
|
||||
#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 47)
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
|
||||
#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)
|
||||
#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)
|
||||
#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBX_SMC -1
|
||||
#define IRQ_PBX_SCTL -1
|
||||
|
||||
#define NR_GIC_PBX 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBX
|
||||
*/
|
||||
#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBX)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBX
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBX
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBX */
|
||||
|
||||
#endif /* __MACH_IRQS_PBX_H */
|
||||
|
|
@ -22,11 +22,11 @@
|
|||
#ifndef __ASM_ARCH_IRQS_H
|
||||
#define __ASM_ARCH_IRQS_H
|
||||
|
||||
#include <mach/board-eb.h>
|
||||
#include <mach/board-pb11mp.h>
|
||||
#include <mach/board-pb1176.h>
|
||||
#include <mach/board-pba8.h>
|
||||
#include <mach/board-pbx.h>
|
||||
#include <mach/irqs-eb.h>
|
||||
#include <mach/irqs-pb11mp.h>
|
||||
#include <mach/irqs-pb1176.h>
|
||||
#include <mach/irqs-pba8.h>
|
||||
#include <mach/irqs-pbx.h>
|
||||
|
||||
#define IRQ_LOCALTIMER 29
|
||||
#define IRQ_LOCALWDOG 30
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@
|
|||
#include <asm/irq.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/board-eb.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#include "op_counter.h"
|
||||
|
|
|
|||
Loading…
Reference in New Issue