mirror of https://gitee.com/openkylin/linux.git
Merge branch 'stericsson/cleanup' into next/timer
The timer and cleanup branches from stericsson conflict, so I'm merging them here. Conflicts: arch/arm/mach-ux500/Makefile arch/arm/mach-ux500/cpu.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
eed1e57650
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@ -4,6 +4,7 @@
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obj-y := clock.o cpu.o devices.o devices-common.o \
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id.o usb.o timer.o
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obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
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obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o dma-db5500.o
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obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
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obj-$(CONFIG_MACH_U8500) += board-mop500.o board-mop500-sdi.o \
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@ -153,7 +153,7 @@ static pin_cfg_t mop500_pins_default[] = {
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GPIO7_U1_RTSn | PIN_OUTPUT_HIGH,
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};
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static pin_cfg_t mop500_pins_hrefv60[] = {
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static pin_cfg_t hrefv60_pins[] = {
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/* WLAN */
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GPIO4_GPIO | PIN_INPUT_PULLUP,/* WLAN_IRQ */
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GPIO85_GPIO | PIN_OUTPUT_LOW,/* WLAN_ENA */
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@ -279,14 +279,26 @@ static pin_cfg_t snowball_pins[] = {
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void __init mop500_pins_init(void)
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{
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nmk_config_pins(mop500_pins_common,
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ARRAY_SIZE(mop500_pins_common));
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if (machine_is_hrefv60())
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nmk_config_pins(mop500_pins_hrefv60,
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ARRAY_SIZE(mop500_pins_hrefv60));
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else if (machine_is_snowball())
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nmk_config_pins(snowball_pins,
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ARRAY_SIZE(snowball_pins));
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else
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nmk_config_pins(mop500_pins_default,
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ARRAY_SIZE(mop500_pins_default));
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ARRAY_SIZE(mop500_pins_common));
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nmk_config_pins(mop500_pins_default,
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ARRAY_SIZE(mop500_pins_default));
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}
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void __init snowball_pins_init(void)
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{
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nmk_config_pins(mop500_pins_common,
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ARRAY_SIZE(mop500_pins_common));
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nmk_config_pins(snowball_pins,
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ARRAY_SIZE(snowball_pins));
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}
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void __init hrefv60_pins_init(void)
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{
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nmk_config_pins(mop500_pins_common,
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ARRAY_SIZE(mop500_pins_common));
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nmk_config_pins(hrefv60_pins,
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ARRAY_SIZE(hrefv60_pins));
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}
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@ -216,30 +216,48 @@ void __init mop500_sdi_init(void)
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/* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */
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if (!cpu_is_u8500v10())
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mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
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/* sdi2 on snowball is in ATL_B mode for FSMC (LAN) */
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if (!machine_is_snowball())
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db8500_add_sdi2(&mop500_sdi2_data, periphid);
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db8500_add_sdi2(&mop500_sdi2_data, periphid);
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/* On-board eMMC */
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db8500_add_sdi4(&mop500_sdi4_data, periphid);
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if (machine_is_hrefv60() || machine_is_snowball()) {
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if (machine_is_hrefv60()) {
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mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
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sdi0_en = HREFV60_SDMMC_EN_GPIO;
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sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
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} else if (machine_is_snowball()) {
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mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
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mop500_sdi0_data.cd_invert = true;
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sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
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sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO;
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}
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sdi0_configure();
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}
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/*
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* On boards with the TC35892 GPIO expander, sdi0 will finally
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* be added when the TC35892 initializes and calls
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* mop500_sdi_tc35892_init() above.
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*/
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}
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void __init snowball_sdi_init(void)
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{
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u32 periphid = 0x10480180;
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mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
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/* On-board eMMC */
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db8500_add_sdi4(&mop500_sdi4_data, periphid);
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mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
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mop500_sdi0_data.cd_invert = true;
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sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
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sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO;
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sdi0_configure();
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}
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void __init hrefv60_sdi_init(void)
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{
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u32 periphid = 0x10480180;
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mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
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db8500_add_sdi2(&mop500_sdi2_data, periphid);
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/* On-board eMMC */
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db8500_add_sdi4(&mop500_sdi4_data, periphid);
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mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
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sdi0_en = HREFV60_SDMMC_EN_GPIO;
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sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
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sdi0_configure();
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}
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@ -603,28 +603,14 @@ static void __init mop500_init_machine(void)
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{
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int i2c0_devs;
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/*
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* The HREFv60 board removed a GPIO expander and routed
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* all these GPIO pins to the internal GPIO controller
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* instead.
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*/
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if (!machine_is_snowball()) {
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if (machine_is_hrefv60())
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mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
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else
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mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
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}
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mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
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u8500_init_devices();
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mop500_pins_init();
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if (machine_is_snowball())
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platform_add_devices(snowball_platform_devs,
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ARRAY_SIZE(snowball_platform_devs));
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else
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platform_add_devices(mop500_platform_devs,
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ARRAY_SIZE(mop500_platform_devs));
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platform_add_devices(mop500_platform_devs,
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ARRAY_SIZE(mop500_platform_devs));
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mop500_i2c_init();
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mop500_sdi_init();
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@ -632,8 +618,66 @@ static void __init mop500_init_machine(void)
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mop500_uart_init();
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i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
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if (machine_is_hrefv60())
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i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
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i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
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i2c_register_board_info(2, mop500_i2c2_devices,
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ARRAY_SIZE(mop500_i2c2_devices));
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/* This board has full regulator constraints */
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regulator_has_full_constraints();
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}
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static void __init snowball_init_machine(void)
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{
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int i2c0_devs;
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u8500_init_devices();
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snowball_pins_init();
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platform_add_devices(snowball_platform_devs,
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ARRAY_SIZE(snowball_platform_devs));
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mop500_i2c_init();
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snowball_sdi_init();
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mop500_spi_init();
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mop500_uart_init();
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i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
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i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
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i2c_register_board_info(2, mop500_i2c2_devices,
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ARRAY_SIZE(mop500_i2c2_devices));
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/* This board has full regulator constraints */
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regulator_has_full_constraints();
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}
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static void __init hrefv60_init_machine(void)
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{
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int i2c0_devs;
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/*
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* The HREFv60 board removed a GPIO expander and routed
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* all these GPIO pins to the internal GPIO controller
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* instead.
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*/
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mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
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u8500_init_devices();
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hrefv60_pins_init();
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platform_add_devices(mop500_platform_devs,
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ARRAY_SIZE(mop500_platform_devs));
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mop500_i2c_init();
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mop500_sdi_init();
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mop500_spi_init();
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mop500_uart_init();
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i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
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i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
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i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
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i2c_register_board_info(2, mop500_i2c2_devices,
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@ -658,7 +702,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
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.map_io = u8500_map_io,
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.init_irq = ux500_init_irq,
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.timer = &ux500_timer,
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.init_machine = mop500_init_machine,
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.init_machine = hrefv60_init_machine,
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MACHINE_END
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MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
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@ -667,5 +711,5 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
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.init_irq = ux500_init_irq,
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/* we re-use nomadik timer here */
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.timer = &ux500_timer,
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.init_machine = mop500_init_machine,
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.init_machine = snowball_init_machine,
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MACHINE_END
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@ -40,10 +40,13 @@
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struct i2c_board_info;
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extern void mop500_sdi_init(void);
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extern void snowball_sdi_init(void);
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extern void mop500_sdi_tc35892_init(void);
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void __init mop500_u8500uib_init(void);
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void __init mop500_stuib_init(void);
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void __init mop500_pins_init(void);
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void __init hrefv60_pins_init(void);
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void __init snowball_pins_init(void);
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|
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void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
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unsigned n);
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|
|
|
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|
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@ -0,0 +1,72 @@
|
|||
/*
|
||||
* Copyright (C) ST-Ericsson SA 2011
|
||||
*
|
||||
* License terms: GNU General Public License (GPL) version 2
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
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#include <asm/cacheflush.h>
|
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#include <asm/hardware/cache-l2x0.h>
|
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#include <mach/hardware.h>
|
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#include <mach/id.h>
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|
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static void __iomem *l2x0_base;
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|
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static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
|
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{
|
||||
/* wait for the operation to complete */
|
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while (readl_relaxed(reg) & mask)
|
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cpu_relax();
|
||||
}
|
||||
|
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static inline void ux500_cache_sync(void)
|
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{
|
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writel_relaxed(0, l2x0_base + L2X0_CACHE_SYNC);
|
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ux500_cache_wait(l2x0_base + L2X0_CACHE_SYNC, 1);
|
||||
}
|
||||
|
||||
/*
|
||||
* The L2 cache cannot be turned off in the non-secure world.
|
||||
* Dummy until a secure service is in place.
|
||||
*/
|
||||
static void ux500_l2x0_disable(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* This is only called when doing a kexec, just after turning off the L2
|
||||
* and L1 cache, and it is surrounded by a spinlock in the generic version.
|
||||
* However, we're not really turning off the L2 cache right now and the
|
||||
* PL310 does not support exclusive accesses (used to implement the spinlock).
|
||||
* So, the invalidation needs to be done without the spinlock.
|
||||
*/
|
||||
static void ux500_l2x0_inv_all(void)
|
||||
{
|
||||
uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
|
||||
|
||||
/* invalidate all ways */
|
||||
writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
|
||||
ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
|
||||
ux500_cache_sync();
|
||||
}
|
||||
|
||||
static int ux500_l2x0_init(void)
|
||||
{
|
||||
if (cpu_is_u5500())
|
||||
l2x0_base = __io_address(U5500_L2CC_BASE);
|
||||
else if (cpu_is_u8500())
|
||||
l2x0_base = __io_address(U8500_L2CC_BASE);
|
||||
else
|
||||
ux500_unknown_soc();
|
||||
|
||||
/* 64KB way size, 8 way associativity, force WA */
|
||||
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
|
||||
|
||||
/* Override invalidate function */
|
||||
outer_cache.disable = ux500_l2x0_disable;
|
||||
outer_cache.inv_all = ux500_l2x0_inv_all;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
early_initcall(ux500_l2x0_init);
|
||||
|
|
@ -12,8 +12,6 @@
|
|||
#include <linux/mfd/db5500-prcmu.h>
|
||||
#include <linux/clksrc-dbx500-prcmu.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/localtimer.h>
|
||||
|
|
@ -26,10 +24,6 @@
|
|||
|
||||
void __iomem *_PRCMU_BASE;
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
static void __iomem *l2x0_base;
|
||||
#endif
|
||||
|
||||
void __init ux500_init_irq(void)
|
||||
{
|
||||
void __iomem *dist_base;
|
||||
|
|
@ -56,66 +50,3 @@ void __init ux500_init_irq(void)
|
|||
prcmu_early_init();
|
||||
clk_init();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
|
||||
{
|
||||
/* wait for the operation to complete */
|
||||
while (readl_relaxed(reg) & mask)
|
||||
;
|
||||
}
|
||||
|
||||
static inline void ux500_cache_sync(void)
|
||||
{
|
||||
void __iomem *base = l2x0_base;
|
||||
|
||||
writel_relaxed(0, base + L2X0_CACHE_SYNC);
|
||||
ux500_cache_wait(base + L2X0_CACHE_SYNC, 1);
|
||||
}
|
||||
|
||||
/*
|
||||
* The L2 cache cannot be turned off in the non-secure world.
|
||||
* Dummy until a secure service is in place.
|
||||
*/
|
||||
static void ux500_l2x0_disable(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* This is only called when doing a kexec, just after turning off the L2
|
||||
* and L1 cache, and it is surrounded by a spinlock in the generic version.
|
||||
* However, we're not really turning off the L2 cache right now and the
|
||||
* PL310 does not support exclusive accesses (used to implement the spinlock).
|
||||
* So, the invalidation needs to be done without the spinlock.
|
||||
*/
|
||||
static void ux500_l2x0_inv_all(void)
|
||||
{
|
||||
void __iomem *base = l2x0_base;
|
||||
uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
|
||||
|
||||
/* invalidate all ways */
|
||||
writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);
|
||||
ux500_cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);
|
||||
ux500_cache_sync();
|
||||
}
|
||||
|
||||
static int ux500_l2x0_init(void)
|
||||
{
|
||||
if (cpu_is_u5500())
|
||||
l2x0_base = __io_address(U5500_L2CC_BASE);
|
||||
else if (cpu_is_u8500())
|
||||
l2x0_base = __io_address(U8500_L2CC_BASE);
|
||||
else
|
||||
ux500_unknown_soc();
|
||||
|
||||
/* 64KB way size, 8 way associativity, force WA */
|
||||
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
|
||||
|
||||
/* Override invalidate function */
|
||||
outer_cache.disable = ux500_l2x0_disable;
|
||||
outer_cache.inv_all = ux500_l2x0_inv_all;
|
||||
|
||||
return 0;
|
||||
}
|
||||
early_initcall(ux500_l2x0_init);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -51,15 +51,9 @@ static void flush(void)
|
|||
static inline void arch_decomp_setup(void)
|
||||
{
|
||||
/* Check in run time if we run on an U8500 or U5500 */
|
||||
if (machine_is_u8500() ||
|
||||
machine_is_svp8500v1() ||
|
||||
machine_is_svp8500v2() ||
|
||||
machine_is_hrefv60() ||
|
||||
machine_is_snowball())
|
||||
ux500_uart_base = U8500_UART2_BASE;
|
||||
else if (machine_is_u5500())
|
||||
if (machine_is_u5500())
|
||||
ux500_uart_base = U5500_UART0_BASE;
|
||||
else /* not much can be done to help here */
|
||||
else
|
||||
ux500_uart_base = U8500_UART2_BASE;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -35,40 +35,40 @@
|
|||
|
||||
#define GPIO4_GPIO PIN_CFG(4, GPIO)
|
||||
#define GPIO4_U1_RXD PIN_CFG(4, ALT_A)
|
||||
#define GPIO4_I2C4_SCL PIN_CFG_PULL(4, ALT_B, UP)
|
||||
#define GPIO4_I2C4_SCL PIN_CFG_INPUT(4, ALT_B, PULLUP)
|
||||
#define GPIO4_IP_TRSTn PIN_CFG(4, ALT_C)
|
||||
|
||||
#define GPIO5_GPIO PIN_CFG(5, GPIO)
|
||||
#define GPIO5_U1_TXD PIN_CFG(5, ALT_A)
|
||||
#define GPIO5_I2C4_SDA PIN_CFG_PULL(5, ALT_B, UP)
|
||||
#define GPIO5_I2C4_SDA PIN_CFG_INPUT(5, ALT_B, PULLUP)
|
||||
#define GPIO5_IP_GPIO6 PIN_CFG(5, ALT_C)
|
||||
|
||||
#define GPIO6_GPIO PIN_CFG(6, GPIO)
|
||||
#define GPIO6_U1_CTSn PIN_CFG(6, ALT_A)
|
||||
#define GPIO6_I2C1_SCL PIN_CFG_PULL(6, ALT_B, UP)
|
||||
#define GPIO6_I2C1_SCL PIN_CFG_INPUT(6, ALT_B, PULLUP)
|
||||
#define GPIO6_IP_GPIO0 PIN_CFG(6, ALT_C)
|
||||
|
||||
#define GPIO7_GPIO PIN_CFG(7, GPIO)
|
||||
#define GPIO7_U1_RTSn PIN_CFG(7, ALT_A)
|
||||
#define GPIO7_I2C1_SDA PIN_CFG_PULL(7, ALT_B, UP)
|
||||
#define GPIO7_I2C1_SDA PIN_CFG_INPUT(7, ALT_B, PULLUP)
|
||||
#define GPIO7_IP_GPIO1 PIN_CFG(7, ALT_C)
|
||||
|
||||
#define GPIO8_GPIO PIN_CFG(8, GPIO)
|
||||
#define GPIO8_IPI2C_SDA PIN_CFG_PULL(8, ALT_A, UP)
|
||||
#define GPIO8_I2C2_SDA PIN_CFG_PULL(8, ALT_B, UP)
|
||||
#define GPIO8_IPI2C_SDA PIN_CFG_INPUT(8, ALT_A, PULLUP)
|
||||
#define GPIO8_I2C2_SDA PIN_CFG_INPUT(8, ALT_B, PULLUP)
|
||||
|
||||
#define GPIO9_GPIO PIN_CFG(9, GPIO)
|
||||
#define GPIO9_IPI2C_SCL PIN_CFG_PULL(9, ALT_A, UP)
|
||||
#define GPIO9_I2C2_SCL PIN_CFG_PULL(9, ALT_B, UP)
|
||||
#define GPIO9_IPI2C_SCL PIN_CFG_INPUT(9, ALT_A, PULLUP)
|
||||
#define GPIO9_I2C2_SCL PIN_CFG_INPUT(9, ALT_B, PULLUP)
|
||||
|
||||
#define GPIO10_GPIO PIN_CFG(10, GPIO)
|
||||
#define GPIO10_IPI2C_SDA PIN_CFG_PULL(10, ALT_A, UP)
|
||||
#define GPIO10_I2C2_SDA PIN_CFG_PULL(10, ALT_B, UP)
|
||||
#define GPIO10_IPI2C_SDA PIN_CFG_INPUT(10, ALT_A, PULLUP)
|
||||
#define GPIO10_I2C2_SDA PIN_CFG_INPUT(10, ALT_B, PULLUP)
|
||||
#define GPIO10_IP_GPIO3 PIN_CFG(10, ALT_C)
|
||||
|
||||
#define GPIO11_GPIO PIN_CFG(11, GPIO)
|
||||
#define GPIO11_IPI2C_SCL PIN_CFG_PULL(11, ALT_A, UP)
|
||||
#define GPIO11_I2C2_SCL PIN_CFG_PULL(11, ALT_B, UP)
|
||||
#define GPIO11_IPI2C_SCL PIN_CFG_INPUT(11, ALT_A, PULLUP)
|
||||
#define GPIO11_I2C2_SCL PIN_CFG_INPUT(11, ALT_B, PULLUP)
|
||||
#define GPIO11_IP_GPIO2 PIN_CFG(11, ALT_C)
|
||||
|
||||
#define GPIO12_GPIO PIN_CFG(12, GPIO)
|
||||
|
|
@ -87,66 +87,66 @@
|
|||
|
||||
#define GPIO16_GPIO PIN_CFG(16, GPIO)
|
||||
#define GPIO16_MSP0_RFS PIN_CFG(16, ALT_A)
|
||||
#define GPIO16_I2C1_SCL PIN_CFG_PULL(16, ALT_B, UP)
|
||||
#define GPIO16_I2C1_SCL PIN_CFG_INPUT(16, ALT_B, PULLUP)
|
||||
#define GPIO16_SLIM0_DAT PIN_CFG(16, ALT_C)
|
||||
|
||||
#define GPIO17_GPIO PIN_CFG(17, GPIO)
|
||||
#define GPIO17_MSP0_RCK PIN_CFG(17, ALT_A)
|
||||
#define GPIO17_I2C1_SDA PIN_CFG_PULL(17, ALT_B, UP)
|
||||
#define GPIO17_I2C1_SDA PIN_CFG_INPUT(17, ALT_B, PULLUP)
|
||||
#define GPIO17_SLIM0_CLK PIN_CFG(17, ALT_C)
|
||||
|
||||
#define GPIO18_GPIO PIN_CFG(18, GPIO)
|
||||
#define GPIO18_MC0_CMDDIR PIN_CFG_PULL(18, ALT_A, UP)
|
||||
#define GPIO18_MC0_CMDDIR PIN_CFG_INPUT(18, ALT_A, PULLUP)
|
||||
#define GPIO18_U2_RXD PIN_CFG(18, ALT_B)
|
||||
#define GPIO18_MS_IEP PIN_CFG(18, ALT_C)
|
||||
|
||||
#define GPIO19_GPIO PIN_CFG(19, GPIO)
|
||||
#define GPIO19_MC0_DAT0DIR PIN_CFG_PULL(19, ALT_A, UP)
|
||||
#define GPIO19_MC0_DAT0DIR PIN_CFG_INPUT(19, ALT_A, PULLUP)
|
||||
#define GPIO19_U2_TXD PIN_CFG(19, ALT_B)
|
||||
#define GPIO19_MS_DAT0DIR PIN_CFG(19, ALT_C)
|
||||
|
||||
#define GPIO20_GPIO PIN_CFG(20, GPIO)
|
||||
#define GPIO20_MC0_DAT2DIR PIN_CFG_PULL(20, ALT_A, UP)
|
||||
#define GPIO20_MC0_DAT2DIR PIN_CFG_INPUT(20, ALT_A, PULLUP)
|
||||
#define GPIO20_UARTMOD_TXD PIN_CFG(20, ALT_B)
|
||||
#define GPIO20_IP_TRIGOUT PIN_CFG(20, ALT_C)
|
||||
|
||||
#define GPIO21_GPIO PIN_CFG(21, GPIO)
|
||||
#define GPIO21_MC0_DAT31DIR PIN_CFG_PULL(21, ALT_A, UP)
|
||||
#define GPIO21_MC0_DAT31DIR PIN_CFG_INPUT(21, ALT_A, PULLUP)
|
||||
#define GPIO21_MSP0_SCK PIN_CFG(21, ALT_B)
|
||||
#define GPIO21_MS_DAT31DIR PIN_CFG(21, ALT_C)
|
||||
|
||||
#define GPIO22_GPIO PIN_CFG(22, GPIO)
|
||||
#define GPIO22_MC0_FBCLK PIN_CFG_PULL(22, ALT_A, UP)
|
||||
#define GPIO22_MC0_FBCLK PIN_CFG_INPUT(22, ALT_A, PULLUP)
|
||||
#define GPIO22_UARTMOD_RXD PIN_CFG(22, ALT_B)
|
||||
#define GPIO22_MS_FBCLK PIN_CFG(22, ALT_C)
|
||||
|
||||
#define GPIO23_GPIO PIN_CFG(23, GPIO)
|
||||
#define GPIO23_MC0_CLK PIN_CFG_PULL(23, ALT_A, UP)
|
||||
#define GPIO23_MC0_CLK PIN_CFG_INPUT(23, ALT_A, PULLUP)
|
||||
#define GPIO23_STMMOD_CLK PIN_CFG(23, ALT_B)
|
||||
#define GPIO23_MS_CLK PIN_CFG(23, ALT_C)
|
||||
|
||||
#define GPIO24_GPIO PIN_CFG(24, GPIO)
|
||||
#define GPIO24_MC0_CMD PIN_CFG_PULL(24, ALT_A, UP)
|
||||
#define GPIO24_MC0_CMD PIN_CFG_INPUT(24, ALT_A, PULLUP)
|
||||
#define GPIO24_UARTMOD_RXD PIN_CFG(24, ALT_B)
|
||||
#define GPIO24_MS_BS PIN_CFG(24, ALT_C)
|
||||
|
||||
#define GPIO25_GPIO PIN_CFG(25, GPIO)
|
||||
#define GPIO25_MC0_DAT0 PIN_CFG_PULL(25, ALT_A, UP)
|
||||
#define GPIO25_MC0_DAT0 PIN_CFG_INPUT(25, ALT_A, PULLUP)
|
||||
#define GPIO25_STMMOD_DAT0 PIN_CFG(25, ALT_B)
|
||||
#define GPIO25_MS_DAT0 PIN_CFG(25, ALT_C)
|
||||
|
||||
#define GPIO26_GPIO PIN_CFG(26, GPIO)
|
||||
#define GPIO26_MC0_DAT1 PIN_CFG_PULL(26, ALT_A, UP)
|
||||
#define GPIO26_MC0_DAT1 PIN_CFG_INPUT(26, ALT_A, PULLUP)
|
||||
#define GPIO26_STMMOD_DAT1 PIN_CFG(26, ALT_B)
|
||||
#define GPIO26_MS_DAT1 PIN_CFG(26, ALT_C)
|
||||
|
||||
#define GPIO27_GPIO PIN_CFG(27, GPIO)
|
||||
#define GPIO27_MC0_DAT2 PIN_CFG_PULL(27, ALT_A, UP)
|
||||
#define GPIO27_MC0_DAT2 PIN_CFG_INPUT(27, ALT_A, PULLUP)
|
||||
#define GPIO27_STMMOD_DAT2 PIN_CFG(27, ALT_B)
|
||||
#define GPIO27_MS_DAT2 PIN_CFG(27, ALT_C)
|
||||
|
||||
#define GPIO28_GPIO PIN_CFG(28, GPIO)
|
||||
#define GPIO28_MC0_DAT3 PIN_CFG_PULL(28, ALT_A, UP)
|
||||
#define GPIO28_MC0_DAT3 PIN_CFG_INPUT(28, ALT_A, PULLUP)
|
||||
#define GPIO28_STMMOD_DAT3 PIN_CFG(28, ALT_B)
|
||||
#define GPIO28_MS_DAT3 PIN_CFG(28, ALT_C)
|
||||
|
||||
|
|
@ -357,48 +357,48 @@
|
|||
#define GPIO97_MC5_DAT7 PIN_CFG(97, ALT_C)
|
||||
|
||||
#define GPIO128_GPIO PIN_CFG(128, GPIO)
|
||||
#define GPIO128_MC2_CLK PIN_CFG_PULL(128, ALT_A, UP)
|
||||
#define GPIO128_MC2_CLK PIN_CFG_INPUT(128, ALT_A, PULLUP)
|
||||
#define GPIO128_SM_CKO PIN_CFG(128, ALT_B)
|
||||
|
||||
#define GPIO129_GPIO PIN_CFG(129, GPIO)
|
||||
#define GPIO129_MC2_CMD PIN_CFG_PULL(129, ALT_A, UP)
|
||||
#define GPIO129_MC2_CMD PIN_CFG_INPUT(129, ALT_A, PULLUP)
|
||||
#define GPIO129_SM_WAIT0n PIN_CFG(129, ALT_B)
|
||||
|
||||
#define GPIO130_GPIO PIN_CFG(130, GPIO)
|
||||
#define GPIO130_MC2_FBCLK PIN_CFG_PULL(130, ALT_A, UP)
|
||||
#define GPIO130_MC2_FBCLK PIN_CFG_INPUT(130, ALT_A, PULLUP)
|
||||
#define GPIO130_SM_FBCLK PIN_CFG(130, ALT_B)
|
||||
#define GPIO130_MC2_RSTN PIN_CFG(130, ALT_C)
|
||||
|
||||
#define GPIO131_GPIO PIN_CFG(131, GPIO)
|
||||
#define GPIO131_MC2_DAT0 PIN_CFG_PULL(131, ALT_A, UP)
|
||||
#define GPIO131_MC2_DAT0 PIN_CFG_INPUT(131, ALT_A, PULLUP)
|
||||
#define GPIO131_SM_ADQ8 PIN_CFG(131, ALT_B)
|
||||
|
||||
#define GPIO132_GPIO PIN_CFG(132, GPIO)
|
||||
#define GPIO132_MC2_DAT1 PIN_CFG_PULL(132, ALT_A, UP)
|
||||
#define GPIO132_MC2_DAT1 PIN_CFG_INPUT(132, ALT_A, PULLUP)
|
||||
#define GPIO132_SM_ADQ9 PIN_CFG(132, ALT_B)
|
||||
|
||||
#define GPIO133_GPIO PIN_CFG(133, GPIO)
|
||||
#define GPIO133_MC2_DAT2 PIN_CFG_PULL(133, ALT_A, UP)
|
||||
#define GPIO133_MC2_DAT2 PIN_CFG_INPUT(133, ALT_A, PULLUP)
|
||||
#define GPIO133_SM_ADQ10 PIN_CFG(133, ALT_B)
|
||||
|
||||
#define GPIO134_GPIO PIN_CFG(134, GPIO)
|
||||
#define GPIO134_MC2_DAT3 PIN_CFG_PULL(134, ALT_A, UP)
|
||||
#define GPIO134_MC2_DAT3 PIN_CFG_INPUT(134, ALT_A, PULLUP)
|
||||
#define GPIO134_SM_ADQ11 PIN_CFG(134, ALT_B)
|
||||
|
||||
#define GPIO135_GPIO PIN_CFG(135, GPIO)
|
||||
#define GPIO135_MC2_DAT4 PIN_CFG_PULL(135, ALT_A, UP)
|
||||
#define GPIO135_MC2_DAT4 PIN_CFG_INPUT(135, ALT_A, PULLUP)
|
||||
#define GPIO135_SM_ADQ12 PIN_CFG(135, ALT_B)
|
||||
|
||||
#define GPIO136_GPIO PIN_CFG(136, GPIO)
|
||||
#define GPIO136_MC2_DAT5 PIN_CFG_PULL(136, ALT_A, UP)
|
||||
#define GPIO136_MC2_DAT5 PIN_CFG_INPUT(136, ALT_A, PULLUP)
|
||||
#define GPIO136_SM_ADQ13 PIN_CFG(136, ALT_B)
|
||||
|
||||
#define GPIO137_GPIO PIN_CFG(137, GPIO)
|
||||
#define GPIO137_MC2_DAT6 PIN_CFG_PULL(137, ALT_A, UP)
|
||||
#define GPIO137_MC2_DAT6 PIN_CFG_INPUT(137, ALT_A, PULLUP)
|
||||
#define GPIO137_SM_ADQ14 PIN_CFG(137, ALT_B)
|
||||
|
||||
#define GPIO138_GPIO PIN_CFG(138, GPIO)
|
||||
#define GPIO138_MC2_DAT7 PIN_CFG_PULL(138, ALT_A, UP)
|
||||
#define GPIO138_MC2_DAT7 PIN_CFG_INPUT(138, ALT_A, PULLUP)
|
||||
#define GPIO138_SM_ADQ15 PIN_CFG(138, ALT_B)
|
||||
|
||||
#define GPIO139_GPIO PIN_CFG(139, GPIO)
|
||||
|
|
@ -434,10 +434,10 @@
|
|||
#define GPIO146_SSP0_TXD PIN_CFG(146, ALT_A)
|
||||
|
||||
#define GPIO147_GPIO PIN_CFG(147, GPIO)
|
||||
#define GPIO147_I2C0_SCL PIN_CFG_PULL(147, ALT_A, UP)
|
||||
#define GPIO147_I2C0_SCL PIN_CFG_INPUT(147, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO148_GPIO PIN_CFG(148, GPIO)
|
||||
#define GPIO148_I2C0_SDA PIN_CFG_PULL(148, ALT_A, UP)
|
||||
#define GPIO148_I2C0_SDA PIN_CFG_INPUT(148, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO149_GPIO PIN_CFG(149, GPIO)
|
||||
#define GPIO149_IP_GPIO0 PIN_CFG(149, ALT_A)
|
||||
|
|
@ -459,82 +459,82 @@
|
|||
#define GPIO152_KP_O9 PIN_CFG(152, ALT_C)
|
||||
|
||||
#define GPIO153_GPIO PIN_CFG(153, GPIO)
|
||||
#define GPIO153_KP_I7 PIN_CFG_PULL(153, ALT_A, DOWN)
|
||||
#define GPIO153_KP_I7 PIN_CFG_INPUT(153, ALT_A, PULLDOWN)
|
||||
#define GPIO153_LCD_D24 PIN_CFG(153, ALT_B)
|
||||
#define GPIO153_U2_RXD PIN_CFG(153, ALT_C)
|
||||
|
||||
#define GPIO154_GPIO PIN_CFG(154, GPIO)
|
||||
#define GPIO154_KP_I6 PIN_CFG_PULL(154, ALT_A, DOWN)
|
||||
#define GPIO154_KP_I6 PIN_CFG_INPUT(154, ALT_A, PULLDOWN)
|
||||
#define GPIO154_LCD_D25 PIN_CFG(154, ALT_B)
|
||||
#define GPIO154_U2_TXD PIN_CFG(154, ALT_C)
|
||||
|
||||
#define GPIO155_GPIO PIN_CFG(155, GPIO)
|
||||
#define GPIO155_KP_I5 PIN_CFG_PULL(155, ALT_A, DOWN)
|
||||
#define GPIO155_KP_I5 PIN_CFG_INPUT(155, ALT_A, PULLDOWN)
|
||||
#define GPIO155_LCD_D26 PIN_CFG(155, ALT_B)
|
||||
#define GPIO155_STMAPE_CLK PIN_CFG(155, ALT_C)
|
||||
|
||||
#define GPIO156_GPIO PIN_CFG(156, GPIO)
|
||||
#define GPIO156_KP_I4 PIN_CFG_PULL(156, ALT_A, DOWN)
|
||||
#define GPIO156_KP_I4 PIN_CFG_INPUT(156, ALT_A, PULLDOWN)
|
||||
#define GPIO156_LCD_D27 PIN_CFG(156, ALT_B)
|
||||
#define GPIO156_STMAPE_DAT3 PIN_CFG(156, ALT_C)
|
||||
|
||||
#define GPIO157_GPIO PIN_CFG(157, GPIO)
|
||||
#define GPIO157_KP_O7 PIN_CFG_PULL(157, ALT_A, UP)
|
||||
#define GPIO157_KP_O7 PIN_CFG_INPUT(157, ALT_A, PULLUP)
|
||||
#define GPIO157_LCD_D28 PIN_CFG(157, ALT_B)
|
||||
#define GPIO157_STMAPE_DAT2 PIN_CFG(157, ALT_C)
|
||||
|
||||
#define GPIO158_GPIO PIN_CFG(158, GPIO)
|
||||
#define GPIO158_KP_O6 PIN_CFG_PULL(158, ALT_A, UP)
|
||||
#define GPIO158_KP_O6 PIN_CFG_INPUT(158, ALT_A, PULLUP)
|
||||
#define GPIO158_LCD_D29 PIN_CFG(158, ALT_B)
|
||||
#define GPIO158_STMAPE_DAT1 PIN_CFG(158, ALT_C)
|
||||
|
||||
#define GPIO159_GPIO PIN_CFG(159, GPIO)
|
||||
#define GPIO159_KP_O5 PIN_CFG_PULL(159, ALT_A, UP)
|
||||
#define GPIO159_KP_O5 PIN_CFG_INPUT(159, ALT_A, PULLUP)
|
||||
#define GPIO159_LCD_D30 PIN_CFG(159, ALT_B)
|
||||
#define GPIO159_STMAPE_DAT0 PIN_CFG(159, ALT_C)
|
||||
|
||||
#define GPIO160_GPIO PIN_CFG(160, GPIO)
|
||||
#define GPIO160_KP_O4 PIN_CFG_PULL(160, ALT_A, UP)
|
||||
#define GPIO160_KP_O4 PIN_CFG_INPUT(160, ALT_A, PULLUP)
|
||||
#define GPIO160_LCD_D31 PIN_CFG(160, ALT_B)
|
||||
#define GPIO160_NONE PIN_CFG(160, ALT_C)
|
||||
|
||||
#define GPIO161_GPIO PIN_CFG(161, GPIO)
|
||||
#define GPIO161_KP_I3 PIN_CFG_PULL(161, ALT_A, DOWN)
|
||||
#define GPIO161_KP_I3 PIN_CFG_INPUT(161, ALT_A, PULLDOWN)
|
||||
#define GPIO161_LCD_D32 PIN_CFG(161, ALT_B)
|
||||
#define GPIO161_UARTMOD_RXD PIN_CFG(161, ALT_C)
|
||||
|
||||
#define GPIO162_GPIO PIN_CFG(162, GPIO)
|
||||
#define GPIO162_KP_I2 PIN_CFG_PULL(162, ALT_A, DOWN)
|
||||
#define GPIO162_KP_I2 PIN_CFG_INPUT(162, ALT_A, PULLDOWN)
|
||||
#define GPIO162_LCD_D33 PIN_CFG(162, ALT_B)
|
||||
#define GPIO162_UARTMOD_TXD PIN_CFG(162, ALT_C)
|
||||
|
||||
#define GPIO163_GPIO PIN_CFG(163, GPIO)
|
||||
#define GPIO163_KP_I1 PIN_CFG_PULL(163, ALT_A, DOWN)
|
||||
#define GPIO163_KP_I1 PIN_CFG_INPUT(163, ALT_A, PULLDOWN)
|
||||
#define GPIO163_LCD_D34 PIN_CFG(163, ALT_B)
|
||||
#define GPIO163_STMMOD_CLK PIN_CFG(163, ALT_C)
|
||||
|
||||
#define GPIO164_GPIO PIN_CFG(164, GPIO)
|
||||
#define GPIO164_KP_I0 PIN_CFG_PULL(164, ALT_A, UP)
|
||||
#define GPIO164_KP_I0 PIN_CFG_INPUT(164, ALT_A, PULLUP)
|
||||
#define GPIO164_LCD_D35 PIN_CFG(164, ALT_B)
|
||||
#define GPIO164_STMMOD_DAT3 PIN_CFG(164, ALT_C)
|
||||
|
||||
#define GPIO165_GPIO PIN_CFG(165, GPIO)
|
||||
#define GPIO165_KP_O3 PIN_CFG_PULL(165, ALT_A, UP)
|
||||
#define GPIO165_KP_O3 PIN_CFG_INPUT(165, ALT_A, PULLUP)
|
||||
#define GPIO165_LCD_D36 PIN_CFG(165, ALT_B)
|
||||
#define GPIO165_STMMOD_DAT2 PIN_CFG(165, ALT_C)
|
||||
|
||||
#define GPIO166_GPIO PIN_CFG(166, GPIO)
|
||||
#define GPIO166_KP_O2 PIN_CFG_PULL(166, ALT_A, UP)
|
||||
#define GPIO166_KP_O2 PIN_CFG_INPUT(166, ALT_A, PULLUP)
|
||||
#define GPIO166_LCD_D37 PIN_CFG(166, ALT_B)
|
||||
#define GPIO166_STMMOD_DAT1 PIN_CFG(166, ALT_C)
|
||||
|
||||
#define GPIO167_GPIO PIN_CFG(167, GPIO)
|
||||
#define GPIO167_KP_O1 PIN_CFG_PULL(167, ALT_A, UP)
|
||||
#define GPIO167_KP_O1 PIN_CFG_INPUT(167, ALT_A, PULLUP)
|
||||
#define GPIO167_LCD_D38 PIN_CFG(167, ALT_B)
|
||||
#define GPIO167_STMMOD_DAT0 PIN_CFG(167, ALT_C)
|
||||
|
||||
#define GPIO168_GPIO PIN_CFG(168, GPIO)
|
||||
#define GPIO168_KP_O0 PIN_CFG_PULL(168, ALT_A, UP)
|
||||
#define GPIO168_KP_O0 PIN_CFG_INPUT(168, ALT_A, PULLUP)
|
||||
#define GPIO168_LCD_D39 PIN_CFG(168, ALT_B)
|
||||
#define GPIO168_NONE PIN_CFG(168, ALT_C)
|
||||
|
||||
|
|
@ -569,39 +569,39 @@
|
|||
#define GPIO196_MSP2_RXD PIN_CFG(196, ALT_A)
|
||||
|
||||
#define GPIO197_GPIO PIN_CFG(197, GPIO)
|
||||
#define GPIO197_MC4_DAT3 PIN_CFG_PULL(197, ALT_A, UP)
|
||||
#define GPIO197_MC4_DAT3 PIN_CFG_INPUT(197, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO198_GPIO PIN_CFG(198, GPIO)
|
||||
#define GPIO198_MC4_DAT2 PIN_CFG_PULL(198, ALT_A, UP)
|
||||
#define GPIO198_MC4_DAT2 PIN_CFG_INPUT(198, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO199_GPIO PIN_CFG(199, GPIO)
|
||||
#define GPIO199_MC4_DAT1 PIN_CFG_PULL(199, ALT_A, UP)
|
||||
#define GPIO199_MC4_DAT1 PIN_CFG_INPUT(199, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO200_GPIO PIN_CFG(200, GPIO)
|
||||
#define GPIO200_MC4_DAT0 PIN_CFG_PULL(200, ALT_A, UP)
|
||||
#define GPIO200_MC4_DAT0 PIN_CFG_INPUT(200, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO201_GPIO PIN_CFG(201, GPIO)
|
||||
#define GPIO201_MC4_CMD PIN_CFG_PULL(201, ALT_A, UP)
|
||||
#define GPIO201_MC4_CMD PIN_CFG_INPUT(201, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO202_GPIO PIN_CFG(202, GPIO)
|
||||
#define GPIO202_MC4_FBCLK PIN_CFG_PULL(202, ALT_A, UP)
|
||||
#define GPIO202_MC4_FBCLK PIN_CFG_INPUT(202, ALT_A, PULLUP)
|
||||
#define GPIO202_PWL PIN_CFG(202, ALT_B)
|
||||
#define GPIO202_MC4_RSTN PIN_CFG(202, ALT_C)
|
||||
|
||||
#define GPIO203_GPIO PIN_CFG(203, GPIO)
|
||||
#define GPIO203_MC4_CLK PIN_CFG_PULL(203, ALT_A, UP)
|
||||
#define GPIO203_MC4_CLK PIN_CFG_INPUT(203, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO204_GPIO PIN_CFG(204, GPIO)
|
||||
#define GPIO204_MC4_DAT7 PIN_CFG_PULL(204, ALT_A, UP)
|
||||
#define GPIO204_MC4_DAT7 PIN_CFG_INPUT(204, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO205_GPIO PIN_CFG(205, GPIO)
|
||||
#define GPIO205_MC4_DAT6 PIN_CFG_PULL(205, ALT_A, UP)
|
||||
#define GPIO205_MC4_DAT6 PIN_CFG_INPUT(205, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO206_GPIO PIN_CFG(206, GPIO)
|
||||
#define GPIO206_MC4_DAT5 PIN_CFG_PULL(206, ALT_A, UP)
|
||||
#define GPIO206_MC4_DAT5 PIN_CFG_INPUT(206, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO207_GPIO PIN_CFG(207, GPIO)
|
||||
#define GPIO207_MC4_DAT4 PIN_CFG_PULL(207, ALT_A, UP)
|
||||
#define GPIO207_MC4_DAT4 PIN_CFG_INPUT(207, ALT_A, PULLUP)
|
||||
|
||||
#define GPIO208_GPIO PIN_CFG(208, GPIO)
|
||||
#define GPIO208_MC1_CLK PIN_CFG(208, ALT_A)
|
||||
|
|
@ -632,21 +632,25 @@
|
|||
#define GPIO215_MC1_CMDDIR PIN_CFG(215, ALT_A)
|
||||
#define GPIO215_MC3_DAT2DIR PIN_CFG(215, ALT_B)
|
||||
#define GPIO215_CLKOUT1 PIN_CFG(215, ALT_C)
|
||||
#define GPIO215_SPI2_TXD PIN_CFG(215, ALT_C)
|
||||
|
||||
#define GPIO216_GPIO PIN_CFG(216, GPIO)
|
||||
#define GPIO216_MC1_DAT2DIR PIN_CFG(216, ALT_A)
|
||||
#define GPIO216_MC3_CMDDIR PIN_CFG(216, ALT_B)
|
||||
#define GPIO216_I2C3_SDA PIN_CFG_PULL(216, ALT_C, UP)
|
||||
#define GPIO216_I2C3_SDA PIN_CFG_INPUT(216, ALT_C, PULLUP)
|
||||
#define GPIO216_SPI2_FRM PIN_CFG(216, ALT_C)
|
||||
|
||||
#define GPIO217_GPIO PIN_CFG(217, GPIO)
|
||||
#define GPIO217_MC1_DAT0DIR PIN_CFG(217, ALT_A)
|
||||
#define GPIO217_MC3_DAT31DIR PIN_CFG(217, ALT_B)
|
||||
#define GPIO217_CLKOUT2 PIN_CFG(217, ALT_C)
|
||||
#define GPIO217_SPI2_CLK PIN_CFG(217, ALT_C)
|
||||
|
||||
#define GPIO218_GPIO PIN_CFG(218, GPIO)
|
||||
#define GPIO218_MC1_DAT31DIR PIN_CFG(218, ALT_A)
|
||||
#define GPIO218_MC3_DAT0DIR PIN_CFG(218, ALT_B)
|
||||
#define GPIO218_I2C3_SCL PIN_CFG_PULL(218, ALT_C, UP)
|
||||
#define GPIO218_I2C3_SCL PIN_CFG_INPUT(218, ALT_C, PULLUP)
|
||||
#define GPIO218_SPI2_RXD PIN_CFG(218, ALT_C)
|
||||
|
||||
#define GPIO219_GPIO PIN_CFG(219, GPIO)
|
||||
#define GPIO219_HSIR_FLA0 PIN_CFG(219, ALT_A)
|
||||
|
|
@ -694,12 +698,12 @@
|
|||
#define GPIO229_GPIO PIN_CFG(229, GPIO)
|
||||
#define GPIO229_CLKOUT1 PIN_CFG(229, ALT_A)
|
||||
#define GPIO229_PWL PIN_CFG(229, ALT_B)
|
||||
#define GPIO229_I2C3_SDA PIN_CFG_PULL(229, ALT_C, UP)
|
||||
#define GPIO229_I2C3_SDA PIN_CFG_INPUT(229, ALT_C, PULLUP)
|
||||
|
||||
#define GPIO230_GPIO PIN_CFG(230, GPIO)
|
||||
#define GPIO230_CLKOUT2 PIN_CFG(230, ALT_A)
|
||||
#define GPIO230_PWL PIN_CFG(230, ALT_B)
|
||||
#define GPIO230_I2C3_SCL PIN_CFG_PULL(230, ALT_C, UP)
|
||||
#define GPIO230_I2C3_SCL PIN_CFG_INPUT(230, ALT_C, PULLUP)
|
||||
|
||||
#define GPIO256_GPIO PIN_CFG(256, GPIO)
|
||||
#define GPIO256_USB_NXT PIN_CFG(256, ALT_A)
|
||||
|
|
|
|||
|
|
@ -37,7 +37,6 @@
|
|||
* SLPM value = same as normal
|
||||
*
|
||||
* PIN_CFG - default config with alternate function
|
||||
* PIN_CFG_PULL - default config with alternate function and pull up/down
|
||||
*/
|
||||
|
||||
typedef unsigned long pin_cfg_t;
|
||||
|
|
@ -133,10 +132,6 @@ typedef unsigned long pin_cfg_t;
|
|||
(PIN_CFG_DEFAULT |\
|
||||
(PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
|
||||
|
||||
#define PIN_CFG_PULL(num, alt, pull) \
|
||||
((PIN_CFG_DEFAULT & ~PIN_PULL_MASK) |\
|
||||
(PIN_NUM(num) | PIN_##alt | PIN_PULL_##pull))
|
||||
|
||||
extern int nmk_config_pin(pin_cfg_t cfg, bool sleep);
|
||||
extern int nmk_config_pins(pin_cfg_t *cfgs, int num);
|
||||
extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num);
|
||||
|
|
|
|||
Loading…
Reference in New Issue