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ath9k_hw: Initialize 2GHz CTL properly. 

The last 2GHz CTL was not being initialized, so power was being
set to 0 instead of 30dbm. Initialize to 30 like other CTLs.

Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Senthil Balasubramanian 2010-11-10 05:03:08 -08:00 committed by John W. Linville
parent b3dd6bc1f0
commit ef5a6a7573
1 changed files with 1 additions and 0 deletions
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1
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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@ -306,6 +306,7 @@ static const struct ar9300_eeprom ar9300_default = {
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
},
.modalHeader5G = {
/* 4 idle,t1,t2,b (4 bits per setting) */