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drm/amdgpu/gfx7: enable cp inst/reg error interrupts 

Enable CP register/instruction error interrupts. Useful
for debugging command stream problems.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2016-02-02 14:46:48 -05:00
parent 1d22a454ec
commit ef720532ec
1 changed files with 19 additions and 1 deletions
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20
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
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@ -4738,6 +4738,22 @@ static int gfx_v7_0_early_init(void *handle)
return 0; return 0;
} }
static int gfx_v7_0_late_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int r;
r = amdgpu_irq_get(adev, &adev->gfx.priv_reg_irq, 0);
if (r)
return r;
r = amdgpu_irq_get(adev, &adev->gfx.priv_inst_irq, 0);
if (r)
return r;
return 0;
}
static int gfx_v7_0_sw_init(void *handle) static int gfx_v7_0_sw_init(void *handle)
{ {
struct amdgpu_ring *ring; struct amdgpu_ring *ring;
@ -4890,6 +4906,8 @@ static int gfx_v7_0_hw_fini(void *handle)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
gfx_v7_0_cp_enable(adev, false); gfx_v7_0_cp_enable(adev, false);
gfx_v7_0_rlc_stop(adev); gfx_v7_0_rlc_stop(adev);
gfx_v7_0_fini_pg(adev); gfx_v7_0_fini_pg(adev);
@ -5527,7 +5545,7 @@ static int gfx_v7_0_set_powergating_state(void *handle,
const struct amd_ip_funcs gfx_v7_0_ip_funcs = { const struct amd_ip_funcs gfx_v7_0_ip_funcs = {
.early_init = gfx_v7_0_early_init, .early_init = gfx_v7_0_early_init,
.late_init = NULL, .late_init = gfx_v7_0_late_init,
.sw_init = gfx_v7_0_sw_init, .sw_init = gfx_v7_0_sw_init,
.sw_fini = gfx_v7_0_sw_fini, .sw_fini = gfx_v7_0_sw_fini,
.hw_init = gfx_v7_0_hw_init, .hw_init = gfx_v7_0_hw_init,