Merge branch 'for-3.6/boards' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/boards

From Stephen Warren <swarren@wwwdotorg.org>
This branch contains changes to Tegra board files, and related Kconfig and
Makefile changes. Highlights include:

* Removal of Seaboard/Springbank board files; these boards can now only be
  used with device tree.

* Use of small parts of some non-DT board files from the DT board files. This
  enables all features that the non-DT board files have, when booting from DT.
  This will allow almost complete removal of all non-DT board files in v3.7.

* Other miscellaneous changes.

This branch is based on Tegra's for-3.6/cleanup branch from a previous pull
request.

* 'for-3.6/boards' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: use of_default_bus_match_table
  ARM: tegra: add device tree AUXDATA for APBDMA
  ARM: tegra: paz00: enable WiFi rfkill when booting from device tree
  ARM: tegra: harmony: init regulators, PCIe when booting from DT
  ARM: tegra: trimslice: enable PCIe when booting from device tree
  ARM: tegra: remove Seaboard board files
  ARM: tegra: remove CONFIG_MACH_TEGRA_DT
  ARM: tegra: make .dts compilation depend on Tegra2 support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2012-07-06 22:18:38 +02:00
commit efab093481
41 changed files with 143 additions and 685 deletions

View File

@ -15,7 +15,7 @@ Child device nodes describe the memory settings for different configurations and
Example:
emc@7000f400 {
memory-controller@7000f400 {
#address-cells = < 1 >;
#size-cells = < 0 >;
compatible = "nvidia,tegra20-emc";

View File

@ -8,7 +8,7 @@ Required properties:
- interrupts : Should contain MC General interrupt.
Example:
mc {
memory-controller@0x7000f000 {
compatible = "nvidia,tegra20-mc";
reg = <0x7000f000 0x024
0x7000f03c 0x3c4>;

View File

@ -8,7 +8,7 @@ Required properties:
- interrupts : Should contain MC General interrupt.
Example:
mc {
memory-controller {
compatible = "nvidia,tegra30-mc";
reg = <0x7000f000 0x010
0x7000f03c 0x1b4

View File

@ -647,6 +647,7 @@ config ARCH_TEGRA
select MIGHT_HAVE_CACHE_L2X0
select NEED_MACH_IO_H if PCI
select ARCH_HAS_CPUFREQ
select USE_OF
help
This enables support for NVIDIA Tegra based systems (Tegra APX,
Tegra 6xx and Tegra 2 series).

View File

@ -307,7 +307,6 @@ sdhci@c8000600 {
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
support-8bit;
bus-width = <8>;
};

View File

@ -301,7 +301,6 @@ sdhci@c8000000 {
sdhci@c8000600 {
status = "okay";
support-8bit;
bus-width = <8>;
};

View File

@ -334,7 +334,7 @@ magnetometer@c {
};
};
emc {
memory-controller@0x7000f400 {
emc-table@190000 {
reg = <190000>;
compatible = "nvidia,tegra20-emc-table";
@ -397,7 +397,6 @@ sdhci@c8000400 {
sdhci@c8000600 {
status = "okay";
support-8bit;
bus-width = <8>;
};

View File

@ -314,7 +314,6 @@ sdhci@c8000400 {
sdhci@c8000600 {
status = "okay";
support-8bit;
bus-width = <8>;
};

View File

@ -164,7 +164,7 @@ pmc {
reg = <0x7000e400 0x400>;
};
mc {
memory-controller@0x7000f000 {
compatible = "nvidia,tegra20-mc";
reg = <0x7000f000 0x024
0x7000f03c 0x3c4>;
@ -177,7 +177,7 @@ gart {
0x58000000 0x02000000>; /* GART aperture */
};
emc {
memory-controller@0x7000f400 {
compatible = "nvidia,tegra20-emc";
reg = <0x7000f400 0x200>;
#address-cells = <1>;

View File

@ -144,7 +144,6 @@ sdhci@78000000 {
sdhci@78000600 {
status = "okay";
support-8bit;
bus-width = <8>;
};

View File

@ -167,7 +167,7 @@ pmc {
reg = <0x7000e400 0x400>;
};
mc {
memory-controller {
compatible = "nvidia,tegra30-mc";
reg = <0x7000f000 0x010
0x7000f03c 0x1b4

View File

@ -63,40 +63,15 @@ comment "Tegra board type"
config MACH_HARMONY
bool "Harmony board"
depends on ARCH_TEGRA_2x_SOC
select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
help
Support for nVidia Harmony development platform
config MACH_KAEN
bool "Kaen board"
depends on ARCH_TEGRA_2x_SOC
select MACH_SEABOARD
select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
help
Support for the Kaen version of Seaboard
config MACH_PAZ00
bool "Paz00 board"
depends on ARCH_TEGRA_2x_SOC
help
Support for the Toshiba AC100/Dynabook AZ netbook
config MACH_SEABOARD
bool "Seaboard board"
depends on ARCH_TEGRA_2x_SOC
select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
help
Support for nVidia Seaboard development platform. It will
also be included for some of the derivative boards that
have large similarities with the seaboard design.
config MACH_TEGRA_DT
bool "Generic Tegra20 board (FDT support)"
depends on ARCH_TEGRA_2x_SOC
select USE_OF
help
Support for generic NVIDIA Tegra20 boards using Flattened Device Tree
config MACH_TRIMSLICE
bool "TrimSlice board"
depends on ARCH_TEGRA_2x_SOC
@ -104,20 +79,6 @@ config MACH_TRIMSLICE
help
Support for CompuLab TrimSlice platform
config MACH_WARIO
bool "Wario board"
depends on ARCH_TEGRA_2x_SOC
select MACH_SEABOARD
help
Support for the Wario version of Seaboard
config MACH_VENTANA
bool "Ventana board"
depends on ARCH_TEGRA_2x_SOC
select MACH_TEGRA_DT
help
Support for the nVidia Ventana development platform
choice
prompt "Default low-level debug console UART"
default TEGRA_DEBUG_UART_NONE

View File

@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_IDLE) += sleep.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_SMP) += reset.o
@ -23,6 +22,9 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
obj-$(CONFIG_TEGRA_PCI) += pcie.o
obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-dt-tegra20.o
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o
obj-$(CONFIG_MACH_HARMONY) += board-harmony.o
obj-$(CONFIG_MACH_HARMONY) += board-harmony-pinmux.o
obj-$(CONFIG_MACH_HARMONY) += board-harmony-pcie.o
@ -31,14 +33,5 @@ obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o
obj-$(CONFIG_MACH_PAZ00) += board-paz00.o
obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o
obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o
obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o
obj-$(CONFIG_MACH_TEGRA_DT) += board-dt-tegra20.o
obj-$(CONFIG_MACH_TEGRA_DT) += board-harmony-pinmux.o
obj-$(CONFIG_MACH_TEGRA_DT) += board-seaboard-pinmux.o
obj-$(CONFIG_MACH_TEGRA_DT) += board-paz00-pinmux.o
obj-$(CONFIG_MACH_TEGRA_DT) += board-trimslice-pinmux.o
obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o
obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o

View File

@ -2,9 +2,9 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000
params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb
dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb
dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb
dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra-cardhu.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-harmony.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb
dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb

View File

@ -64,6 +64,7 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
&tegra_ehci2_pdata),
OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
&tegra_ehci3_pdata),
OF_DEV_AUXDATA("nvidia,tegra20-apbdma", 0x6000a000, "tegra-apbdma", NULL),
{}
};
@ -81,11 +82,6 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
{ NULL, NULL, 0, 0},
};
static struct of_device_id tegra_dt_match_table[] __initdata = {
{ .compatible = "simple-bus", },
{}
};
static void __init tegra_dt_init(void)
{
tegra_clk_init_from_table(tegra_dt_clk_init_table);
@ -94,10 +90,74 @@ static void __init tegra_dt_init(void)
* Finished with the static registrations now; fill in the missing
* devices
*/
of_platform_populate(NULL, tegra_dt_match_table,
of_platform_populate(NULL, of_default_bus_match_table,
tegra20_auxdata_lookup, NULL);
}
#ifdef CONFIG_MACH_TRIMSLICE
static void __init trimslice_init(void)
{
int ret;
ret = tegra_pcie_init(true, true);
if (ret)
pr_err("tegra_pci_init() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_MACH_HARMONY
static void __init harmony_init(void)
{
int ret;
ret = harmony_regulator_init();
if (ret) {
pr_err("harmony_regulator_init() failed: %d\n", ret);
return;
}
ret = harmony_pcie_init();
if (ret)
pr_err("harmony_pcie_init() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_MACH_PAZ00
static void __init paz00_init(void)
{
tegra_paz00_wifikill_init();
}
#endif
static struct {
char *machine;
void (*init)(void);
} board_init_funcs[] = {
#ifdef CONFIG_MACH_TRIMSLICE
{ "compulab,trimslice", trimslice_init },
#endif
#ifdef CONFIG_MACH_HARMONY
{ "nvidia,harmony", harmony_init },
#endif
#ifdef CONFIG_MACH_PAZ00
{ "compal,paz00", paz00_init },
#endif
};
static void __init tegra_dt_init_late(void)
{
int i;
tegra_init_late();
for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
if (of_machine_is_compatible(board_init_funcs[i].machine)) {
board_init_funcs[i].init();
break;
}
}
}
static const char *tegra20_dt_board_compat[] = {
"nvidia,tegra20",
NULL
@ -110,7 +170,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_dt_init,
.init_late = tegra_init_late,
.init_late = tegra_dt_init_late,
.restart = tegra_assert_system_reset,
.dt_compat = tegra20_dt_board_compat,
MACHINE_END

View File

@ -36,11 +36,6 @@
#include "board.h"
#include "clock.h"
static struct of_device_id tegra_dt_match_table[] __initdata = {
{ .compatible = "simple-bus", },
{}
};
struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL),
@ -52,6 +47,7 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL),
OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL),
{}
};
@ -74,7 +70,7 @@ static void __init tegra30_dt_init(void)
{
tegra_clk_init_from_table(tegra_dt_clk_init_table);
of_platform_populate(NULL, tegra_dt_match_table,
of_platform_populate(NULL, of_default_bus_match_table,
tegra30_auxdata_lookup, NULL);
}

View File

@ -27,14 +27,11 @@
#ifdef CONFIG_TEGRA_PCI
static int __init harmony_pcie_init(void)
int __init harmony_pcie_init(void)
{
struct regulator *regulator = NULL;
int err;
if (!machine_is_harmony())
return 0;
err = gpio_request(TEGRA_GPIO_EN_VDD_1V05_GPIO, "EN_VDD_1V05");
if (err)
return err;
@ -62,7 +59,15 @@ static int __init harmony_pcie_init(void)
return err;
}
static int __init harmony_pcie_initcall(void)
{
if (!machine_is_harmony())
return 0;
return harmony_pcie_init();
}
/* PCI should be initialized after I2C, mfd and regulators */
subsys_initcall_sync(harmony_pcie_init);
subsys_initcall_sync(harmony_pcie_initcall);
#endif

View File

@ -20,6 +20,10 @@
#include <linux/gpio.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/tps6586x.h>
#include <linux/of.h>
#include <linux/of_i2c.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
@ -110,7 +114,26 @@ static struct i2c_board_info __initdata harmony_regulators[] = {
int __init harmony_regulator_init(void)
{
i2c_register_board_info(3, harmony_regulators, 1);
if (machine_is_harmony()) {
i2c_register_board_info(3, harmony_regulators, 1);
} else { /* Harmony, booted using device tree */
struct device_node *np;
struct i2c_adapter *adapter;
np = of_find_node_by_path("/i2c@7000d000");
if (np == NULL) {
pr_err("Could not find device_node for DVC I2C\n");
return -ENODEV;
}
adapter = of_find_i2c_adapter_by_node(np);
if (!adapter) {
pr_err("Could not find i2c_adapter for DVC I2C\n");
return -ENODEV;
}
i2c_new_device(adapter, harmony_regulators);
}
return 0;
}

View File

@ -148,7 +148,6 @@ static struct platform_device *paz00_devices[] __initdata = {
&debug_uart,
&tegra_sdhci_device4,
&tegra_sdhci_device1,
&wifi_rfkill_device,
&leds_gpio,
&gpio_keys_device,
};
@ -201,6 +200,11 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = {
.is_8bit = 1,
};
void __init tegra_paz00_wifikill_init(void)
{
platform_device_register(&wifi_rfkill_device);
}
static void __init tegra_paz00_init(void)
{
tegra_clk_init_from_table(paz00_clk_init_table);
@ -211,6 +215,7 @@ static void __init tegra_paz00_init(void)
tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
tegra_paz00_wifikill_init();
paz00_i2c_init();
paz00_usb_init();

View File

@ -1,197 +0,0 @@
/*
* Copyright (C) 2010-2012 NVIDIA Corporation
* Copyright (C) 2011 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/kernel.h>
#include "board-seaboard.h"
#include "board-pinmux.h"
static unsigned long seaboard_pincfg_drive_sdio1[] = {
TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE, 0),
TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SCHMITT, 0),
TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_LOW_POWER_MODE, 3),
TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH, 31),
TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH, 31),
TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING, 3),
TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_RISING, 3),
};
static struct pinctrl_map common_map[] = {
TEGRA_MAP_MUXCONF("ata", "ide", none, driven),
TEGRA_MAP_MUXCONF("atb", "sdio4", none, driven),
TEGRA_MAP_MUXCONF("atc", "nand", none, driven),
TEGRA_MAP_MUXCONF("atd", "gmi", none, driven),
TEGRA_MAP_MUXCONF("ate", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("cdev1", "plla_out", none, driven),
TEGRA_MAP_MUXCONF("cdev2", "pllp_out4", none, driven),
TEGRA_MAP_MUXCONF("crtp", "crt", up, tristate),
TEGRA_MAP_MUXCONF("csus", "vi_sensor_clk", none, tristate),
TEGRA_MAP_MUXCONF("dap1", "dap1", none, driven),
TEGRA_MAP_MUXCONF("dap2", "dap2", none, driven),
TEGRA_MAP_MUXCONF("dap3", "dap3", none, tristate),
TEGRA_MAP_MUXCONF("dap4", "dap4", none, driven),
TEGRA_MAP_MUXCONF("dta", "vi", down, driven),
TEGRA_MAP_MUXCONF("dtb", "vi", down, driven),
TEGRA_MAP_MUXCONF("dtc", "vi", down, driven),
TEGRA_MAP_MUXCONF("dtd", "vi", down, driven),
TEGRA_MAP_MUXCONF("dte", "vi", down, tristate),
TEGRA_MAP_MUXCONF("dtf", "i2c3", none, driven),
TEGRA_MAP_MUXCONF("gma", "sdio4", none, driven),
TEGRA_MAP_MUXCONF("gmb", "gmi", up, tristate),
TEGRA_MAP_MUXCONF("gmc", "uartd", none, driven),
TEGRA_MAP_MUXCONF("gme", "sdio4", none, driven),
TEGRA_MAP_MUXCONF("gpu", "pwm", none, driven),
TEGRA_MAP_MUXCONF("gpu7", "rtck", none, driven),
TEGRA_MAP_MUXCONF("gpv", "pcie", none, tristate),
TEGRA_MAP_MUXCONF("hdint", "hdmi", na, tristate),
TEGRA_MAP_MUXCONF("i2cp", "i2cp", none, driven),
TEGRA_MAP_MUXCONF("irrx", "uartb", none, driven),
TEGRA_MAP_MUXCONF("irtx", "uartb", none, driven),
TEGRA_MAP_MUXCONF("kbca", "kbc", up, driven),
TEGRA_MAP_MUXCONF("kbcb", "kbc", up, driven),
TEGRA_MAP_MUXCONF("kbcc", "kbc", up, driven),
TEGRA_MAP_MUXCONF("kbcd", "kbc", up, driven),
TEGRA_MAP_MUXCONF("kbce", "kbc", up, driven),
TEGRA_MAP_MUXCONF("kbcf", "kbc", up, driven),
TEGRA_MAP_MUXCONF("lcsn", "rsvd4", na, tristate),
TEGRA_MAP_MUXCONF("ld0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld1", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld10", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld11", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld12", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld13", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld14", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld15", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld16", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld17", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld2", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld3", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld4", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld5", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld6", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld7", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld8", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ld9", "displaya", na, driven),
TEGRA_MAP_MUXCONF("ldc", "rsvd4", na, tristate),
TEGRA_MAP_MUXCONF("ldi", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhp0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhp1", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhp2", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lhs", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lm0", "rsvd4", na, driven),
TEGRA_MAP_MUXCONF("lm1", "crt", na, tristate),
TEGRA_MAP_MUXCONF("lpp", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lpw1", "rsvd4", na, tristate),
TEGRA_MAP_MUXCONF("lsc0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lsdi", "rsvd4", na, tristate),
TEGRA_MAP_MUXCONF("lspi", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lvp0", "rsvd4", na, tristate),
TEGRA_MAP_MUXCONF("lvp1", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lvs", "displaya", na, driven),
TEGRA_MAP_MUXCONF("owc", "rsvd2", none, tristate),
TEGRA_MAP_MUXCONF("pmc", "pwr_on", na, driven),
TEGRA_MAP_MUXCONF("pta", "hdmi", none, driven),
TEGRA_MAP_MUXCONF("rm", "i2c1", none, driven),
TEGRA_MAP_MUXCONF("sdb", "sdio3", na, driven),
TEGRA_MAP_MUXCONF("sdc", "sdio3", none, driven),
TEGRA_MAP_MUXCONF("sdd", "sdio3", none, driven),
TEGRA_MAP_MUXCONF("sdio1", "sdio1", up, driven),
TEGRA_MAP_MUXCONF("slxa", "pcie", up, tristate),
TEGRA_MAP_MUXCONF("slxd", "spdif", none, driven),
TEGRA_MAP_MUXCONF("slxk", "pcie", none, driven),
TEGRA_MAP_MUXCONF("spdi", "rsvd2", none, driven),
TEGRA_MAP_MUXCONF("spdo", "rsvd2", none, driven),
TEGRA_MAP_MUXCONF("spib", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("spid", "spi1", none, tristate),
TEGRA_MAP_MUXCONF("spie", "spi1", none, tristate),
TEGRA_MAP_MUXCONF("spif", "spi1", down, tristate),
TEGRA_MAP_MUXCONF("spih", "spi2_alt", up, tristate),
TEGRA_MAP_MUXCONF("uaa", "ulpi", up, driven),
TEGRA_MAP_MUXCONF("uab", "ulpi", up, driven),
TEGRA_MAP_MUXCONF("uac", "rsvd2", none, driven),
TEGRA_MAP_MUXCONF("uad", "irda", none, driven),
TEGRA_MAP_MUXCONF("uca", "uartc", none, driven),
TEGRA_MAP_MUXCONF("ucb", "uartc", none, driven),
TEGRA_MAP_MUXCONF("uda", "ulpi", none, driven),
TEGRA_MAP_CONF("ck32", none, na),
TEGRA_MAP_CONF("ddrc", none, na),
TEGRA_MAP_CONF("pmca", none, na),
TEGRA_MAP_CONF("pmcb", none, na),
TEGRA_MAP_CONF("pmcc", none, na),
TEGRA_MAP_CONF("pmcd", none, na),
TEGRA_MAP_CONF("pmce", none, na),
TEGRA_MAP_CONF("xm2c", none, na),
TEGRA_MAP_CONF("xm2d", none, na),
TEGRA_MAP_CONF("ls", up, na),
TEGRA_MAP_CONF("lc", up, na),
TEGRA_MAP_CONF("ld17_0", down, na),
TEGRA_MAP_CONF("ld19_18", down, na),
TEGRA_MAP_CONF("ld21_20", down, na),
TEGRA_MAP_CONF("ld23_22", down, na),
};
static struct pinctrl_map seaboard_map[] = {
TEGRA_MAP_MUXCONF("ddc", "rsvd2", none, tristate),
TEGRA_MAP_MUXCONF("gmd", "sflash", none, driven),
TEGRA_MAP_MUXCONF("lpw0", "hdmi", na, driven),
TEGRA_MAP_MUXCONF("lpw2", "hdmi", na, driven),
TEGRA_MAP_MUXCONF("lsc1", "hdmi", na, tristate),
TEGRA_MAP_MUXCONF("lsck", "hdmi", na, tristate),
TEGRA_MAP_MUXCONF("lsda", "hdmi", na, tristate),
TEGRA_MAP_MUXCONF("slxc", "spdif", none, tristate),
TEGRA_MAP_MUXCONF("spia", "gmi", up, tristate),
TEGRA_MAP_MUXCONF("spic", "gmi", up, driven),
TEGRA_MAP_MUXCONF("spig", "spi2_alt", up, tristate),
PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(PINMUX_DEV, "drive_sdio1", seaboard_pincfg_drive_sdio1),
};
static struct pinctrl_map ventana_map[] = {
TEGRA_MAP_MUXCONF("ddc", "rsvd2", none, driven),
TEGRA_MAP_MUXCONF("gmd", "sflash", none, tristate),
TEGRA_MAP_MUXCONF("lpw0", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lpw2", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lsc1", "displaya", na, driven),
TEGRA_MAP_MUXCONF("lsck", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("lsda", "displaya", na, tristate),
TEGRA_MAP_MUXCONF("slxc", "sdio3", none, driven),
TEGRA_MAP_MUXCONF("spia", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("spic", "gmi", none, tristate),
TEGRA_MAP_MUXCONF("spig", "spi2_alt", none, tristate),
};
static struct tegra_board_pinmux_conf common_conf = {
.maps = common_map,
.map_count = ARRAY_SIZE(common_map),
};
static struct tegra_board_pinmux_conf seaboard_conf = {
.maps = seaboard_map,
.map_count = ARRAY_SIZE(seaboard_map),
};
static struct tegra_board_pinmux_conf ventana_conf = {
.maps = ventana_map,
.map_count = ARRAY_SIZE(ventana_map),
};
void seaboard_pinmux_init(void)
{
tegra_board_pinmux_init(&common_conf, &seaboard_conf);
}
void ventana_pinmux_init(void)
{
tegra_board_pinmux_init(&common_conf, &ventana_conf);
}

View File

@ -1,306 +0,0 @@
/*
* Copyright (c) 2010, 2011 NVIDIA Corporation.
* Copyright (C) 2010, 2011 Google, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/of_serial.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/platform_data/tegra_usb.h>
#include <sound/wm8903.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
#include <mach/sdhci.h>
#include <mach/tegra_wm8903_pdata.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
#include "board.h"
#include "board-seaboard.h"
#include "clock.h"
#include "devices.h"
#include "gpio-names.h"
static struct plat_serial8250_port debug_uart_platform_data[] = {
{
/* Memory and IRQ filled in before registration */
.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
.type = PORT_TEGRA,
.handle_break = tegra_serial_handle_break,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 216000000,
}, {
.flags = 0,
}
};
static struct platform_device debug_uart = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = debug_uart_platform_data,
},
};
static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
/* name parent rate enabled */
{ "uartb", "pll_p", 216000000, true},
{ "uartd", "pll_p", 216000000, true},
{ "pll_a", "pll_p_out1", 56448000, true },
{ "pll_a_out0", "pll_a", 11289600, true },
{ "cdev1", NULL, 0, true },
{ "i2s1", "pll_a_out0", 11289600, false},
{ "usbd", "clk_m", 12000000, true},
{ "usb3", "clk_m", 12000000, true},
{ NULL, NULL, 0, 0},
};
static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
{
.code = SW_LID,
.gpio = TEGRA_GPIO_LIDSWITCH,
.active_low = 0,
.desc = "Lid",
.type = EV_SW,
.wakeup = 1,
.debounce_interval = 1,
},
{
.code = KEY_POWER,
.gpio = TEGRA_GPIO_POWERKEY,
.active_low = 1,
.desc = "Power",
.type = EV_KEY,
.wakeup = 1,
},
};
static struct gpio_keys_platform_data seaboard_gpio_keys = {
.buttons = seaboard_gpio_keys_buttons,
.nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons),
};
static struct platform_device seaboard_gpio_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &seaboard_gpio_keys,
}
};
static struct tegra_sdhci_platform_data sdhci_pdata1 = {
.cd_gpio = -1,
.wp_gpio = -1,
.power_gpio = -1,
};
static struct tegra_sdhci_platform_data sdhci_pdata3 = {
.cd_gpio = TEGRA_GPIO_SD2_CD,
.wp_gpio = TEGRA_GPIO_SD2_WP,
.power_gpio = TEGRA_GPIO_SD2_POWER,
};
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
.cd_gpio = -1,
.wp_gpio = -1,
.power_gpio = -1,
.is_8bit = 1,
};
static struct tegra_wm8903_platform_data seaboard_audio_pdata = {
.gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
.gpio_hp_det = TEGRA_GPIO_HP_DET,
.gpio_hp_mute = -1,
.gpio_int_mic_en = -1,
.gpio_ext_mic_en = -1,
};
static struct platform_device seaboard_audio_device = {
.name = "tegra-snd-wm8903",
.id = 0,
.dev = {
.platform_data = &seaboard_audio_pdata,
},
};
static struct platform_device *seaboard_devices[] __initdata = {
&debug_uart,
&tegra_pmu_device,
&tegra_sdhci_device4,
&tegra_sdhci_device3,
&tegra_sdhci_device1,
&seaboard_gpio_keys_device,
&tegra_i2s_device1,
&tegra_das_device,
&seaboard_audio_device,
};
static struct i2c_board_info __initdata isl29018_device = {
I2C_BOARD_INFO("isl29018", 0x44),
};
static struct i2c_board_info __initdata adt7461_device = {
I2C_BOARD_INFO("adt7461", 0x4c),
};
static struct wm8903_platform_data wm8903_pdata = {
.irq_active_low = 0,
.micdet_cfg = 0,
.micdet_delay = 100,
.gpio_base = SEABOARD_GPIO_WM8903(0),
.gpio_cfg = {
0,
0,
WM8903_GPIO_CONFIG_ZERO,
0,
0,
},
};
static struct i2c_board_info __initdata wm8903_device = {
I2C_BOARD_INFO("wm8903", 0x1a),
.platform_data = &wm8903_pdata,
};
static int seaboard_ehci_init(void)
{
struct tegra_ehci_platform_data *pdata;
pdata = tegra_ehci1_device.dev.platform_data;
pdata->vbus_gpio = TEGRA_GPIO_USB1;
platform_device_register(&tegra_ehci1_device);
platform_device_register(&tegra_ehci3_device);
return 0;
}
static void __init seaboard_i2c_init(void)
{
isl29018_device.irq = gpio_to_irq(TEGRA_GPIO_ISL29018_IRQ);
i2c_register_board_info(0, &isl29018_device, 1);
wm8903_device.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
i2c_register_board_info(0, &wm8903_device, 1);
i2c_register_board_info(3, &adt7461_device, 1);
platform_device_register(&tegra_i2c_device1);
platform_device_register(&tegra_i2c_device2);
platform_device_register(&tegra_i2c_device3);
platform_device_register(&tegra_i2c_device4);
}
static void __init seaboard_common_init(void)
{
seaboard_pinmux_init();
tegra_clk_init_from_table(seaboard_clk_init_table);
tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3;
tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices));
seaboard_ehci_init();
}
static void __init tegra_seaboard_init(void)
{
/* Seaboard uses UARTD for the debug port. */
debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE);
debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
debug_uart_platform_data[0].irq = INT_UARTD;
seaboard_common_init();
seaboard_i2c_init();
}
static void __init tegra_kaen_init(void)
{
/* Kaen uses UARTB for the debug port. */
debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
debug_uart_platform_data[0].irq = INT_UARTB;
seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE;
seaboard_common_init();
seaboard_i2c_init();
}
static void __init tegra_wario_init(void)
{
/* Wario uses UARTB for the debug port. */
debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
debug_uart_platform_data[0].irq = INT_UARTB;
seaboard_common_init();
seaboard_i2c_init();
}
MACHINE_START(SEABOARD, "seaboard")
.atag_offset = 0x100,
.map_io = tegra_map_common_io,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_seaboard_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END
MACHINE_START(KAEN, "kaen")
.atag_offset = 0x100,
.map_io = tegra_map_common_io,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_kaen_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END
MACHINE_START(WARIO, "wario")
.atag_offset = 0x100,
.map_io = tegra_map_common_io,
.init_early = tegra20_init_early,
.init_irq = tegra_init_irq,
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_wario_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END

View File

@ -1,47 +0,0 @@
/*
* arch/arm/mach-tegra/board-seaboard.h
*
* Copyright (C) 2010 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef _MACH_TEGRA_BOARD_SEABOARD_H
#define _MACH_TEGRA_BOARD_SEABOARD_H
#include <mach/gpio-tegra.h>
#define SEABOARD_GPIO_TPS6586X(_x_) (TEGRA_NR_GPIOS + (_x_))
#define SEABOARD_GPIO_WM8903(_x_) (SEABOARD_GPIO_TPS6586X(4) + (_x_))
#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6
#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7
#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0
#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
#define TEGRA_GPIO_BACKLIGHT TEGRA_GPIO_PD4
#define TEGRA_GPIO_LVDS_SHUTDOWN TEGRA_GPIO_PB2
#define TEGRA_GPIO_BACKLIGHT_PWM TEGRA_GPIO_PU5
#define TEGRA_GPIO_BACKLIGHT_VDD TEGRA_GPIO_PW0
#define TEGRA_GPIO_EN_VDD_PNL TEGRA_GPIO_PC6
#define TEGRA_GPIO_MAGNETOMETER TEGRA_GPIO_PN5
#define TEGRA_GPIO_ISL29018_IRQ TEGRA_GPIO_PZ2
#define TEGRA_GPIO_AC_ONLINE TEGRA_GPIO_PV3
#define TEGRA_GPIO_WWAN_PWR SEABOARD_GPIO_TPS6586X(2)
#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3
#define TEGRA_GPIO_SPKR_EN SEABOARD_GPIO_WM8903(2)
#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PX1
#define TEGRA_GPIO_KAEN_HP_MUTE TEGRA_GPIO_PA5
void seaboard_pinmux_init(void);
#endif

View File

@ -46,5 +46,14 @@ int __init tegra_powergate_debugfs_init(void);
static inline int tegra_powergate_debugfs_init(void) { return 0; }
#endif
int __init harmony_regulator_init(void);
#ifdef CONFIG_TEGRA_PCI
int __init harmony_pcie_init(void);
#else
static inline int harmony_pcie_init(void) { return 0; }
#endif
void __init tegra_paz00_wifikill_init(void);
extern struct sys_timer tegra_timer;
#endif

View File

@ -27,9 +27,9 @@
#include <linux/cpuidle.h>
#include <linux/hrtimer.h>
#include <mach/iomap.h>
#include <asm/proc-fns.h>
extern void tegra_cpu_wfi(void);
#include <mach/iomap.h>
static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index);
@ -64,7 +64,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
enter = ktime_get();
tegra_cpu_wfi();
cpu_do_idle();
exit = ktime_sub(ktime_get(), enter);
us = ktime_to_us(exit);

View File

@ -62,32 +62,3 @@
movw \reg, #:lower16:\val
movt \reg, #:upper16:\val
.endm
/*
* tegra_cpu_wfi
*
* puts current CPU in clock-gated wfi using the flow controller
*
* corrupts r0-r3
* must be called with MMU on
*/
ENTRY(tegra_cpu_wfi)
cpu_id r0
cpu_to_halt_reg r1, r0
cpu_to_csr_reg r2, r0
mov32 r0, TEGRA_FLOW_CTRL_VIRT
mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
str r3, [r0, r2] @ clear event & interrupt status
mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME
str r3, [r0, r1] @ put flow controller in wait irq mode
dsb
wfi
mov r3, #0
str r3, [r0, r1] @ clear flow controller halt status
mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
str r3, [r0, r2] @ clear event & interrupt status
dsb
mov pc, lr
ENDPROC(tegra_cpu_wfi)

View File

@ -264,11 +264,6 @@ static int __devinit tegra_ahb_probe(struct platform_device *pdev)
return 0;
}
static int __devexit tegra_ahb_remove(struct platform_device *pdev)
{
return 0;
}
static const struct of_device_id tegra_ahb_of_match[] __devinitconst = {
{ .compatible = "nvidia,tegra30-ahb", },
{ .compatible = "nvidia,tegra20-ahb", },
@ -277,7 +272,6 @@ static const struct of_device_id tegra_ahb_of_match[] __devinitconst = {
static struct platform_driver tegra_ahb_driver = {
.probe = tegra_ahb_probe,
.remove = __devexit_p(tegra_ahb_remove),
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,

View File

@ -223,6 +223,7 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata(
{
struct tegra_sdhci_platform_data *plat;
struct device_node *np = pdev->dev.of_node;
u32 bus_width;
if (!np)
return NULL;
@ -236,7 +237,9 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata(
plat->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
plat->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
plat->power_gpio = of_get_named_gpio(np, "power-gpios", 0);
if (of_find_property(np, "support-8bit", NULL))
if (of_property_read_u32(np, "bus-width", &bus_width) == 0 &&
bus_width == 8)
plat->is_8bit = 1;
return plat;

View File

@ -58,17 +58,9 @@ config SND_SOC_TEGRA_WM8753
Say Y or M here if you want to add support for SoC audio on Tegra
boards using the WM8753 codec, such as Whistler.
config MACH_HAS_SND_SOC_TEGRA_WM8903
bool
help
Machines that use the SND_SOC_TEGRA_WM8903 driver should select
this config option, in order to allow the user to enable
SND_SOC_TEGRA_WM8903.
config SND_SOC_TEGRA_WM8903
tristate "SoC Audio support for Tegra boards using a WM8903 codec"
depends on SND_SOC_TEGRA && I2C
depends on MACH_HAS_SND_SOC_TEGRA_WM8903
select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC
select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC
select SND_SOC_WM8903
@ -79,7 +71,7 @@ config SND_SOC_TEGRA_WM8903
config SND_SOC_TEGRA_TRIMSLICE
tristate "SoC Audio support for TrimSlice board"
depends on SND_SOC_TEGRA && MACH_TRIMSLICE && I2C
depends on SND_SOC_TEGRA && I2C
select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC
select SND_SOC_TLV320AIC23
help