mirror of https://gitee.com/openkylin/linux.git
arm64: dts: mt2712: use non-empty ranges for usb-phy
Use non-empty ranges for usb-phy to make the layout of its registers clearer; Replace deprecated compatible by generic Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -703,30 +703,31 @@ usb_host0: xhci@11270000 {
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};
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};
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u3phy0: usb-phy@11290000 {
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u3phy0: usb-phy@11290000 {
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compatible = "mediatek,mt2712-u3phy";
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compatible = "mediatek,mt2712-tphy",
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#address-cells = <2>;
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"mediatek,generic-tphy-v2";
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#size-cells = <2>;
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#address-cells = <1>;
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ranges;
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#size-cells = <1>;
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ranges = <0 0 0x11290000 0x9000>;
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status = "okay";
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status = "okay";
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u2port0: usb-phy@11290000 {
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u2port0: usb-phy@0 {
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reg = <0 0x11290000 0 0x700>;
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reg = <0x0 0x700>;
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clocks = <&clk26m>;
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clocks = <&clk26m>;
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clock-names = "ref";
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clock-names = "ref";
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#phy-cells = <1>;
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#phy-cells = <1>;
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status = "okay";
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status = "okay";
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};
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};
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u2port1: usb-phy@11298000 {
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u2port1: usb-phy@8000 {
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reg = <0 0x11298000 0 0x700>;
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reg = <0x8000 0x700>;
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clocks = <&clk26m>;
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clocks = <&clk26m>;
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clock-names = "ref";
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clock-names = "ref";
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#phy-cells = <1>;
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#phy-cells = <1>;
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status = "okay";
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status = "okay";
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};
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};
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u3port0: usb-phy@11298700 {
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u3port0: usb-phy@8700 {
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reg = <0 0x11298700 0 0x900>;
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reg = <0x8700 0x900>;
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clocks = <&clk26m>;
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clocks = <&clk26m>;
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clock-names = "ref";
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clock-names = "ref";
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#phy-cells = <1>;
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#phy-cells = <1>;
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@ -766,30 +767,31 @@ usb_host1: xhci@112c0000 {
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};
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};
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u3phy1: usb-phy@112e0000 {
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u3phy1: usb-phy@112e0000 {
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compatible = "mediatek,mt2712-u3phy";
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compatible = "mediatek,mt2712-tphy",
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#address-cells = <2>;
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"mediatek,generic-tphy-v2";
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#size-cells = <2>;
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#address-cells = <1>;
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ranges;
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#size-cells = <1>;
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ranges = <0 0 0x112e0000 0x9000>;
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status = "okay";
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status = "okay";
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u2port2: usb-phy@112e0000 {
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u2port2: usb-phy@0 {
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reg = <0 0x112e0000 0 0x700>;
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reg = <0x0 0x700>;
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clocks = <&clk26m>;
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clocks = <&clk26m>;
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clock-names = "ref";
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clock-names = "ref";
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#phy-cells = <1>;
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#phy-cells = <1>;
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status = "okay";
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status = "okay";
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};
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};
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u2port3: usb-phy@112e8000 {
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u2port3: usb-phy@8000 {
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reg = <0 0x112e8000 0 0x700>;
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reg = <0x8000 0x700>;
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clocks = <&clk26m>;
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clocks = <&clk26m>;
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clock-names = "ref";
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clock-names = "ref";
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#phy-cells = <1>;
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#phy-cells = <1>;
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status = "okay";
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status = "okay";
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};
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};
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u3port1: usb-phy@112e8700 {
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u3port1: usb-phy@8700 {
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reg = <0 0x112e8700 0 0x900>;
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reg = <0x8700 0x900>;
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clocks = <&clk26m>;
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clocks = <&clk26m>;
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clock-names = "ref";
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clock-names = "ref";
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#phy-cells = <1>;
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#phy-cells = <1>;
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