mirror of https://gitee.com/openkylin/linux.git
Qualcomm Device Tree Changes for v5.1
* Fixup GIC IRQ flags and GSBI state on MSM8660 * Add USB OTG, gpio ranges, and Wifi support on MSM8974 Hammerhead * Remove skeleton.dtsi on IPQ4019 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcV5CEAAoJEFKiBbHx2RXVXysQAK08L4mNPGVLt+NkHVr9kLcD CUq5emEizYWs1wdA4H+2Zzf/EEMAoGHLI0uX3WnP55fPTbLhVBVVIlvv5+J9KF9T Y37LF4mMho7JvmDUfq9t4brx9sosduEVpbLyQcmR+avWWbSVjmgajPCyBTOgR/0C 2wUnl0mKDSsZO8fqNiQd8AkeXfkBSDFCYOq6jn2MZ6Aop93Lg7GqZ4/hWp/WRA8Z 9AhgGLNF02O4mIyfZI8k9tf8CYjHNlm3ceIDj1uRBfMtyhLQZDoAWc+zVXQ2njbW 5lLMPdbqZzepNU9ou/4Z4DeVKwAt0EnaOcDiMi7JJ3o8rtQXI9UL0QnKJK1Rcj7K 82XKP+lbzB2/JI62PSk7kT+bQ1EmmJn19wRcjBtP4L+gCdH0kq2QopVEVkhUU7pg y5cwHKLtKtYlXeXO27h0amYY+xy/MgMfgJMAhxsn2hj+U3N7DJKYSh5nfWpVU2BP ztobWTvCvnxPTGFXI9Txl00KVgy5Og2pWaMzkge3yAbesqsPNjJamk+BGn8qL75X ViBnHMmvH2RBgROLcHgJcjrkdeu5xNwps38xlb/5K9L4jT8wPAcal00y/qMv1saR A56zL+wtuHEOCqyULvKAzNzduVdEoQechCYueZTm+5M/pXkrkddIDcs6xUGvxtPX bw9AhstcXIl49QRKgeUg =0M2a -----END PGP SIGNATURE----- Merge tag 'qcom-dts-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt Qualcomm Device Tree Changes for v5.1 * Fixup GIC IRQ flags and GSBI state on MSM8660 * Add USB OTG, gpio ranges, and Wifi support on MSM8974 Hammerhead * Remove skeleton.dtsi on IPQ4019 * tag 'qcom-dts-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: ARM: dts: ipq4019: Remove skeleton.dtsi ARM: dts: qcom: msm8974-hammerhead: add USB OTG support ARM: dts: qcom: msm8974: add gpio-ranges ARM: dts: qcom: msm8974-hammerhead: add WiFi support ARM: dts: msm8660: Fix up GIC IRQ flags ARM: dts: msm8660: Mark two GSBI blocks "disabled" Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
f02635eaf5
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@ -20,6 +20,7 @@
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "Qualcomm Technologies, Inc. IPQ4019";
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compatible = "qcom,ipq4019";
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interrupt-parent = <&intc>;
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@ -138,6 +138,7 @@ gsbi6: gsbi@16500000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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status = "disabled";
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syscon-tcsr = <&tcsr>;
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@ -145,7 +146,7 @@ gsbi6_serial: serial@16540000 {
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compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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reg = <0x16540000 0x1000>,
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<0x16500000 0x1000>;
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interrupts = <GIC_SPI 156 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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@ -154,7 +155,7 @@ gsbi6_serial: serial@16540000 {
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gsbi6_i2c: i2c@16580000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x16580000 0x1000>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
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clock-names = "core", "iface";
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#address-cells = <1>;
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@ -172,6 +173,7 @@ gsbi7: gsbi@16600000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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status = "disabled";
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syscon-tcsr = <&tcsr>;
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@ -179,7 +181,7 @@ gsbi7_serial: serial@16640000 {
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compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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reg = <0x16640000 0x1000>,
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<0x16600000 0x1000>;
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interrupts = <GIC_SPI 158 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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@ -188,7 +190,7 @@ gsbi7_serial: serial@16640000 {
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gsbi7_i2c: i2c@16680000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x16680000 0x1000>;
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interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;
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clock-names = "core", "iface";
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#address-cells = <1>;
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@ -212,7 +214,7 @@ gsbi8: gsbi@19800000 {
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gsbi8_i2c: i2c@19880000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x19880000 0x1000>;
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interrupts = <GIC_SPI 161 IRQ_TYPE_NONE>;
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interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;
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clock-names = "core", "iface";
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#address-cells = <1>;
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@ -237,7 +239,7 @@ gsbi12_serial: serial@19c40000 {
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compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
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reg = <0x19c40000 0x1000>,
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<0x19c00000 0x1000>;
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interrupts = <0 195 IRQ_TYPE_NONE>;
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interrupts = <0 195 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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@ -246,7 +248,7 @@ gsbi12_serial: serial@19c40000 {
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gsbi12_i2c: i2c@19c80000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x19c80000 0x1000>;
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interrupts = <0 196 IRQ_TYPE_NONE>;
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interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GSBI12_QUP_CLK>, <&gcc GSBI12_H_CLK>;
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clock-names = "core", "iface";
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#address-cells = <1>;
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@ -220,6 +220,20 @@ l24 {
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};
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};
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};
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vreg_wlan: wlan-regulator {
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compatible = "regulator-fixed";
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regulator-name = "wl-reg";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&msmgpio 26 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&wlan_regulator_pin>;
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};
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};
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&soc {
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@ -242,6 +256,30 @@ cmd-data {
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};
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};
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sdhc2_pin_a: sdhc2-pin-active {
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clk {
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pins = "sdc2_clk";
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drive-strength = <6>;
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bias-disable;
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};
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cmd-data {
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pins = "sdc2_cmd", "sdc2_data";
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drive-strength = <6>;
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bias-pull-up;
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};
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};
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i2c1_pins: i2c1 {
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mux {
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pins = "gpio2", "gpio3";
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function = "blsp_i2c1";
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drive-strength = <2>;
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bias-disable;
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};
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};
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i2c3_pins: i2c3 {
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mux {
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pins = "gpio10", "gpio11";
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@ -283,6 +321,32 @@ sdhci@f9824900 {
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pinctrl-0 = <&sdhc1_pin_a>;
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};
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sdhci@f98a4900 {
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status = "ok";
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max-frequency = <100000000>;
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bus-width = <4>;
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non-removable;
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vmmc-supply = <&vreg_wlan>;
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vqmmc-supply = <&pm8941_s3>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdhc2_pin_a>;
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#address-cells = <1>;
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#size-cells = <0>;
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bcrmf@1 {
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compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";
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reg = <1>;
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brcm,drive-strength = <10>;
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pinctrl-names = "default";
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pinctrl-0 = <&wlan_sleep_clk_pin>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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input-name = "gpio-keys";
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@ -342,6 +406,24 @@ bmp280@76 {
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};
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};
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i2c@f9923000 {
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status = "ok";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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clock-frequency = <100000>;
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qcom,src-freq = <50000000>;
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charger: bq24192@6b {
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compatible = "ti,bq24192";
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reg = <0x6b>;
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interrupts-extended = <&spmi_bus 0 0xd5 0 IRQ_TYPE_EDGE_FALLING>;
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omit-battery-class;
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usb_otg_vbus: usb-otg-vbus { };
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};
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};
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i2c@f9925000 {
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status = "ok";
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pinctrl-names = "default";
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@ -359,6 +441,31 @@ avago_apds993@39 {
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amstaos,proximity-diodes = <0>;
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};
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};
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usb@f9a55000 {
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status = "ok";
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phys = <&usb_hs1_phy>;
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phy-select = <&tcsr 0xb000 0>;
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extcon = <&charger>, <&usb_id>;
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vbus-supply = <&usb_otg_vbus>;
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hnp-disable;
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srp-disable;
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adp-disable;
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ulpi {
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phy@a {
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status = "ok";
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v1p8-supply = <&pm8941_l6>;
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v3p3-supply = <&pm8941_l24>;
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qcom,init-seq = /bits/ 8 <0x1 0x64>;
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};
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};
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};
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};
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&spmi_bus {
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@ -371,6 +478,29 @@ gpio_keys_pin_a: gpio-keys-active {
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bias-pull-up;
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power-source = <PM8941_GPIO_S3>;
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};
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wlan_sleep_clk_pin: wl-sleep-clk {
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pins = "gpio16";
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function = "func2";
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output-high;
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power-source = <PM8941_GPIO_S3>;
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};
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wlan_regulator_pin: wl-reg-active {
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pins = "gpio17";
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function = "normal";
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bias-disable;
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power-source = <PM8941_GPIO_S3>;
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};
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otg {
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gpio-hog;
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gpios = <35 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "otg-gpio";
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};
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};
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};
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};
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@ -712,6 +712,17 @@ msmgpio: pinctrl@fd510000 {
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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};
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i2c@f9923000 {
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status = "disabled";
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compatible = "qcom,i2c-qup-v2.1.1";
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reg = <0xf9923000 0x1000>;
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interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
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clock-names = "core", "iface";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c@f9924000 {
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status = "disabled";
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compatible = "qcom,i2c-qup-v2.1.1";
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@ -63,6 +63,7 @@ pm8941_gpios: gpios@c000 {
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compatible = "qcom,pm8941-gpio", "qcom,spmi-gpio";
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reg = <0xc000>;
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gpio-controller;
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gpio-ranges = <&pm8941_gpios 0 0 36>;
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#gpio-cells = <2>;
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interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
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<0 0xc1 0 IRQ_TYPE_NONE>,
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