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drm/i915 fixes for v5.6-rc4: 

- downgrade gen7 back to aliasing-ppgtt to avoid GPU hangs
 - shrinker fix
 - pmu leak and double free fixes
 - gvt user after free and virtual display reset fixes
 - randconfig build fix
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Merge tag 'drm-intel-fixes-2020-02-27' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

drm/i915 fixes for v5.6-rc4:
- downgrade gen7 back to aliasing-ppgtt to avoid GPU hangs
- shrinker fix
- pmu leak and double free fixes
- gvt user after free and virtual display reset fixes
- randconfig build fix

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/874kvcsh00.fsf@intel.com
This commit is contained in:
Dave Airlie 2020-02-28 12:40:41 +10:00
parent e180af1970 8e9a400c70
commit f091bf3970
7 changed files with 46 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/Makefile
View File

@ -294,7 +294,7 @@ extra-$(CONFIG_DRM_I915_WERROR) += \
$(shell cd $(srctree)/$(src) && find * -name '*.h'))) $(shell cd $(srctree)/$(src) && find * -name '*.h')))
quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@) quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)
cmd_hdrtest = $(CC) $(c_flags) -S -o /dev/null -x c /dev/null -include $<; touch $@ cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; touch $@
$(obj)/%.hdrtest: $(src)/%.h FORCE $(obj)/%.hdrtest: $(src)/%.h FORCE
$(call if_changed_dep,hdrtest) $(call if_changed_dep,hdrtest)

4
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
View File

@ -256,8 +256,7 @@ unsigned long i915_gem_shrink_all(struct drm_i915_private *i915)
with_intel_runtime_pm(&i915->runtime_pm, wakeref) { with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
freed = i915_gem_shrink(i915, -1UL, NULL, freed = i915_gem_shrink(i915, -1UL, NULL,
I915_SHRINK_BOUND | I915_SHRINK_BOUND |
I915_SHRINK_UNBOUND | I915_SHRINK_UNBOUND);
I915_SHRINK_ACTIVE);
} }
return freed; return freed;
@ -336,7 +335,6 @@ i915_gem_shrinker_oom(struct notifier_block *nb, unsigned long event, void *ptr)
freed_pages = 0; freed_pages = 0;
with_intel_runtime_pm(&i915->runtime_pm, wakeref) with_intel_runtime_pm(&i915->runtime_pm, wakeref)
freed_pages += i915_gem_shrink(i915, -1UL, NULL, freed_pages += i915_gem_shrink(i915, -1UL, NULL,
I915_SHRINK_ACTIVE |
I915_SHRINK_BOUND | I915_SHRINK_BOUND |
I915_SHRINK_UNBOUND | I915_SHRINK_UNBOUND |
I915_SHRINK_WRITEBACK); I915_SHRINK_WRITEBACK);

2
drivers/gpu/drm/i915/gvt/dmabuf.c
View File

@ -151,12 +151,12 @@ static void dmabuf_gem_object_free(struct kref *kref)
dmabuf_obj = container_of(pos, dmabuf_obj = container_of(pos,
struct intel_vgpu_dmabuf_obj, list); struct intel_vgpu_dmabuf_obj, list);
if (dmabuf_obj == obj) { if (dmabuf_obj == obj) {
list_del(pos);
intel_gvt_hypervisor_put_vfio_device(vgpu); intel_gvt_hypervisor_put_vfio_device(vgpu);
idr_remove(&vgpu->object_idr, idr_remove(&vgpu->object_idr,
dmabuf_obj->dmabuf_id); dmabuf_obj->dmabuf_id);
kfree(dmabuf_obj->info); kfree(dmabuf_obj->info);
kfree(dmabuf_obj); kfree(dmabuf_obj);
list_del(pos);
break; break;
} }
} }

2
drivers/gpu/drm/i915/gvt/vgpu.c
View File

@ -560,9 +560,9 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
intel_vgpu_reset_mmio(vgpu, dmlr); intel_vgpu_reset_mmio(vgpu, dmlr);
populate_pvinfo_page(vgpu); populate_pvinfo_page(vgpu);
intel_vgpu_reset_display(vgpu);
if (dmlr) { if (dmlr) {
intel_vgpu_reset_display(vgpu);
intel_vgpu_reset_cfg_space(vgpu); intel_vgpu_reset_cfg_space(vgpu);
/* only reset the failsafe mode when dmlr reset */ /* only reset the failsafe mode when dmlr reset */
vgpu->failsafe = false; vgpu->failsafe = false;

4
drivers/gpu/drm/i915/i915_pci.c
View File

@ -437,7 +437,7 @@ static const struct intel_device_info snb_m_gt2_info = {
.has_rc6 = 1, \ .has_rc6 = 1, \
.has_rc6p = 1, \ .has_rc6p = 1, \
.has_rps = true, \ .has_rps = true, \
.ppgtt_type = INTEL_PPGTT_FULL, \ .ppgtt_type = INTEL_PPGTT_ALIASING, \
.ppgtt_size = 31, \ .ppgtt_size = 31, \
IVB_PIPE_OFFSETS, \ IVB_PIPE_OFFSETS, \
IVB_CURSOR_OFFSETS, \ IVB_CURSOR_OFFSETS, \
@ -494,7 +494,7 @@ static const struct intel_device_info vlv_info = {
.has_rps = true, .has_rps = true,
.display.has_gmch = 1, .display.has_gmch = 1,
.display.has_hotplug = 1, .display.has_hotplug = 1,
.ppgtt_type = INTEL_PPGTT_FULL, .ppgtt_type = INTEL_PPGTT_ALIASING,
.ppgtt_size = 31, .ppgtt_size = 31,
.has_snoop = true, .has_snoop = true,
.has_coherent_ggtt = false, .has_coherent_ggtt = false,

59
drivers/gpu/drm/i915/i915_pmu.c
View File

@ -822,11 +822,6 @@ static ssize_t i915_pmu_event_show(struct device *dev,
return sprintf(buf, "config=0x%lx\n", eattr->val); return sprintf(buf, "config=0x%lx\n", eattr->val);
} }
static struct attribute_group i915_pmu_events_attr_group = {
.name = "events",
/* Patch in attrs at runtime. */
};
static ssize_t static ssize_t
i915_pmu_get_attr_cpumask(struct device *dev, i915_pmu_get_attr_cpumask(struct device *dev,
struct device_attribute *attr, struct device_attribute *attr,
@ -846,13 +841,6 @@ static const struct attribute_group i915_pmu_cpumask_attr_group = {
.attrs = i915_cpumask_attrs, .attrs = i915_cpumask_attrs,
}; };
static const struct attribute_group *i915_pmu_attr_groups[] = {
&i915_pmu_format_attr_group,
&i915_pmu_events_attr_group,
&i915_pmu_cpumask_attr_group,
NULL
};
#define __event(__config, __name, __unit) \ #define __event(__config, __name, __unit) \
{ \ { \
.config = (__config), \ .config = (__config), \
@ -1026,23 +1014,23 @@ err:;
static void free_event_attributes(struct i915_pmu *pmu) static void free_event_attributes(struct i915_pmu *pmu)
{ {
struct attribute **attr_iter = i915_pmu_events_attr_group.attrs; struct attribute **attr_iter = pmu->events_attr_group.attrs;
for (; *attr_iter; attr_iter++) for (; *attr_iter; attr_iter++)
kfree((*attr_iter)->name); kfree((*attr_iter)->name);
kfree(i915_pmu_events_attr_group.attrs); kfree(pmu->events_attr_group.attrs);
kfree(pmu->i915_attr); kfree(pmu->i915_attr);
kfree(pmu->pmu_attr); kfree(pmu->pmu_attr);
i915_pmu_events_attr_group.attrs = NULL; pmu->events_attr_group.attrs = NULL;
pmu->i915_attr = NULL; pmu->i915_attr = NULL;
pmu->pmu_attr = NULL; pmu->pmu_attr = NULL;
} }
static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node) static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node)
{ {
struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), node); struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), cpuhp.node);
GEM_BUG_ON(!pmu->base.event_init); GEM_BUG_ON(!pmu->base.event_init);
@ -1055,7 +1043,7 @@ static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node)
static int i915_pmu_cpu_offline(unsigned int cpu, struct hlist_node *node) static int i915_pmu_cpu_offline(unsigned int cpu, struct hlist_node *node)
{ {
struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), node); struct i915_pmu *pmu = hlist_entry_safe(node, typeof(*pmu), cpuhp.node);
unsigned int target; unsigned int target;
GEM_BUG_ON(!pmu->base.event_init); GEM_BUG_ON(!pmu->base.event_init);
@ -1072,8 +1060,6 @@ static int i915_pmu_cpu_offline(unsigned int cpu, struct hlist_node *node)
return 0; return 0;
} }
static enum cpuhp_state cpuhp_slot = CPUHP_INVALID;
static int i915_pmu_register_cpuhp_state(struct i915_pmu *pmu) static int i915_pmu_register_cpuhp_state(struct i915_pmu *pmu)
{ {
enum cpuhp_state slot; enum cpuhp_state slot;
@ -1087,21 +1073,22 @@ static int i915_pmu_register_cpuhp_state(struct i915_pmu *pmu)
return ret; return ret;
slot = ret; slot = ret;
ret = cpuhp_state_add_instance(slot, &pmu->node); ret = cpuhp_state_add_instance(slot, &pmu->cpuhp.node);
if (ret) { if (ret) {
cpuhp_remove_multi_state(slot); cpuhp_remove_multi_state(slot);
return ret; return ret;
} }
cpuhp_slot = slot; pmu->cpuhp.slot = slot;
return 0; return 0;
} }
static void i915_pmu_unregister_cpuhp_state(struct i915_pmu *pmu) static void i915_pmu_unregister_cpuhp_state(struct i915_pmu *pmu)
{ {
WARN_ON(cpuhp_slot == CPUHP_INVALID); WARN_ON(pmu->cpuhp.slot == CPUHP_INVALID);
WARN_ON(cpuhp_state_remove_instance(cpuhp_slot, &pmu->node)); WARN_ON(cpuhp_state_remove_instance(pmu->cpuhp.slot, &pmu->cpuhp.node));
cpuhp_remove_multi_state(cpuhp_slot); cpuhp_remove_multi_state(pmu->cpuhp.slot);
pmu->cpuhp.slot = CPUHP_INVALID;
} }
static bool is_igp(struct drm_i915_private *i915) static bool is_igp(struct drm_i915_private *i915)
@ -1118,6 +1105,13 @@ static bool is_igp(struct drm_i915_private *i915)
void i915_pmu_register(struct drm_i915_private *i915) void i915_pmu_register(struct drm_i915_private *i915)
{ {
struct i915_pmu *pmu = &i915->pmu; struct i915_pmu *pmu = &i915->pmu;
const struct attribute_group *attr_groups[] = {
&i915_pmu_format_attr_group,
&pmu->events_attr_group,
&i915_pmu_cpumask_attr_group,
NULL
};
int ret = -ENOMEM; int ret = -ENOMEM;
if (INTEL_GEN(i915) <= 2) { if (INTEL_GEN(i915) <= 2) {
@ -1128,6 +1122,7 @@ void i915_pmu_register(struct drm_i915_private *i915)
spin_lock_init(&pmu->lock); spin_lock_init(&pmu->lock);
hrtimer_init(&pmu->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); hrtimer_init(&pmu->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
pmu->timer.function = i915_sample; pmu->timer.function = i915_sample;
pmu->cpuhp.slot = CPUHP_INVALID;
if (!is_igp(i915)) { if (!is_igp(i915)) {
pmu->name = kasprintf(GFP_KERNEL, pmu->name = kasprintf(GFP_KERNEL,
@ -1143,11 +1138,16 @@ void i915_pmu_register(struct drm_i915_private *i915)
if (!pmu->name) if (!pmu->name)
goto err; goto err;
i915_pmu_events_attr_group.attrs = create_event_attributes(pmu); pmu->events_attr_group.name = "events";
if (!i915_pmu_events_attr_group.attrs) pmu->events_attr_group.attrs = create_event_attributes(pmu);
if (!pmu->events_attr_group.attrs)
goto err_name; goto err_name;
pmu->base.attr_groups = i915_pmu_attr_groups; pmu->base.attr_groups = kmemdup(attr_groups, sizeof(attr_groups),
GFP_KERNEL);
if (!pmu->base.attr_groups)
goto err_attr;
pmu->base.task_ctx_nr = perf_invalid_context; pmu->base.task_ctx_nr = perf_invalid_context;
pmu->base.event_init = i915_pmu_event_init; pmu->base.event_init = i915_pmu_event_init;
pmu->base.add = i915_pmu_event_add; pmu->base.add = i915_pmu_event_add;
@ -1159,7 +1159,7 @@ void i915_pmu_register(struct drm_i915_private *i915)
ret = perf_pmu_register(&pmu->base, pmu->name, -1); ret = perf_pmu_register(&pmu->base, pmu->name, -1);
if (ret) if (ret)
goto err_attr; goto err_groups;
ret = i915_pmu_register_cpuhp_state(pmu); ret = i915_pmu_register_cpuhp_state(pmu);
if (ret) if (ret)
@ -1169,6 +1169,8 @@ void i915_pmu_register(struct drm_i915_private *i915)
err_unreg: err_unreg:
perf_pmu_unregister(&pmu->base); perf_pmu_unregister(&pmu->base);
err_groups:
kfree(pmu->base.attr_groups);
err_attr: err_attr:
pmu->base.event_init = NULL; pmu->base.event_init = NULL;
free_event_attributes(pmu); free_event_attributes(pmu);
@ -1194,6 +1196,7 @@ void i915_pmu_unregister(struct drm_i915_private *i915)
perf_pmu_unregister(&pmu->base); perf_pmu_unregister(&pmu->base);
pmu->base.event_init = NULL; pmu->base.event_init = NULL;
kfree(pmu->base.attr_groups);
if (!is_igp(i915)) if (!is_igp(i915))
kfree(pmu->name); kfree(pmu->name);
free_event_attributes(pmu); free_event_attributes(pmu);

11
drivers/gpu/drm/i915/i915_pmu.h
View File

@ -39,9 +39,12 @@ struct i915_pmu_sample {
struct i915_pmu { struct i915_pmu {
/** /**
* @node: List node for CPU hotplug handling. * @cpuhp: Struct used for CPU hotplug handling.
*/ */
struct hlist_node node; struct {
struct hlist_node node;
enum cpuhp_state slot;
} cpuhp;
/** /**
* @base: PMU base. * @base: PMU base.
*/ */
@ -104,6 +107,10 @@ struct i915_pmu {
* @sleep_last: Last time GT parked for RC6 estimation. * @sleep_last: Last time GT parked for RC6 estimation.
*/ */
ktime_t sleep_last; ktime_t sleep_last;
/**
* @events_attr_group: Device events attribute group.
*/
struct attribute_group events_attr_group;
/** /**
* @i915_attr: Memory block holding device attributes. * @i915_attr: Memory block holding device attributes.
*/ */