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ata: ahci-platform: add reset control support
Add support to get and control a list of resets for the device as optional and shared. These resets must be kept de-asserted until the device is enabled. This is specified as shared because some SoCs like UniPhier series have common reset controls with all ahci controller instances. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
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@ -30,6 +30,7 @@ compatible:
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Optional properties:
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- dma-coherent : Present if dma operations are coherent
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- clocks : a list of phandle + clock specifier pairs
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- resets : a list of phandle + reset specifier pairs
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- target-supply : regulator for SATA target power
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- phys : reference to the SATA PHY node
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- phy-names : must be "sata-phy"
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@ -350,6 +350,7 @@ struct ahci_host_priv {
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u32 em_msg_type; /* EM message type */
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bool got_runtime_pm; /* Did we do pm_runtime_get? */
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struct clk *clks[AHCI_MAX_CLKS]; /* Optional */
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struct reset_control *rsts; /* Optional */
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struct regulator **target_pwrs; /* Optional */
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/*
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* If platform uses PHYs. There is a 1:1 relation between the port number and
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@ -25,6 +25,7 @@
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#include <linux/phy/phy.h>
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#include <linux/pm_runtime.h>
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#include <linux/of_platform.h>
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#include <linux/reset.h>
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#include "ahci.h"
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static void ahci_host_stop(struct ata_host *host);
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@ -195,7 +196,8 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
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* following order:
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* 1) Regulator
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* 2) Clocks (through ahci_platform_enable_clks)
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* 3) Phys
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* 3) Resets
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* 4) Phys
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*
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* If resource enabling fails at any point the previous enabled resources
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* are disabled in reverse order.
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@ -215,12 +217,19 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
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if (rc)
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goto disable_regulator;
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rc = ahci_platform_enable_phys(hpriv);
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rc = reset_control_deassert(hpriv->rsts);
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if (rc)
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goto disable_clks;
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rc = ahci_platform_enable_phys(hpriv);
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if (rc)
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goto disable_resets;
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return 0;
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disable_resets:
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reset_control_assert(hpriv->rsts);
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disable_clks:
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ahci_platform_disable_clks(hpriv);
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@ -239,12 +248,15 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
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* following order:
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* 1) Phys
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* 2) Clocks (through ahci_platform_disable_clks)
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* 3) Regulator
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* 3) Resets
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* 4) Regulator
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*/
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void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
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{
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ahci_platform_disable_phys(hpriv);
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reset_control_assert(hpriv->rsts);
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ahci_platform_disable_clks(hpriv);
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ahci_platform_disable_regulators(hpriv);
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@ -393,6 +405,12 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev)
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hpriv->clks[i] = clk;
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}
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hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
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if (IS_ERR(hpriv->rsts)) {
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rc = PTR_ERR(hpriv->rsts);
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goto err_out;
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}
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hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
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/*
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