mirror of https://gitee.com/openkylin/linux.git
crypto: arm64 - revert NEON yield for fast AEAD implementations
As it turns out, checking the TIF_NEED_RESCHED flag after each iteration results in a significant performance regression (~10%) when running fast algorithms (i.e., ones that use special instructions and operate in the < 4 cycles per byte range) on in-order cores with comparatively slow memory accesses such as the Cortex-A53. Given the speed of these ciphers, and the fact that the page based nature of the AEAD scatterwalk API guarantees that the core NEON transform is never invoked with more than a single page's worth of input, we can estimate the worst case duration of any resulting scheduling blackout: on a 1 GHz Cortex-A53 running with 64k pages, processing a page's worth of input at 4 cycles per byte results in a delay of ~250 us, which is a reasonable upper bound. So let's remove the yield checks from the fused AES-CCM and AES-GCM routines entirely. This reverts commit7b67ae4d5c
and partially reverts commit7c50136a8a
. Fixes:7c50136a8a
("crypto: arm64/aes-ghash - yield NEON after every ...") Fixes:7b67ae4d5c
("crypto: arm64/aes-ccm - yield NEON after every ...") Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -19,33 +19,24 @@
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* u32 *macp, u8 const rk[], u32 rounds);
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*/
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ENTRY(ce_aes_ccm_auth_data)
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frame_push 7
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mov x19, x0
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mov x20, x1
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mov x21, x2
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mov x22, x3
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mov x23, x4
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mov x24, x5
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ldr w25, [x22] /* leftover from prev round? */
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ldr w8, [x3] /* leftover from prev round? */
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ld1 {v0.16b}, [x0] /* load mac */
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cbz w25, 1f
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sub w25, w25, #16
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cbz w8, 1f
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sub w8, w8, #16
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eor v1.16b, v1.16b, v1.16b
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0: ldrb w7, [x20], #1 /* get 1 byte of input */
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subs w21, w21, #1
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add w25, w25, #1
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0: ldrb w7, [x1], #1 /* get 1 byte of input */
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subs w2, w2, #1
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add w8, w8, #1
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ins v1.b[0], w7
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ext v1.16b, v1.16b, v1.16b, #1 /* rotate in the input bytes */
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beq 8f /* out of input? */
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cbnz w25, 0b
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cbnz w8, 0b
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eor v0.16b, v0.16b, v1.16b
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1: ld1 {v3.4s}, [x23] /* load first round key */
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prfm pldl1strm, [x20]
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cmp w24, #12 /* which key size? */
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add x6, x23, #16
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sub w7, w24, #2 /* modified # of rounds */
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1: ld1 {v3.4s}, [x4] /* load first round key */
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prfm pldl1strm, [x1]
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cmp w5, #12 /* which key size? */
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add x6, x4, #16
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sub w7, w5, #2 /* modified # of rounds */
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bmi 2f
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bne 5f
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mov v5.16b, v3.16b
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@ -64,43 +55,33 @@ ENTRY(ce_aes_ccm_auth_data)
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ld1 {v5.4s}, [x6], #16 /* load next round key */
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bpl 3b
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aese v0.16b, v4.16b
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subs w21, w21, #16 /* last data? */
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subs w2, w2, #16 /* last data? */
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eor v0.16b, v0.16b, v5.16b /* final round */
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bmi 6f
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ld1 {v1.16b}, [x20], #16 /* load next input block */
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ld1 {v1.16b}, [x1], #16 /* load next input block */
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eor v0.16b, v0.16b, v1.16b /* xor with mac */
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beq 6f
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if_will_cond_yield_neon
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st1 {v0.16b}, [x19] /* store mac */
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do_cond_yield_neon
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ld1 {v0.16b}, [x19] /* reload mac */
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endif_yield_neon
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b 1b
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6: st1 {v0.16b}, [x19] /* store mac */
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bne 1b
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6: st1 {v0.16b}, [x0] /* store mac */
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beq 10f
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adds w21, w21, #16
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adds w2, w2, #16
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beq 10f
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mov w25, w21
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7: ldrb w7, [x20], #1
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mov w8, w2
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7: ldrb w7, [x1], #1
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umov w6, v0.b[0]
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eor w6, w6, w7
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strb w6, [x19], #1
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subs w21, w21, #1
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strb w6, [x0], #1
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subs w2, w2, #1
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beq 10f
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ext v0.16b, v0.16b, v0.16b, #1 /* rotate out the mac bytes */
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b 7b
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8: mov w7, w25
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add w25, w25, #16
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8: mov w7, w8
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add w8, w8, #16
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9: ext v1.16b, v1.16b, v1.16b, #1
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adds w7, w7, #1
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bne 9b
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eor v0.16b, v0.16b, v1.16b
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st1 {v0.16b}, [x19]
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10: str w25, [x22]
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frame_pop
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st1 {v0.16b}, [x0]
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10: str w8, [x3]
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ret
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ENDPROC(ce_aes_ccm_auth_data)
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@ -145,29 +126,19 @@ ENTRY(ce_aes_ccm_final)
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ENDPROC(ce_aes_ccm_final)
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.macro aes_ccm_do_crypt,enc
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frame_push 8
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mov x19, x0
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mov x20, x1
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mov x21, x2
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mov x22, x3
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mov x23, x4
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mov x24, x5
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mov x25, x6
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ldr x26, [x25, #8] /* load lower ctr */
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ld1 {v0.16b}, [x24] /* load mac */
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CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */
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ldr x8, [x6, #8] /* load lower ctr */
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ld1 {v0.16b}, [x5] /* load mac */
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CPU_LE( rev x8, x8 ) /* keep swabbed ctr in reg */
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0: /* outer loop */
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ld1 {v1.8b}, [x25] /* load upper ctr */
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prfm pldl1strm, [x20]
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add x26, x26, #1
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rev x9, x26
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cmp w23, #12 /* which key size? */
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sub w7, w23, #2 /* get modified # of rounds */
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ld1 {v1.8b}, [x6] /* load upper ctr */
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prfm pldl1strm, [x1]
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add x8, x8, #1
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rev x9, x8
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cmp w4, #12 /* which key size? */
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sub w7, w4, #2 /* get modified # of rounds */
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ins v1.d[1], x9 /* no carry in lower ctr */
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ld1 {v3.4s}, [x22] /* load first round key */
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add x10, x22, #16
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ld1 {v3.4s}, [x3] /* load first round key */
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add x10, x3, #16
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bmi 1f
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bne 4f
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mov v5.16b, v3.16b
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@ -194,9 +165,9 @@ CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */
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bpl 2b
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aese v0.16b, v4.16b
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aese v1.16b, v4.16b
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subs w21, w21, #16
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bmi 7f /* partial block? */
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ld1 {v2.16b}, [x20], #16 /* load next input block */
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subs w2, w2, #16
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bmi 6f /* partial block? */
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ld1 {v2.16b}, [x1], #16 /* load next input block */
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.if \enc == 1
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eor v2.16b, v2.16b, v5.16b /* final round enc+mac */
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eor v1.16b, v1.16b, v2.16b /* xor with crypted ctr */
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@ -205,29 +176,18 @@ CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */
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eor v1.16b, v2.16b, v5.16b /* final round enc */
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.endif
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eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
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st1 {v1.16b}, [x19], #16 /* write output block */
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beq 5f
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st1 {v1.16b}, [x0], #16 /* write output block */
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bne 0b
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CPU_LE( rev x8, x8 )
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st1 {v0.16b}, [x5] /* store mac */
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str x8, [x6, #8] /* store lsb end of ctr (BE) */
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5: ret
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if_will_cond_yield_neon
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st1 {v0.16b}, [x24] /* store mac */
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do_cond_yield_neon
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ld1 {v0.16b}, [x24] /* reload mac */
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endif_yield_neon
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b 0b
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5:
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CPU_LE( rev x26, x26 )
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st1 {v0.16b}, [x24] /* store mac */
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str x26, [x25, #8] /* store lsb end of ctr (BE) */
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6: frame_pop
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ret
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7: eor v0.16b, v0.16b, v5.16b /* final round mac */
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6: eor v0.16b, v0.16b, v5.16b /* final round mac */
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eor v1.16b, v1.16b, v5.16b /* final round enc */
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st1 {v0.16b}, [x24] /* store mac */
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add w21, w21, #16 /* process partial tail block */
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8: ldrb w9, [x20], #1 /* get 1 byte of input */
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st1 {v0.16b}, [x5] /* store mac */
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add w2, w2, #16 /* process partial tail block */
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7: ldrb w9, [x1], #1 /* get 1 byte of input */
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umov w6, v1.b[0] /* get top crypted ctr byte */
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umov w7, v0.b[0] /* get top mac byte */
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.if \enc == 1
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@ -237,13 +197,13 @@ CPU_LE( rev x26, x26 )
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eor w9, w9, w6
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eor w7, w7, w9
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.endif
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strb w9, [x19], #1 /* store out byte */
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strb w7, [x24], #1 /* store mac byte */
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subs w21, w21, #1
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beq 6b
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strb w9, [x0], #1 /* store out byte */
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strb w7, [x5], #1 /* store mac byte */
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subs w2, w2, #1
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beq 5b
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ext v0.16b, v0.16b, v0.16b, #1 /* shift out mac byte */
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ext v1.16b, v1.16b, v1.16b, #1 /* shift out ctr byte */
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b 8b
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b 7b
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.endm
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/*
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@ -322,55 +322,41 @@ ENDPROC(pmull_ghash_update_p8)
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.endm
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.macro pmull_gcm_do_crypt, enc
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frame_push 10
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ld1 {SHASH.2d}, [x4]
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ld1 {XL.2d}, [x1]
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ldr x8, [x5, #8] // load lower counter
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mov x19, x0
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mov x20, x1
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mov x21, x2
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mov x22, x3
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mov x23, x4
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mov x24, x5
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mov x25, x6
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mov x26, x7
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.if \enc == 1
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ldr x27, [sp, #96] // first stacked arg
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.endif
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ldr x28, [x24, #8] // load lower counter
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CPU_LE( rev x28, x28 )
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0: mov x0, x25
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load_round_keys w26, x0
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ld1 {SHASH.2d}, [x23]
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ld1 {XL.2d}, [x20]
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load_round_keys w7, x6
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movi MASK.16b, #0xe1
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ext SHASH2.16b, SHASH.16b, SHASH.16b, #8
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CPU_LE( rev x8, x8 )
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shl MASK.2d, MASK.2d, #57
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eor SHASH2.16b, SHASH2.16b, SHASH.16b
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.if \enc == 1
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ld1 {KS.16b}, [x27]
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ldr x10, [sp]
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ld1 {KS.16b}, [x10]
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.endif
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1: ld1 {CTR.8b}, [x24] // load upper counter
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ld1 {INP.16b}, [x22], #16
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rev x9, x28
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add x28, x28, #1
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sub w19, w19, #1
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0: ld1 {CTR.8b}, [x5] // load upper counter
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ld1 {INP.16b}, [x3], #16
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rev x9, x8
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add x8, x8, #1
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sub w0, w0, #1
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ins CTR.d[1], x9 // set lower counter
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.if \enc == 1
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eor INP.16b, INP.16b, KS.16b // encrypt input
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st1 {INP.16b}, [x21], #16
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st1 {INP.16b}, [x2], #16
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.endif
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rev64 T1.16b, INP.16b
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cmp w26, #12
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b.ge 4f // AES-192/256?
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cmp w7, #12
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b.ge 2f // AES-192/256?
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2: enc_round CTR, v21
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1: enc_round CTR, v21
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ext T2.16b, XL.16b, XL.16b, #8
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ext IN1.16b, T1.16b, T1.16b, #8
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.if \enc == 0
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eor INP.16b, INP.16b, KS.16b
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st1 {INP.16b}, [x21], #16
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st1 {INP.16b}, [x2], #16
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.endif
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cbz w19, 3f
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cbnz w0, 0b
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CPU_LE( rev x8, x8 )
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st1 {XL.2d}, [x1]
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str x8, [x5, #8] // store lower counter
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if_will_cond_yield_neon
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st1 {XL.2d}, [x20]
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.if \enc == 1
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st1 {KS.16b}, [x27]
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.endif
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do_cond_yield_neon
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b 0b
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endif_yield_neon
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b 1b
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3: st1 {XL.2d}, [x20]
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.if \enc == 1
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st1 {KS.16b}, [x27]
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st1 {KS.16b}, [x10]
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.endif
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CPU_LE( rev x28, x28 )
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str x28, [x24, #8] // store lower counter
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frame_pop
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ret
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4: b.eq 5f // AES-192?
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2: b.eq 3f // AES-192?
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enc_round CTR, v17
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enc_round CTR, v18
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5: enc_round CTR, v19
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3: enc_round CTR, v19
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enc_round CTR, v20
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b 2b
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b 1b
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.endm
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/*
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