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ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio 

On Sabre Lite usdhc4 is a micro sd slot, which has no
write protect.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Troy Kisky 2013-12-12 18:49:07 -07:00 committed by Shawn Guo
parent da08d27fcd
commit f17e2a31c2
1 changed files with 0 additions and 2 deletions
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2
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
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@ -115,7 +115,6 @@ imx6q-sabrelite {
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
@ -285,7 +284,6 @@ &usdhc4 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>; pinctrl-0 = <&pinctrl_usdhc4>;
cd-gpios = <&gpio2 6 0>; cd-gpios = <&gpio2 6 0>;
wp-gpios = <&gpio2 7 0>;
vmmc-supply = <&reg_3p3v>; vmmc-supply = <&reg_3p3v>;
status = "okay"; status = "okay";
}; };