mirror of https://gitee.com/openkylin/linux.git
drm/nv50: add new accelerated bo move funtion
Hopefully this one will be better able to cope with moving tiled buffers around without getting them all scrambled as a result. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
4295f188e8
commit
f1ab0cc9ba
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@ -478,10 +478,12 @@ nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
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}
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static inline uint32_t
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nouveau_bo_mem_ctxdma(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
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struct ttm_mem_reg *mem)
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nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
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struct nouveau_channel *chan, struct ttm_mem_reg *mem)
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{
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if (chan == nouveau_bdev(nvbo->bo.bdev)->channel) {
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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if (nvbo->no_vm) {
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if (mem->mem_type == TTM_PL_TT)
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return NvDmaGART;
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return NvDmaVRAM;
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@ -493,86 +495,181 @@ nouveau_bo_mem_ctxdma(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
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}
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static int
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nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
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bool no_wait_reserve, bool no_wait_gpu,
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struct ttm_mem_reg *new_mem)
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nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
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struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
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{
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
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struct ttm_mem_reg *old_mem = &bo->mem;
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struct nouveau_channel *chan;
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uint64_t src_offset, dst_offset;
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uint32_t page_count;
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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u64 length = (new_mem->num_pages << PAGE_SHIFT);
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u64 src_offset, dst_offset;
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int ret;
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chan = nvbo->channel;
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if (!chan || nvbo->tile_flags || nvbo->no_vm)
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chan = dev_priv->channel;
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src_offset = old_mem->mm_node->start << PAGE_SHIFT;
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dst_offset = new_mem->mm_node->start << PAGE_SHIFT;
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if (chan != dev_priv->channel) {
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if (old_mem->mem_type == TTM_PL_TT)
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src_offset += dev_priv->vm_gart_base;
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else
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if (!nvbo->no_vm) {
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if (old_mem->mem_type == TTM_PL_VRAM)
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src_offset += dev_priv->vm_vram_base;
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if (new_mem->mem_type == TTM_PL_TT)
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dst_offset += dev_priv->vm_gart_base;
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else
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src_offset += dev_priv->vm_gart_base;
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if (new_mem->mem_type == TTM_PL_VRAM)
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dst_offset += dev_priv->vm_vram_base;
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else
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dst_offset += dev_priv->vm_gart_base;
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}
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ret = RING_SPACE(chan, 3);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
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OUT_RING(chan, nouveau_bo_mem_ctxdma(nvbo, chan, old_mem));
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OUT_RING(chan, nouveau_bo_mem_ctxdma(nvbo, chan, new_mem));
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if (dev_priv->card_type >= NV_50) {
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ret = RING_SPACE(chan, 4);
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BEGIN_RING(chan, NvSubM2MF, 0x0184, 2);
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OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));
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OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));
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while (length) {
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u32 amount, stride, height;
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amount = min(length, (u64)(16 * 1024 * 1024));
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stride = 64 * 4;
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height = amount / stride;
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if (new_mem->mem_type == TTM_PL_VRAM && nvbo->tile_flags) {
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ret = RING_SPACE(chan, 8);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, 0x0200, 7);
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OUT_RING (chan, 0);
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OUT_RING (chan, 0x20);
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OUT_RING (chan, stride);
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OUT_RING (chan, height);
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OUT_RING (chan, 1);
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OUT_RING (chan, 0);
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OUT_RING (chan, 0);
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} else {
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ret = RING_SPACE(chan, 2);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);
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OUT_RING (chan, 1);
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}
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if (old_mem->mem_type == TTM_PL_VRAM && nvbo->tile_flags) {
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ret = RING_SPACE(chan, 8);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, 0x021c, 7);
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OUT_RING (chan, 0);
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OUT_RING (chan, 0x20);
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OUT_RING (chan, stride);
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OUT_RING (chan, height);
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OUT_RING (chan, 1);
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OUT_RING (chan, 0);
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OUT_RING (chan, 0);
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} else {
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ret = RING_SPACE(chan, 2);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);
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OUT_RING (chan, 1);
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}
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ret = RING_SPACE(chan, 14);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);
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OUT_RING(chan, 1);
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BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);
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OUT_RING (chan, upper_32_bits(src_offset));
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OUT_RING (chan, upper_32_bits(dst_offset));
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BEGIN_RING(chan, NvSubM2MF, 0x030c, 8);
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OUT_RING (chan, lower_32_bits(src_offset));
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OUT_RING (chan, lower_32_bits(dst_offset));
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OUT_RING (chan, stride);
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OUT_RING (chan, stride);
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OUT_RING (chan, stride);
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OUT_RING (chan, height);
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OUT_RING (chan, 0x00000101);
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OUT_RING (chan, 0x00000000);
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BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
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OUT_RING (chan, 0);
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length -= amount;
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src_offset += amount;
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dst_offset += amount;
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}
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return 0;
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}
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static int
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nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
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struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
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{
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u32 src_offset = old_mem->mm_node->start << PAGE_SHIFT;
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u32 dst_offset = new_mem->mm_node->start << PAGE_SHIFT;
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u32 page_count = new_mem->num_pages;
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int ret;
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ret = RING_SPACE(chan, 3);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
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OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));
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OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));
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page_count = new_mem->num_pages;
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while (page_count) {
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int line_count = (page_count > 2047) ? 2047 : page_count;
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if (dev_priv->card_type >= NV_50) {
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ret = RING_SPACE(chan, 3);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);
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OUT_RING(chan, upper_32_bits(src_offset));
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OUT_RING(chan, upper_32_bits(dst_offset));
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}
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ret = RING_SPACE(chan, 11);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubM2MF,
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NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
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OUT_RING(chan, lower_32_bits(src_offset));
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OUT_RING(chan, lower_32_bits(dst_offset));
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OUT_RING(chan, PAGE_SIZE); /* src_pitch */
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OUT_RING(chan, PAGE_SIZE); /* dst_pitch */
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OUT_RING(chan, PAGE_SIZE); /* line_length */
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OUT_RING(chan, line_count);
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OUT_RING(chan, (1<<8)|(1<<0));
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OUT_RING(chan, 0);
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OUT_RING (chan, src_offset);
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OUT_RING (chan, dst_offset);
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OUT_RING (chan, PAGE_SIZE); /* src_pitch */
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OUT_RING (chan, PAGE_SIZE); /* dst_pitch */
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OUT_RING (chan, PAGE_SIZE); /* line_length */
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OUT_RING (chan, line_count);
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OUT_RING (chan, 0x00000101);
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OUT_RING (chan, 0x00000000);
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BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
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OUT_RING(chan, 0);
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OUT_RING (chan, 0);
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page_count -= line_count;
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src_offset += (PAGE_SIZE * line_count);
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dst_offset += (PAGE_SIZE * line_count);
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}
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return 0;
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}
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static int
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nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
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bool no_wait_reserve, bool no_wait_gpu,
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struct ttm_mem_reg *new_mem)
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{
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struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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struct nouveau_channel *chan;
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int ret;
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chan = nvbo->channel;
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if (!chan || nvbo->no_vm)
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chan = dev_priv->channel;
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if (dev_priv->card_type < NV_50)
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ret = nv04_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
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else
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ret = nv50_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
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if (ret)
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return ret;
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return nouveau_bo_move_accel_cleanup(chan, nvbo, evict, no_wait_reserve, no_wait_gpu, new_mem);
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}
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