drm/i915: Parameterize the Clockstop and escape_clk_div

In preparation for Generic driver

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Shobhit Kumar 2014-04-09 13:59:33 +05:30 committed by Daniel Vetter
parent 20e5bf667a
commit f1c79f16d7
2 changed files with 12 additions and 3 deletions

View File

@ -495,10 +495,17 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder)
/* dphy stuff */
/* in terms of low power clock */
I915_WRITE(MIPI_INIT_COUNT(pipe), txclkesc(ESCAPE_CLOCK_DIVIDER_1, 100));
I915_WRITE(MIPI_INIT_COUNT(pipe), txclkesc(intel_dsi->escape_clk_div, 100));
val = 0;
if (intel_dsi->eotp_pkt == 0)
val |= EOT_DISABLE;
if (intel_dsi->clock_stop)
val |= CLOCKSTOP;
/* recovery disables */
I915_WRITE(MIPI_EOT_DISABLE(pipe), intel_dsi->eot_disable);
I915_WRITE(MIPI_EOT_DISABLE(pipe), val);
/* in terms of txbyteclkhs. actual high to low switch +
* MIPI_STOP_STATE_STALL * MIPI_LP_BYTECLK.

View File

@ -95,8 +95,10 @@ struct intel_dsi {
u32 video_mode_format;
/* eot for MIPI_EOT_DISABLE register */
u32 eot_disable;
u8 eotp_pkt;
u8 clock_stop;
u8 escape_clk_div;
u32 port_bits;
u32 bw_timer;
u32 dphy_reg;