mirror of https://gitee.com/openkylin/linux.git
drm/radeon: set VM base addr using the PFP v2
Seems to make VM flushes more stable on SI and CIK. v2: only use the PFP on the GFX ring on CIK Signed-off-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -5942,12 +5942,13 @@ static void cik_vm_decode_fault(struct radeon_device *rdev,
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void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm)
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{
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struct radeon_ring *ring = &rdev->ring[ridx];
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int usepfp = (ridx == RADEON_RING_TYPE_GFX_INDEX);
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if (vm == NULL)
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return;
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radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
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radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
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radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |
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WRITE_DATA_DST_SEL(0)));
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if (vm->id < 8) {
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radeon_ring_write(ring,
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@ -5997,7 +5998,7 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm)
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radeon_ring_write(ring, 1 << vm->id);
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/* compute doesn't have PFP */
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if (ridx == RADEON_RING_TYPE_GFX_INDEX) {
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if (usepfp) {
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/* sync PFP to ME, otherwise we might get invalid PFP reads */
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radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
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radeon_ring_write(ring, 0x0);
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@ -5013,7 +5013,7 @@ void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm)
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/* write new base address */
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radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
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radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
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radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |
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WRITE_DATA_DST_SEL(0)));
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if (vm->id < 8) {
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