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@ -7,6 +7,7 @@
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/delay.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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@ -15,15 +16,47 @@
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include <linux/iopoll.h>
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#include <linux/platform_data/ti-sysc.h>
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#include <dt-bindings/bus/ti-sysc.h>
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#define DIS_ISP BIT(2)
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#define DIS_IVA BIT(1)
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#define DIS_SGX BIT(0)
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#define SOC_FLAG(match, flag) { .machine = match, .data = (void *)(flag), }
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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static const char * const reg_names[] = { "rev", "sysc", "syss", };
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enum sysc_soc {
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SOC_UNKNOWN,
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SOC_2420,
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SOC_2430,
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SOC_3430,
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SOC_3630,
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SOC_4430,
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SOC_4460,
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SOC_4470,
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SOC_5430,
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SOC_AM3,
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SOC_AM4,
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SOC_DRA7,
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};
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struct sysc_address {
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unsigned long base;
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struct list_head node;
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};
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struct sysc_soc_info {
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unsigned long general_purpose:1;
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enum sysc_soc soc;
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struct mutex list_lock; /* disabled modules list lock */
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struct list_head disabled_modules;
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};
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enum sysc_clocks {
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SYSC_FCK,
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@ -39,6 +72,8 @@ enum sysc_clocks {
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SYSC_MAX_CLOCKS,
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};
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static struct sysc_soc_info *sysc_soc;
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static const char * const reg_names[] = { "rev", "sysc", "syss", };
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static const char * const clock_names[SYSC_MAX_CLOCKS] = {
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"fck", "ick", "opt0", "opt1", "opt2", "opt3", "opt4",
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"opt5", "opt6", "opt7",
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@ -70,11 +105,13 @@ static const char * const clock_names[SYSC_MAX_CLOCKS] = {
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* @child_needs_resume: runtime resume needed for child on resume from suspend
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* @disable_on_idle: status flag used for disabling modules with resets
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* @idle_work: work structure used to perform delayed idle on a module
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* @clk_enable_quirk: module specific clock enable quirk
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* @clk_disable_quirk: module specific clock disable quirk
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* @pre_reset_quirk: module specific pre-reset quirk
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* @post_reset_quirk: module specific post-reset quirk
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* @reset_done_quirk: module specific reset done quirk
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* @module_enable_quirk: module specific enable quirk
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* @module_disable_quirk: module specific disable quirk
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* @module_unlock_quirk: module specific sysconfig unlock quirk
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* @module_lock_quirk: module specific sysconfig lock quirk
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*/
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struct sysc {
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struct device *dev;
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@ -97,11 +134,13 @@ struct sysc {
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unsigned int needs_resume:1;
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unsigned int child_needs_resume:1;
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struct delayed_work idle_work;
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void (*clk_enable_quirk)(struct sysc *sysc);
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void (*clk_disable_quirk)(struct sysc *sysc);
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void (*pre_reset_quirk)(struct sysc *sysc);
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void (*post_reset_quirk)(struct sysc *sysc);
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void (*reset_done_quirk)(struct sysc *sysc);
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void (*module_enable_quirk)(struct sysc *sysc);
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void (*module_disable_quirk)(struct sysc *sysc);
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void (*module_unlock_quirk)(struct sysc *sysc);
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void (*module_lock_quirk)(struct sysc *sysc);
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};
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static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
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@ -624,7 +663,7 @@ static void sysc_check_one_child(struct sysc *ddata,
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const char *name;
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name = of_get_property(np, "ti,hwmods", NULL);
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if (name)
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if (name && !of_device_is_compatible(np, "ti,sysc"))
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dev_warn(ddata->dev, "really a child ti,hwmods property?");
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sysc_check_quirk_stdout(ddata, np);
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@ -861,6 +900,22 @@ static void sysc_show_registers(struct sysc *ddata)
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buf);
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}
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/**
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* sysc_write_sysconfig - handle sysconfig quirks for register write
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* @ddata: device driver data
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* @value: register value
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*/
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static void sysc_write_sysconfig(struct sysc *ddata, u32 value)
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{
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if (ddata->module_unlock_quirk)
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ddata->module_unlock_quirk(ddata);
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], value);
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if (ddata->module_lock_quirk)
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ddata->module_lock_quirk(ddata);
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}
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#define SYSC_IDLE_MASK (SYSC_NR_IDLEMODES - 1)
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#define SYSC_CLOCACT_ICK 2
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@ -907,7 +962,7 @@ static int sysc_enable_module(struct device *dev)
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reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
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reg |= best_mode << regbits->sidle_shift;
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
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sysc_write_sysconfig(ddata, reg);
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set_midle:
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/* Set MIDLE mode */
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@ -926,14 +981,14 @@ static int sysc_enable_module(struct device *dev)
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reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
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reg |= best_mode << regbits->midle_shift;
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
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sysc_write_sysconfig(ddata, reg);
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set_autoidle:
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/* Autoidle bit must enabled separately if available */
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if (regbits->autoidle_shift >= 0 &&
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ddata->cfg.sysc_val & BIT(regbits->autoidle_shift)) {
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reg |= 1 << regbits->autoidle_shift;
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
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sysc_write_sysconfig(ddata, reg);
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}
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if (ddata->module_enable_quirk)
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@ -991,7 +1046,7 @@ static int sysc_disable_module(struct device *dev)
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reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
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reg |= best_mode << regbits->midle_shift;
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
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sysc_write_sysconfig(ddata, reg);
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set_sidle:
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/* Set SIDLE mode */
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@ -1014,7 +1069,7 @@ static int sysc_disable_module(struct device *dev)
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if (regbits->autoidle_shift >= 0 &&
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ddata->cfg.sysc_val & BIT(regbits->autoidle_shift))
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reg |= 1 << regbits->autoidle_shift;
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sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
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sysc_write_sysconfig(ddata, reg);
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return 0;
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}
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@ -1216,16 +1271,16 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
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SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
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SYSC_QUIRK_LEGACY_IDLE),
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SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
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SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x24, -ENODEV, 0x00000000, 0xffffffff,
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SYSC_QUIRK_LEGACY_IDLE),
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SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
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SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x38, -ENODEV, 0x00000000, 0xffffffff,
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SYSC_QUIRK_LEGACY_IDLE),
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SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
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0),
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/* Some timers on omap4 and later */
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SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x50002100, 0xffffffff,
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SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x50002100, 0xffffffff,
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0),
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SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffff00ff,
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SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x4fff1301, 0xffff00ff,
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0),
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SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,
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SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
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@ -1238,19 +1293,27 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
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/* Quirks that need to be set based on the module address */
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SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -1, 0x50000800, 0xffffffff,
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SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff,
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SYSC_QUIRK_EXT_OPT_CLOCK | SYSC_QUIRK_NO_RESET_ON_INIT |
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SYSC_QUIRK_SWSUP_SIDLE),
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/* Quirks that need to be set based on detected module */
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SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff,
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SYSC_QUIRK("aess", 0, 0, 0x10, -ENODEV, 0x40000000, 0xffffffff,
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SYSC_MODULE_QUIRK_AESS),
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SYSC_QUIRK("dcan", 0x48480000, 0x20, -1, -1, 0xa3170504, 0xffffffff,
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SYSC_QUIRK("dcan", 0x48480000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff,
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SYSC_QUIRK_CLKDM_NOAUTO),
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SYSC_QUIRK("dwc3", 0x48880000, 0, 0x10, -1, 0x500a0200, 0xffffffff,
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SYSC_QUIRK("dss", 0x4832a000, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
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SYSC_QUIRK_OPT_CLKS_IN_RESET | SYSC_MODULE_QUIRK_DSS_RESET),
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SYSC_QUIRK("dss", 0x58000000, 0, -ENODEV, 0x14, 0x00000040, 0xffffffff,
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SYSC_QUIRK_OPT_CLKS_IN_RESET | SYSC_MODULE_QUIRK_DSS_RESET),
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SYSC_QUIRK("dss", 0x58000000, 0, -ENODEV, 0x14, 0x00000061, 0xffffffff,
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SYSC_QUIRK_OPT_CLKS_IN_RESET | SYSC_MODULE_QUIRK_DSS_RESET),
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SYSC_QUIRK("dwc3", 0x48880000, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff,
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SYSC_QUIRK_CLKDM_NOAUTO),
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SYSC_QUIRK("dwc3", 0x488c0000, 0, 0x10, -1, 0x500a0200, 0xffffffff,
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SYSC_QUIRK("dwc3", 0x488c0000, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff,
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SYSC_QUIRK_CLKDM_NOAUTO),
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SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50030200, 0xffffffff,
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SYSC_QUIRK_OPT_CLKS_NEEDED),
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SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff,
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SYSC_MODULE_QUIRK_HDQ1W),
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SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff,
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@ -1263,71 +1326,91 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
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SYSC_MODULE_QUIRK_I2C),
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SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0,
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SYSC_MODULE_QUIRK_I2C),
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SYSC_QUIRK("gpu", 0x50000000, 0x14, -1, -1, 0x00010201, 0xffffffff, 0),
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SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff,
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SYSC_QUIRK("gpu", 0x50000000, 0x14, -ENODEV, -ENODEV, 0x00010201, 0xffffffff, 0),
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SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff,
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SYSC_MODULE_QUIRK_SGX),
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SYSC_QUIRK("rtc", 0, 0x74, 0x78, -ENODEV, 0x4eb01908, 0xffff00f0,
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SYSC_MODULE_QUIRK_RTC_UNLOCK),
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SYSC_QUIRK("tptc", 0, 0, 0x10, -ENODEV, 0x40006c00, 0xffffefff,
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SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
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SYSC_QUIRK("tptc", 0, 0, -ENODEV, -ENODEV, 0x40007c00, 0xffffffff,
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SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
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SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
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0xffffffff, SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
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SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -1, 0x4ea2080d, 0xffffffff,
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SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff,
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SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY),
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SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
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SYSC_MODULE_QUIRK_WDT),
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/* PRUSS on am3, am4 and am5 */
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SYSC_QUIRK("pruss", 0, 0x26000, 0x26004, -ENODEV, 0x47000000, 0xff000000,
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SYSC_MODULE_QUIRK_PRUSS),
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/* Watchdog on am3 and am4 */
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SYSC_QUIRK("wdt", 0x44e35000, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
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SYSC_MODULE_QUIRK_WDT | SYSC_QUIRK_SWSUP_SIDLE),
|
|
|
|
|
|
|
|
|
|
#ifdef DEBUG
|
|
|
|
|
SYSC_QUIRK("adc", 0, 0, 0x10, -1, 0x47300001, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("atl", 0, 0, -1, -1, 0x0a070100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("cm", 0, 0, -1, -1, 0x40000301, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("adc", 0, 0, 0x10, -ENODEV, 0x47300001, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("atl", 0, 0, -ENODEV, -ENODEV, 0x0a070100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("cm", 0, 0, -ENODEV, -ENODEV, 0x40000301, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("control", 0, 0, 0x10, -ENODEV, 0x40000900, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902,
|
|
|
|
|
0xffff00f0, 0),
|
|
|
|
|
SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0xa3170504, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0x4edb1902, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dcan", 0, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dcan", 0, 0x20, -ENODEV, -ENODEV, 0x4edb1902, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dispc", 0x4832a400, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dispc", 0x58001000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dispc", 0x58001000, 0, 0x10, 0x14, 0x00000051, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dmic", 0, 0, 0x10, -ENODEV, 0x50010000, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dsi", 0x58004000, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dsi", 0x58005000, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dsi", 0x58005000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dsi", 0x58009000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("dwc3", 0, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("d2d", 0x4a0b6000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("d2d", 0x4a0cd000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
|
|
|
|
|
SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("epwmss", 0, 0, 0x4, -ENODEV, 0x47400001, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -ENODEV, 0, 0, 0),
|
|
|
|
|
SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50031d00, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("lcdc", 0, 0, 0x54, -1, 0x4f201000, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44307b02, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
|
|
|
|
|
SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffff00ff, 0),
|
|
|
|
|
SYSC_QUIRK("iss", 0, 0, 0x10, -ENODEV, 0x40000101, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("lcdc", 0, 0, 0x54, -ENODEV, 0x4f201000, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("mcasp", 0, 0, 0x4, -ENODEV, 0x44306302, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("mcasp", 0, 0, 0x4, -ENODEV, 0x44307b02, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("mcbsp", 0, -ENODEV, 0x8c, -ENODEV, 0, 0, 0),
|
|
|
|
|
SYSC_QUIRK("mcspi", 0, 0, 0x10, -ENODEV, 0x40300a0b, 0xffff00ff, 0),
|
|
|
|
|
SYSC_QUIRK("mcspi", 0, 0, 0x110, 0x114, 0x40300a0b, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("m3", 0, 0, -1, -1, 0x5f580105, 0x0fff0f00, 0),
|
|
|
|
|
SYSC_QUIRK("mailbox", 0, 0, 0x10, -ENODEV, 0x00000400, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("m3", 0, 0, -ENODEV, -ENODEV, 0x5f580105, 0x0fff0f00, 0),
|
|
|
|
|
SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xfffffff0, 0),
|
|
|
|
|
SYSC_QUIRK("ocp2scp", 0, 0, -1, -1, 0x50060007, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("padconf", 0, 0, -1, -1, 0x40001100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x00004102, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000400, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4e8b0100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4f000100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, -1, -1, 0x40000900, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffff0ff0, 0),
|
|
|
|
|
SYSC_QUIRK("ocp2scp", 0, 0, -ENODEV, -ENODEV, 0x50060007, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("padconf", 0, 0, 0x10, -ENODEV, 0x4fff0800, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("padconf", 0, 0, -ENODEV, -ENODEV, 0x40001100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x40000100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x00004102, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x40000400, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("rfbi", 0x4832a800, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("rfbi", 0x58002000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, 0x10, -ENODEV, 0x40000900, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4e8b0100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4f000100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x40000900, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("scrm", 0, 0, -ENODEV, -ENODEV, 0x00000010, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("sdio", 0, 0, 0x10, -ENODEV, 0x40202301, 0xffff0ff0, 0),
|
|
|
|
|
SYSC_QUIRK("sdio", 0, 0x2fc, 0x110, 0x114, 0x31010000, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -1, 0x00000020, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("rtc", 0, 0x74, 0x78, -1, 0x4eb01908, 0xffff00f0, 0),
|
|
|
|
|
SYSC_QUIRK("timer32k", 0, 0, 0x4, -1, 0x00000060, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40000902, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40002903, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("spinlock", 0, 0, 0x10, -ENODEV, 0x50020000, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -ENODEV, 0x00000020, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000060, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("tpcc", 0, 0, -ENODEV, -ENODEV, 0x40014c00, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000008, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -1, 0x50700101, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("vfpe", 0, 0, 0x104, -1, 0x4d001200, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -ENODEV, 0x50700101, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("venc", 0x58003000, 0, -ENODEV, -ENODEV, 0x00000002, 0xffffffff, 0),
|
|
|
|
|
SYSC_QUIRK("vfpe", 0, 0, 0x104, -ENODEV, 0x4d001200, 0xffffffff, 0),
|
|
|
|
|
#endif
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
@ -1349,16 +1432,13 @@ static void sysc_init_early_quirks(struct sysc *ddata)
|
|
|
|
|
if (q->base != ddata->module_pa)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (q->rev_offset >= 0 &&
|
|
|
|
|
q->rev_offset != ddata->offsets[SYSC_REVISION])
|
|
|
|
|
if (q->rev_offset != ddata->offsets[SYSC_REVISION])
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (q->sysc_offset >= 0 &&
|
|
|
|
|
q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
|
|
|
|
|
if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (q->syss_offset >= 0 &&
|
|
|
|
|
q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
|
|
|
|
|
if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
ddata->name = q->name;
|
|
|
|
@ -1378,16 +1458,13 @@ static void sysc_init_revision_quirks(struct sysc *ddata)
|
|
|
|
|
if (q->base && q->base != ddata->module_pa)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (q->rev_offset >= 0 &&
|
|
|
|
|
q->rev_offset != ddata->offsets[SYSC_REVISION])
|
|
|
|
|
if (q->rev_offset != ddata->offsets[SYSC_REVISION])
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (q->sysc_offset >= 0 &&
|
|
|
|
|
q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
|
|
|
|
|
if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (q->syss_offset >= 0 &&
|
|
|
|
|
q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
|
|
|
|
|
if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
if (q->revision == ddata->revision ||
|
|
|
|
@ -1399,8 +1476,130 @@ static void sysc_init_revision_quirks(struct sysc *ddata)
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* DSS needs dispc outputs disabled to reset modules. Returns mask of
|
|
|
|
|
* enabled DSS interrupts. Eventually we may be able to do this on
|
|
|
|
|
* dispc init rather than top-level DSS init.
|
|
|
|
|
*/
|
|
|
|
|
static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset,
|
|
|
|
|
bool disable)
|
|
|
|
|
{
|
|
|
|
|
bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false;
|
|
|
|
|
const int lcd_en_mask = BIT(0), digit_en_mask = BIT(1);
|
|
|
|
|
int manager_count;
|
|
|
|
|
bool framedonetv_irq;
|
|
|
|
|
u32 val, irq_mask = 0;
|
|
|
|
|
|
|
|
|
|
switch (sysc_soc->soc) {
|
|
|
|
|
case SOC_2420 ... SOC_3630:
|
|
|
|
|
manager_count = 2;
|
|
|
|
|
framedonetv_irq = false;
|
|
|
|
|
break;
|
|
|
|
|
case SOC_4430 ... SOC_4470:
|
|
|
|
|
manager_count = 3;
|
|
|
|
|
break;
|
|
|
|
|
case SOC_5430:
|
|
|
|
|
case SOC_DRA7:
|
|
|
|
|
manager_count = 4;
|
|
|
|
|
break;
|
|
|
|
|
case SOC_AM4:
|
|
|
|
|
manager_count = 1;
|
|
|
|
|
break;
|
|
|
|
|
case SOC_UNKNOWN:
|
|
|
|
|
default:
|
|
|
|
|
return 0;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Remap the whole module range to be able to reset dispc outputs */
|
|
|
|
|
devm_iounmap(ddata->dev, ddata->module_va);
|
|
|
|
|
ddata->module_va = devm_ioremap(ddata->dev,
|
|
|
|
|
ddata->module_pa,
|
|
|
|
|
ddata->module_size);
|
|
|
|
|
if (!ddata->module_va)
|
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
|
|
/* DISP_CONTROL */
|
|
|
|
|
val = sysc_read(ddata, dispc_offset + 0x40);
|
|
|
|
|
lcd_en = val & lcd_en_mask;
|
|
|
|
|
digit_en = val & digit_en_mask;
|
|
|
|
|
if (lcd_en)
|
|
|
|
|
irq_mask |= BIT(0); /* FRAMEDONE */
|
|
|
|
|
if (digit_en) {
|
|
|
|
|
if (framedonetv_irq)
|
|
|
|
|
irq_mask |= BIT(24); /* FRAMEDONETV */
|
|
|
|
|
else
|
|
|
|
|
irq_mask |= BIT(2) | BIT(3); /* EVSYNC bits */
|
|
|
|
|
}
|
|
|
|
|
if (disable & (lcd_en | digit_en))
|
|
|
|
|
sysc_write(ddata, dispc_offset + 0x40,
|
|
|
|
|
val & ~(lcd_en_mask | digit_en_mask));
|
|
|
|
|
|
|
|
|
|
if (manager_count <= 2)
|
|
|
|
|
return irq_mask;
|
|
|
|
|
|
|
|
|
|
/* DISPC_CONTROL2 */
|
|
|
|
|
val = sysc_read(ddata, dispc_offset + 0x238);
|
|
|
|
|
lcd2_en = val & lcd_en_mask;
|
|
|
|
|
if (lcd2_en)
|
|
|
|
|
irq_mask |= BIT(22); /* FRAMEDONE2 */
|
|
|
|
|
if (disable && lcd2_en)
|
|
|
|
|
sysc_write(ddata, dispc_offset + 0x238,
|
|
|
|
|
val & ~lcd_en_mask);
|
|
|
|
|
|
|
|
|
|
if (manager_count <= 3)
|
|
|
|
|
return irq_mask;
|
|
|
|
|
|
|
|
|
|
/* DISPC_CONTROL3 */
|
|
|
|
|
val = sysc_read(ddata, dispc_offset + 0x848);
|
|
|
|
|
lcd3_en = val & lcd_en_mask;
|
|
|
|
|
if (lcd3_en)
|
|
|
|
|
irq_mask |= BIT(30); /* FRAMEDONE3 */
|
|
|
|
|
if (disable && lcd3_en)
|
|
|
|
|
sysc_write(ddata, dispc_offset + 0x848,
|
|
|
|
|
val & ~lcd_en_mask);
|
|
|
|
|
|
|
|
|
|
return irq_mask;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* DSS needs child outputs disabled and SDI registers cleared for reset */
|
|
|
|
|
static void sysc_pre_reset_quirk_dss(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
const int dispc_offset = 0x1000;
|
|
|
|
|
int error;
|
|
|
|
|
u32 irq_mask, val;
|
|
|
|
|
|
|
|
|
|
/* Get enabled outputs */
|
|
|
|
|
irq_mask = sysc_quirk_dispc(ddata, dispc_offset, false);
|
|
|
|
|
if (!irq_mask)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* Clear IRQSTATUS */
|
|
|
|
|
sysc_write(ddata, dispc_offset + 0x18, irq_mask);
|
|
|
|
|
|
|
|
|
|
/* Disable outputs */
|
|
|
|
|
val = sysc_quirk_dispc(ddata, dispc_offset, true);
|
|
|
|
|
|
|
|
|
|
/* Poll IRQSTATUS */
|
|
|
|
|
error = readl_poll_timeout(ddata->module_va + dispc_offset + 0x18,
|
|
|
|
|
val, val != irq_mask, 100, 50);
|
|
|
|
|
if (error)
|
|
|
|
|
dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n",
|
|
|
|
|
__func__, val, irq_mask);
|
|
|
|
|
|
|
|
|
|
if (sysc_soc->soc == SOC_3430) {
|
|
|
|
|
/* Clear DSS_SDI_CONTROL */
|
|
|
|
|
sysc_write(ddata, 0x44, 0);
|
|
|
|
|
|
|
|
|
|
/* Clear DSS_PLL_CONTROL */
|
|
|
|
|
sysc_write(ddata, 0x48, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Clear DSS_CONTROL to switch DSS clock sources to PRCM if not */
|
|
|
|
|
sysc_write(ddata, 0x40, 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* 1-wire needs module's internal clocks enabled for reset */
|
|
|
|
|
static void sysc_clk_enable_quirk_hdq1w(struct sysc *ddata)
|
|
|
|
|
static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
int offset = 0x0c; /* HDQ_CTRL_STATUS */
|
|
|
|
|
u16 val;
|
|
|
|
@ -1418,7 +1617,7 @@ static void sysc_module_enable_quirk_aess(struct sysc *ddata)
|
|
|
|
|
sysc_write(ddata, offset, 1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* I2C needs extra enable bit toggling for reset */
|
|
|
|
|
/* I2C needs to be disabled for reset */
|
|
|
|
|
static void sysc_clk_quirk_i2c(struct sysc *ddata, bool enable)
|
|
|
|
|
{
|
|
|
|
|
int offset;
|
|
|
|
@ -1439,14 +1638,48 @@ static void sysc_clk_quirk_i2c(struct sysc *ddata, bool enable)
|
|
|
|
|
sysc_write(ddata, offset, val);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void sysc_clk_enable_quirk_i2c(struct sysc *ddata)
|
|
|
|
|
static void sysc_pre_reset_quirk_i2c(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
sysc_clk_quirk_i2c(ddata, false);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void sysc_post_reset_quirk_i2c(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
sysc_clk_quirk_i2c(ddata, true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void sysc_clk_disable_quirk_i2c(struct sysc *ddata)
|
|
|
|
|
/* RTC on am3 and 4 needs to be unlocked and locked for sysconfig */
|
|
|
|
|
static void sysc_quirk_rtc(struct sysc *ddata, bool lock)
|
|
|
|
|
{
|
|
|
|
|
sysc_clk_quirk_i2c(ddata, false);
|
|
|
|
|
u32 val, kick0_val = 0, kick1_val = 0;
|
|
|
|
|
unsigned long flags;
|
|
|
|
|
int error;
|
|
|
|
|
|
|
|
|
|
if (!lock) {
|
|
|
|
|
kick0_val = 0x83e70b13;
|
|
|
|
|
kick1_val = 0x95a4f1e0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
|
|
/* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */
|
|
|
|
|
error = readl_poll_timeout(ddata->module_va + 0x44, val,
|
|
|
|
|
!(val & BIT(0)), 100, 50);
|
|
|
|
|
if (error)
|
|
|
|
|
dev_warn(ddata->dev, "rtc busy timeout\n");
|
|
|
|
|
/* Now we have ~15 microseconds to read/write various registers */
|
|
|
|
|
sysc_write(ddata, 0x6c, kick0_val);
|
|
|
|
|
sysc_write(ddata, 0x70, kick1_val);
|
|
|
|
|
local_irq_restore(flags);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void sysc_module_unlock_quirk_rtc(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
sysc_quirk_rtc(ddata, false);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void sysc_module_lock_quirk_rtc(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
sysc_quirk_rtc(ddata, true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* 36xx SGX needs a quirk for to bypass OCP IPG interrupt logic */
|
|
|
|
@ -1482,20 +1715,30 @@ static void sysc_reset_done_quirk_wdt(struct sysc *ddata)
|
|
|
|
|
dev_warn(ddata->dev, "wdt disable step2 failed\n");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* PRUSS needs to set MSTANDBY_INIT inorder to idle properly */
|
|
|
|
|
static void sysc_module_disable_quirk_pruss(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
u32 reg;
|
|
|
|
|
|
|
|
|
|
reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
|
|
|
|
|
reg |= SYSC_PRUSS_STANDBY_INIT;
|
|
|
|
|
sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void sysc_init_module_quirks(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
if (ddata->legacy_mode || !ddata->name)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) {
|
|
|
|
|
ddata->clk_enable_quirk = sysc_clk_enable_quirk_hdq1w;
|
|
|
|
|
ddata->pre_reset_quirk = sysc_pre_reset_quirk_hdq1w;
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_I2C) {
|
|
|
|
|
ddata->clk_enable_quirk = sysc_clk_enable_quirk_i2c;
|
|
|
|
|
ddata->clk_disable_quirk = sysc_clk_disable_quirk_i2c;
|
|
|
|
|
ddata->pre_reset_quirk = sysc_pre_reset_quirk_i2c;
|
|
|
|
|
ddata->post_reset_quirk = sysc_post_reset_quirk_i2c;
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
@ -1503,6 +1746,16 @@ static void sysc_init_module_quirks(struct sysc *ddata)
|
|
|
|
|
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_AESS)
|
|
|
|
|
ddata->module_enable_quirk = sysc_module_enable_quirk_aess;
|
|
|
|
|
|
|
|
|
|
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_DSS_RESET)
|
|
|
|
|
ddata->pre_reset_quirk = sysc_pre_reset_quirk_dss;
|
|
|
|
|
|
|
|
|
|
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_RTC_UNLOCK) {
|
|
|
|
|
ddata->module_unlock_quirk = sysc_module_unlock_quirk_rtc;
|
|
|
|
|
ddata->module_lock_quirk = sysc_module_lock_quirk_rtc;
|
|
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX)
|
|
|
|
|
ddata->module_enable_quirk = sysc_module_enable_quirk_sgx;
|
|
|
|
|
|
|
|
|
@ -1510,6 +1763,9 @@ static void sysc_init_module_quirks(struct sysc *ddata)
|
|
|
|
|
ddata->reset_done_quirk = sysc_reset_done_quirk_wdt;
|
|
|
|
|
ddata->module_disable_quirk = sysc_reset_done_quirk_wdt;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS)
|
|
|
|
|
ddata->module_disable_quirk = sysc_module_disable_quirk_pruss;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int sysc_clockdomain_init(struct sysc *ddata)
|
|
|
|
@ -1571,7 +1827,7 @@ static int sysc_reset(struct sysc *ddata)
|
|
|
|
|
sysc_offset = ddata->offsets[SYSC_SYSCONFIG];
|
|
|
|
|
syss_offset = ddata->offsets[SYSC_SYSSTATUS];
|
|
|
|
|
|
|
|
|
|
if (ddata->legacy_mode || sysc_offset < 0 ||
|
|
|
|
|
if (ddata->legacy_mode ||
|
|
|
|
|
ddata->cap->regbits->srst_shift < 0 ||
|
|
|
|
|
ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
|
|
|
|
|
return 0;
|
|
|
|
@ -1583,19 +1839,21 @@ static int sysc_reset(struct sysc *ddata)
|
|
|
|
|
else
|
|
|
|
|
syss_done = ddata->cfg.syss_mask;
|
|
|
|
|
|
|
|
|
|
if (ddata->clk_disable_quirk)
|
|
|
|
|
ddata->clk_disable_quirk(ddata);
|
|
|
|
|
if (ddata->pre_reset_quirk)
|
|
|
|
|
ddata->pre_reset_quirk(ddata);
|
|
|
|
|
|
|
|
|
|
sysc_val = sysc_read_sysconfig(ddata);
|
|
|
|
|
sysc_val |= sysc_mask;
|
|
|
|
|
sysc_write(ddata, sysc_offset, sysc_val);
|
|
|
|
|
if (sysc_offset >= 0) {
|
|
|
|
|
sysc_val = sysc_read_sysconfig(ddata);
|
|
|
|
|
sysc_val |= sysc_mask;
|
|
|
|
|
sysc_write(ddata, sysc_offset, sysc_val);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (ddata->cfg.srst_udelay)
|
|
|
|
|
usleep_range(ddata->cfg.srst_udelay,
|
|
|
|
|
ddata->cfg.srst_udelay * 2);
|
|
|
|
|
|
|
|
|
|
if (ddata->clk_enable_quirk)
|
|
|
|
|
ddata->clk_enable_quirk(ddata);
|
|
|
|
|
if (ddata->post_reset_quirk)
|
|
|
|
|
ddata->post_reset_quirk(ddata);
|
|
|
|
|
|
|
|
|
|
/* Poll on reset status */
|
|
|
|
|
if (syss_offset >= 0) {
|
|
|
|
@ -2313,6 +2571,16 @@ static const struct sysc_capabilities sysc_dra7_mcan = {
|
|
|
|
|
.mod_quirks = SYSS_QUIRK_RESETDONE_INVERTED,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* PRUSS found on some AM33xx, AM437x and AM57xx SoCs
|
|
|
|
|
*/
|
|
|
|
|
static const struct sysc_capabilities sysc_pruss = {
|
|
|
|
|
.type = TI_SYSC_PRUSS,
|
|
|
|
|
.sysc_mask = SYSC_PRUSS_STANDBY_INIT | SYSC_PRUSS_SUB_MWAIT,
|
|
|
|
|
.regbits = &sysc_regbits_omap4_simple,
|
|
|
|
|
.mod_quirks = SYSC_MODULE_QUIRK_PRUSS,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int sysc_init_pdata(struct sysc *ddata)
|
|
|
|
|
{
|
|
|
|
|
struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
|
|
|
|
@ -2386,6 +2654,154 @@ static void ti_sysc_idle(struct work_struct *work)
|
|
|
|
|
pm_runtime_put_sync(ddata->dev);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* SoC model and features detection. Only needed for SoCs that need
|
|
|
|
|
* special handling for quirks, no need to list others.
|
|
|
|
|
*/
|
|
|
|
|
static const struct soc_device_attribute sysc_soc_match[] = {
|
|
|
|
|
SOC_FLAG("OMAP242*", SOC_2420),
|
|
|
|
|
SOC_FLAG("OMAP243*", SOC_2430),
|
|
|
|
|
SOC_FLAG("OMAP3[45]*", SOC_3430),
|
|
|
|
|
SOC_FLAG("OMAP3[67]*", SOC_3630),
|
|
|
|
|
SOC_FLAG("OMAP443*", SOC_4430),
|
|
|
|
|
SOC_FLAG("OMAP446*", SOC_4460),
|
|
|
|
|
SOC_FLAG("OMAP447*", SOC_4470),
|
|
|
|
|
SOC_FLAG("OMAP54*", SOC_5430),
|
|
|
|
|
SOC_FLAG("AM433", SOC_AM3),
|
|
|
|
|
SOC_FLAG("AM43*", SOC_AM4),
|
|
|
|
|
SOC_FLAG("DRA7*", SOC_DRA7),
|
|
|
|
|
|
|
|
|
|
{ /* sentinel */ },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* List of SoCs variants with disabled features. By default we assume all
|
|
|
|
|
* devices in the device tree are available so no need to list those SoCs.
|
|
|
|
|
*/
|
|
|
|
|
static const struct soc_device_attribute sysc_soc_feat_match[] = {
|
|
|
|
|
/* OMAP3430/3530 and AM3517 variants with some accelerators disabled */
|
|
|
|
|
SOC_FLAG("AM3505", DIS_SGX),
|
|
|
|
|
SOC_FLAG("OMAP3525", DIS_SGX),
|
|
|
|
|
SOC_FLAG("OMAP3515", DIS_IVA | DIS_SGX),
|
|
|
|
|
SOC_FLAG("OMAP3503", DIS_ISP | DIS_IVA | DIS_SGX),
|
|
|
|
|
|
|
|
|
|
/* OMAP3630/DM3730 variants with some accelerators disabled */
|
|
|
|
|
SOC_FLAG("AM3703", DIS_IVA | DIS_SGX),
|
|
|
|
|
SOC_FLAG("DM3725", DIS_SGX),
|
|
|
|
|
SOC_FLAG("OMAP3611", DIS_ISP | DIS_IVA | DIS_SGX),
|
|
|
|
|
SOC_FLAG("OMAP3615/AM3715", DIS_IVA),
|
|
|
|
|
SOC_FLAG("OMAP3621", DIS_ISP),
|
|
|
|
|
|
|
|
|
|
{ /* sentinel */ },
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int sysc_add_disabled(unsigned long base)
|
|
|
|
|
{
|
|
|
|
|
struct sysc_address *disabled_module;
|
|
|
|
|
|
|
|
|
|
disabled_module = kzalloc(sizeof(*disabled_module), GFP_KERNEL);
|
|
|
|
|
if (!disabled_module)
|
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
|
|
disabled_module->base = base;
|
|
|
|
|
|
|
|
|
|
mutex_lock(&sysc_soc->list_lock);
|
|
|
|
|
list_add(&disabled_module->node, &sysc_soc->disabled_modules);
|
|
|
|
|
mutex_unlock(&sysc_soc->list_lock);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
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/*
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* One time init to detect the booted SoC and disable unavailable features.
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* Note that we initialize static data shared across all ti-sysc instances
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* so ddata is only used for SoC type. This can be called from module_init
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* once we no longer need to rely on platform data.
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*/
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static int sysc_init_soc(struct sysc *ddata)
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{
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const struct soc_device_attribute *match;
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struct ti_sysc_platform_data *pdata;
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unsigned long features = 0;
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if (sysc_soc)
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return 0;
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sysc_soc = kzalloc(sizeof(*sysc_soc), GFP_KERNEL);
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if (!sysc_soc)
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return -ENOMEM;
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mutex_init(&sysc_soc->list_lock);
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INIT_LIST_HEAD(&sysc_soc->disabled_modules);
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sysc_soc->general_purpose = true;
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pdata = dev_get_platdata(ddata->dev);
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if (pdata && pdata->soc_type_gp)
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sysc_soc->general_purpose = pdata->soc_type_gp();
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match = soc_device_match(sysc_soc_match);
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if (match && match->data)
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sysc_soc->soc = (int)match->data;
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match = soc_device_match(sysc_soc_feat_match);
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if (!match)
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return 0;
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if (match->data)
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features = (unsigned long)match->data;
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/*
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* Add disabled devices to the list based on the module base.
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* Note that this must be done before we attempt to access the
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* device and have module revision checks working.
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*/
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if (features & DIS_ISP)
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sysc_add_disabled(0x480bd400);
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if (features & DIS_IVA)
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sysc_add_disabled(0x5d000000);
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if (features & DIS_SGX)
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sysc_add_disabled(0x50000000);
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return 0;
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}
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static void sysc_cleanup_soc(void)
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{
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struct sysc_address *disabled_module;
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struct list_head *pos, *tmp;
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if (!sysc_soc)
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return;
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mutex_lock(&sysc_soc->list_lock);
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list_for_each_safe(pos, tmp, &sysc_soc->disabled_modules) {
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disabled_module = list_entry(pos, struct sysc_address, node);
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list_del(pos);
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kfree(disabled_module);
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}
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mutex_unlock(&sysc_soc->list_lock);
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}
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static int sysc_check_disabled_devices(struct sysc *ddata)
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{
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struct sysc_address *disabled_module;
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struct list_head *pos;
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int error = 0;
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mutex_lock(&sysc_soc->list_lock);
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list_for_each(pos, &sysc_soc->disabled_modules) {
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disabled_module = list_entry(pos, struct sysc_address, node);
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if (ddata->module_pa == disabled_module->base) {
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dev_dbg(ddata->dev, "module disabled for this SoC\n");
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error = -ENODEV;
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break;
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}
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}
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mutex_unlock(&sysc_soc->list_lock);
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return error;
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}
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static const struct of_device_id sysc_match_table[] = {
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{ .compatible = "simple-bus", },
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{ /* sentinel */ },
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|
@ -2404,6 +2820,10 @@ static int sysc_probe(struct platform_device *pdev)
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ddata->dev = &pdev->dev;
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platform_set_drvdata(pdev, ddata);
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error = sysc_init_soc(ddata);
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|
if (error)
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|
return error;
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|
|
error = sysc_init_match(ddata);
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|
|
if (error)
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|
return error;
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|
@ -2434,6 +2854,10 @@ static int sysc_probe(struct platform_device *pdev)
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sysc_init_early_quirks(ddata);
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|
|
error = sysc_check_disabled_devices(ddata);
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|
|
if (error)
|
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|
|
return error;
|
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|
|
error = sysc_get_clocks(ddata);
|
|
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|
|
if (error)
|
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|
|
return error;
|
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|
|
@ -2538,6 +2962,7 @@ static const struct of_device_id sysc_match[] = {
|
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|
|
|
{ .compatible = "ti,sysc-usb-host-fs",
|
|
|
|
|
.data = &sysc_omap4_usb_host_fs, },
|
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|
|
|
{ .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, },
|
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|
|
|
{ .compatible = "ti,sysc-pruss", .data = &sysc_pruss, },
|
|
|
|
|
{ },
|
|
|
|
|
};
|
|
|
|
|
MODULE_DEVICE_TABLE(of, sysc_match);
|
|
|
|
@ -2564,6 +2989,7 @@ static void __exit sysc_exit(void)
|
|
|
|
|
{
|
|
|
|
|
bus_unregister_notifier(&platform_bus_type, &sysc_nb);
|
|
|
|
|
platform_driver_unregister(&sysc_driver);
|
|
|
|
|
sysc_cleanup_soc();
|
|
|
|
|
}
|
|
|
|
|
module_exit(sysc_exit);
|
|
|
|
|
|
|
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|
|