mirror of https://gitee.com/openkylin/linux.git
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: sdhci: remove needless double parenthesis sdhci: Specific quirk vor VIA SDHCI controller in VX855ES s3cmci: fix dma configuration call mmc: Add new via-sdmmc host controller driver sdhci: Add support for hosts that are only capable of 1-bit transfers MAINTAINERS: add myself as atmel-mci maintainer (sd/mmc interface) sdhci: Add SDHCI_QUIRK_NO_MULTIBLOCK quirk sdhci: Add better ADMA error reporting sdhci-s3c: Samsung S3C based SDHCI controller glue
This commit is contained in:
Linus Torvalds
commit
f234012f52
|
|
@ -10,6 +10,8 @@ Required properties:
|
|||
- interrupts : should contain eSDHC interrupt.
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||||
- interrupt-parent : interrupt source phandle.
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- clock-frequency : specifies eSDHC base clock frequency.
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- sdhci,1-bit-only : (optional) specifies that a controller can
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||||
only handle 1-bit data transfers.
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|
||||
Example:
|
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|
||||
|
|
|
|||
22
MAINTAINERS
22
MAINTAINERS
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|
@ -1010,6 +1010,13 @@ W: http://www.at91.com/
|
|||
S: Maintained
|
||||
F: drivers/mmc/host/at91_mci.c
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||||
|
||||
ATMEL AT91 / AT32 MCI DRIVER
|
||||
P: Nicolas Ferre
|
||||
M: nicolas.ferre@atmel.com
|
||||
S: Maintained
|
||||
F: drivers/mmc/host/atmel-mci.c
|
||||
F: drivers/mmc/host/atmel-mci-regs.h
|
||||
|
||||
ATMEL AT91 / AT32 SERIAL DRIVER
|
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P: Haavard Skinnemoen
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M: hskinnemoen@atmel.com
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|
|
@ -5094,6 +5101,13 @@ L: sdhci-devel@lists.ossman.eu
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S: Maintained
|
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F: drivers/mmc/host/sdhci.*
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|
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SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER
|
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P: Ben Dooks
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M: ben-linux@fluff.org
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||||
L: sdhci-devel@lists.ossman.eu
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S: Maintained
|
||||
F: drivers/mmc/host/sdhci-s3c.c
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SECURITY SUBSYSTEM
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P: James Morris
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M: jmorris@namei.org
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||||
|
|
@ -6216,6 +6230,14 @@ S: Maintained
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|||
F: Documentation/i2c/busses/i2c-viapro
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F: drivers/i2c/busses/i2c-viapro.c
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|
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VIA SD/MMC CARD CONTROLLER DRIVER
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P: Joseph Chan
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M: JosephChan@via.com.tw
|
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P: Harald Welte
|
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M: HaraldWelte@viatech.com
|
||||
S: Maintained
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F: drivers/mmc/host/via-sdmmc.c
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VIA UNICHROME(PRO)/CHROME9 FRAMEBUFFER DRIVER
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P: Joseph Chan
|
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M: JosephChan@via.com.tw
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|
|
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|||
|
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@ -94,6 +94,31 @@ config MMC_SDHCI_PLTFM
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|
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If unsure, say N.
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config MMC_SDHCI_S3C
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tristate "SDHCI support on Samsung S3C SoC"
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depends on MMC_SDHCI && (PLAT_S3C24XX || PLAT_S3C64XX)
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help
|
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This selects the Secure Digital Host Controller Interface (SDHCI)
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often referrered to as the HSMMC block in some of the Samsung S3C
|
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range of SoC.
|
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|
||||
Note, due to the problems with DMA, the DMA support is only
|
||||
available with CONFIG_EXPERIMENTAL is selected.
|
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|
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If you have a controller with this interface, say Y or M here.
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|
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If unsure, say N.
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|
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config MMC_SDHCI_S3C_DMA
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bool "DMA support on S3C SDHCI"
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depends on MMC_SDHCI_S3C && EXPERIMENTAL
|
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help
|
||||
Enable DMA support on the Samsung S3C SDHCI glue. The DMA
|
||||
has proved to be problematic if the controller encounters
|
||||
certain errors, and thus should be treated with care.
|
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|
||||
YMMV.
|
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|
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config MMC_OMAP
|
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tristate "TI OMAP Multimedia Card Interface support"
|
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depends on ARCH_OMAP
|
||||
|
|
@ -265,3 +290,14 @@ config MMC_CB710
|
|||
This driver can also be built as a module. If so, the module
|
||||
will be called cb710-mmc.
|
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|
||||
config MMC_VIA_SDMMC
|
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tristate "VIA SD/MMC Card Reader Driver"
|
||||
depends on PCI
|
||||
help
|
||||
This selects the VIA SD/MMC Card Reader driver, say Y or M here.
|
||||
VIA provides one multi-functional card reader which integrated into
|
||||
some motherboards manufactured by VIA. This card reader supports
|
||||
SD/MMC/SDHC.
|
||||
If you have a controller with this interface, say Y or M here.
|
||||
|
||||
If unsure, say N.
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o
|
|||
obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o
|
||||
obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
|
||||
obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
|
||||
obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o
|
||||
obj-$(CONFIG_MMC_WBSD) += wbsd.o
|
||||
obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
|
||||
obj-$(CONFIG_MMC_OMAP) += omap.o
|
||||
|
|
@ -31,6 +32,7 @@ obj-$(CONFIG_MMC_S3C) += s3cmci.o
|
|||
obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o
|
||||
obj-$(CONFIG_MMC_TMIO) += tmio_mmc.o
|
||||
obj-$(CONFIG_MMC_CB710) += cb710-mmc.o
|
||||
obj-$(CONFIG_MMC_VIA_SDMMC) += via-sdmmc.o
|
||||
|
||||
ifeq ($(CONFIG_CB710_DEBUG),y)
|
||||
CFLAGS-cb710-mmc += -DDEBUG
|
||||
|
|
|
|||
|
|
@ -794,7 +794,7 @@ static void s3cmci_dma_setup(struct s3cmci_host *host,
|
|||
host->mem->start + host->sdidata);
|
||||
|
||||
if (!setup_ok) {
|
||||
s3c2410_dma_config(host->dma, 4, 0);
|
||||
s3c2410_dma_config(host->dma, 4);
|
||||
s3c2410_dma_set_buffdone_fn(host->dma,
|
||||
s3cmci_dma_done_callback);
|
||||
s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART);
|
||||
|
|
|
|||
|
|
@ -250,6 +250,9 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev,
|
|||
host->ops = &sdhci_of_data->ops;
|
||||
}
|
||||
|
||||
if (of_get_property(np, "sdhci,1-bit-only", NULL))
|
||||
host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
|
||||
|
||||
clk = of_get_property(np, "clock-frequency", &size);
|
||||
if (clk && size == sizeof(*clk) && *clk)
|
||||
of_host->clock = *clk;
|
||||
|
|
|
|||
|
|
@ -284,6 +284,18 @@ static const struct sdhci_pci_fixes sdhci_jmicron = {
|
|||
.resume = jmicron_resume,
|
||||
};
|
||||
|
||||
static int via_probe(struct sdhci_pci_chip *chip)
|
||||
{
|
||||
if (chip->pdev->revision == 0x10)
|
||||
chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct sdhci_pci_fixes sdhci_via = {
|
||||
.probe = via_probe,
|
||||
};
|
||||
|
||||
static const struct pci_device_id pci_ids[] __devinitdata = {
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_RICOH,
|
||||
|
|
@ -349,6 +361,14 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
|
|||
.driver_data = (kernel_ulong_t)&sdhci_jmicron,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_VIA,
|
||||
.device = 0x95d0,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
.driver_data = (kernel_ulong_t)&sdhci_via,
|
||||
},
|
||||
|
||||
{ /* Generic SD host controller */
|
||||
PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
|
||||
},
|
||||
|
|
|
|||
|
|
@ -0,0 +1,428 @@
|
|||
/* linux/drivers/mmc/host/sdhci-s3c.c
|
||||
*
|
||||
* Copyright 2008 Openmoko Inc.
|
||||
* Copyright 2008 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
* http://armlinux.simtec.co.uk/
|
||||
*
|
||||
* SDHCI (HSMMC) support for Samsung SoC
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <linux/mmc/host.h>
|
||||
|
||||
#include <plat/sdhci.h>
|
||||
#include <plat/regs-sdhci.h>
|
||||
|
||||
#include "sdhci.h"
|
||||
|
||||
#define MAX_BUS_CLK (4)
|
||||
|
||||
/**
|
||||
* struct sdhci_s3c - S3C SDHCI instance
|
||||
* @host: The SDHCI host created
|
||||
* @pdev: The platform device we where created from.
|
||||
* @ioarea: The resource created when we claimed the IO area.
|
||||
* @pdata: The platform data for this controller.
|
||||
* @cur_clk: The index of the current bus clock.
|
||||
* @clk_io: The clock for the internal bus interface.
|
||||
* @clk_bus: The clocks that are available for the SD/MMC bus clock.
|
||||
*/
|
||||
struct sdhci_s3c {
|
||||
struct sdhci_host *host;
|
||||
struct platform_device *pdev;
|
||||
struct resource *ioarea;
|
||||
struct s3c_sdhci_platdata *pdata;
|
||||
unsigned int cur_clk;
|
||||
|
||||
struct clk *clk_io;
|
||||
struct clk *clk_bus[MAX_BUS_CLK];
|
||||
};
|
||||
|
||||
static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
|
||||
{
|
||||
return sdhci_priv(host);
|
||||
}
|
||||
|
||||
/**
|
||||
* get_curclk - convert ctrl2 register to clock source number
|
||||
* @ctrl2: Control2 register value.
|
||||
*/
|
||||
static u32 get_curclk(u32 ctrl2)
|
||||
{
|
||||
ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
|
||||
ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
|
||||
|
||||
return ctrl2;
|
||||
}
|
||||
|
||||
static void sdhci_s3c_check_sclk(struct sdhci_host *host)
|
||||
{
|
||||
struct sdhci_s3c *ourhost = to_s3c(host);
|
||||
u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
|
||||
|
||||
if (get_curclk(tmp) != ourhost->cur_clk) {
|
||||
dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
|
||||
|
||||
tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
|
||||
tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
|
||||
writel(tmp, host->ioaddr + 0x80);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
|
||||
* @host: The SDHCI host instance.
|
||||
*
|
||||
* Callback to return the maximum clock rate acheivable by the controller.
|
||||
*/
|
||||
static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
|
||||
{
|
||||
struct sdhci_s3c *ourhost = to_s3c(host);
|
||||
struct clk *busclk;
|
||||
unsigned int rate, max;
|
||||
int clk;
|
||||
|
||||
/* note, a reset will reset the clock source */
|
||||
|
||||
sdhci_s3c_check_sclk(host);
|
||||
|
||||
for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
|
||||
busclk = ourhost->clk_bus[clk];
|
||||
if (!busclk)
|
||||
continue;
|
||||
|
||||
rate = clk_get_rate(busclk);
|
||||
if (rate > max)
|
||||
max = rate;
|
||||
}
|
||||
|
||||
return max;
|
||||
}
|
||||
|
||||
static unsigned int sdhci_s3c_get_timeout_clk(struct sdhci_host *host)
|
||||
{
|
||||
return sdhci_s3c_get_max_clk(host) / 1000000;
|
||||
}
|
||||
|
||||
/**
|
||||
* sdhci_s3c_consider_clock - consider one the bus clocks for current setting
|
||||
* @ourhost: Our SDHCI instance.
|
||||
* @src: The source clock index.
|
||||
* @wanted: The clock frequency wanted.
|
||||
*/
|
||||
static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
|
||||
unsigned int src,
|
||||
unsigned int wanted)
|
||||
{
|
||||
unsigned long rate;
|
||||
struct clk *clksrc = ourhost->clk_bus[src];
|
||||
int div;
|
||||
|
||||
if (!clksrc)
|
||||
return UINT_MAX;
|
||||
|
||||
rate = clk_get_rate(clksrc);
|
||||
|
||||
for (div = 1; div < 256; div *= 2) {
|
||||
if ((rate / div) <= wanted)
|
||||
break;
|
||||
}
|
||||
|
||||
dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
|
||||
src, rate, wanted, rate / div);
|
||||
|
||||
return (wanted - (rate / div));
|
||||
}
|
||||
|
||||
/**
|
||||
* sdhci_s3c_set_clock - callback on clock change
|
||||
* @host: The SDHCI host being changed
|
||||
* @clock: The clock rate being requested.
|
||||
*
|
||||
* When the card's clock is going to be changed, look at the new frequency
|
||||
* and find the best clock source to go with it.
|
||||
*/
|
||||
static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
|
||||
{
|
||||
struct sdhci_s3c *ourhost = to_s3c(host);
|
||||
unsigned int best = UINT_MAX;
|
||||
unsigned int delta;
|
||||
int best_src = 0;
|
||||
int src;
|
||||
u32 ctrl;
|
||||
|
||||
/* don't bother if the clock is going off. */
|
||||
if (clock == 0)
|
||||
return;
|
||||
|
||||
for (src = 0; src < MAX_BUS_CLK; src++) {
|
||||
delta = sdhci_s3c_consider_clock(ourhost, src, clock);
|
||||
if (delta < best) {
|
||||
best = delta;
|
||||
best_src = src;
|
||||
}
|
||||
}
|
||||
|
||||
dev_dbg(&ourhost->pdev->dev,
|
||||
"selected source %d, clock %d, delta %d\n",
|
||||
best_src, clock, best);
|
||||
|
||||
/* select the new clock source */
|
||||
|
||||
if (ourhost->cur_clk != best_src) {
|
||||
struct clk *clk = ourhost->clk_bus[best_src];
|
||||
|
||||
/* turn clock off to card before changing clock source */
|
||||
writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
|
||||
|
||||
ourhost->cur_clk = best_src;
|
||||
host->max_clk = clk_get_rate(clk);
|
||||
host->timeout_clk = sdhci_s3c_get_timeout_clk(host);
|
||||
|
||||
ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
|
||||
ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
|
||||
ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
|
||||
writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
|
||||
}
|
||||
|
||||
/* reconfigure the hardware for new clock rate */
|
||||
|
||||
{
|
||||
struct mmc_ios ios;
|
||||
|
||||
ios.clock = clock;
|
||||
|
||||
if (ourhost->pdata->cfg_card)
|
||||
(ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
|
||||
&ios, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
static struct sdhci_ops sdhci_s3c_ops = {
|
||||
.get_max_clock = sdhci_s3c_get_max_clk,
|
||||
.get_timeout_clock = sdhci_s3c_get_timeout_clk,
|
||||
.set_clock = sdhci_s3c_set_clock,
|
||||
};
|
||||
|
||||
static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct sdhci_host *host;
|
||||
struct sdhci_s3c *sc;
|
||||
struct resource *res;
|
||||
int ret, irq, ptr, clks;
|
||||
|
||||
if (!pdata) {
|
||||
dev_err(dev, "no device data specified\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq < 0) {
|
||||
dev_err(dev, "no irq specified\n");
|
||||
return irq;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_err(dev, "no memory specified\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
|
||||
if (IS_ERR(host)) {
|
||||
dev_err(dev, "sdhci_alloc_host() failed\n");
|
||||
return PTR_ERR(host);
|
||||
}
|
||||
|
||||
sc = sdhci_priv(host);
|
||||
|
||||
sc->host = host;
|
||||
sc->pdev = pdev;
|
||||
sc->pdata = pdata;
|
||||
|
||||
platform_set_drvdata(pdev, host);
|
||||
|
||||
sc->clk_io = clk_get(dev, "hsmmc");
|
||||
if (IS_ERR(sc->clk_io)) {
|
||||
dev_err(dev, "failed to get io clock\n");
|
||||
ret = PTR_ERR(sc->clk_io);
|
||||
goto err_io_clk;
|
||||
}
|
||||
|
||||
/* enable the local io clock and keep it running for the moment. */
|
||||
clk_enable(sc->clk_io);
|
||||
|
||||
for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
|
||||
struct clk *clk;
|
||||
char *name = pdata->clocks[ptr];
|
||||
|
||||
if (name == NULL)
|
||||
continue;
|
||||
|
||||
clk = clk_get(dev, name);
|
||||
if (IS_ERR(clk)) {
|
||||
dev_err(dev, "failed to get clock %s\n", name);
|
||||
continue;
|
||||
}
|
||||
|
||||
clks++;
|
||||
sc->clk_bus[ptr] = clk;
|
||||
clk_enable(clk);
|
||||
|
||||
dev_info(dev, "clock source %d: %s (%ld Hz)\n",
|
||||
ptr, name, clk_get_rate(clk));
|
||||
}
|
||||
|
||||
if (clks == 0) {
|
||||
dev_err(dev, "failed to find any bus clocks\n");
|
||||
ret = -ENOENT;
|
||||
goto err_no_busclks;
|
||||
}
|
||||
|
||||
sc->ioarea = request_mem_region(res->start, resource_size(res),
|
||||
mmc_hostname(host->mmc));
|
||||
if (!sc->ioarea) {
|
||||
dev_err(dev, "failed to reserve register area\n");
|
||||
ret = -ENXIO;
|
||||
goto err_req_regs;
|
||||
}
|
||||
|
||||
host->ioaddr = ioremap_nocache(res->start, resource_size(res));
|
||||
if (!host->ioaddr) {
|
||||
dev_err(dev, "failed to map registers\n");
|
||||
ret = -ENXIO;
|
||||
goto err_req_regs;
|
||||
}
|
||||
|
||||
/* Ensure we have minimal gpio selected CMD/CLK/Detect */
|
||||
if (pdata->cfg_gpio)
|
||||
pdata->cfg_gpio(pdev, pdata->max_width);
|
||||
|
||||
host->hw_name = "samsung-hsmmc";
|
||||
host->ops = &sdhci_s3c_ops;
|
||||
host->quirks = 0;
|
||||
host->irq = irq;
|
||||
|
||||
/* Setup quirks for the controller */
|
||||
|
||||
/* Currently with ADMA enabled we are getting some length
|
||||
* interrupts that are not being dealt with, do disable
|
||||
* ADMA until this is sorted out. */
|
||||
host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
|
||||
host->quirks |= SDHCI_QUIRK_32BIT_ADMA_SIZE;
|
||||
|
||||
#ifndef CONFIG_MMC_SDHCI_S3C_DMA
|
||||
|
||||
/* we currently see overruns on errors, so disable the SDMA
|
||||
* support as well. */
|
||||
host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
|
||||
|
||||
/* PIO currently has problems with multi-block IO */
|
||||
host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK;
|
||||
|
||||
#endif /* CONFIG_MMC_SDHCI_S3C_DMA */
|
||||
|
||||
/* It seems we do not get an DATA transfer complete on non-busy
|
||||
* transfers, not sure if this is a problem with this specific
|
||||
* SDHCI block, or a missing configuration that needs to be set. */
|
||||
host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
|
||||
|
||||
host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
|
||||
SDHCI_QUIRK_32BIT_DMA_SIZE);
|
||||
|
||||
ret = sdhci_add_host(host);
|
||||
if (ret) {
|
||||
dev_err(dev, "sdhci_add_host() failed\n");
|
||||
goto err_add_host;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_add_host:
|
||||
release_resource(sc->ioarea);
|
||||
kfree(sc->ioarea);
|
||||
|
||||
err_req_regs:
|
||||
for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
|
||||
clk_disable(sc->clk_bus[ptr]);
|
||||
clk_put(sc->clk_bus[ptr]);
|
||||
}
|
||||
|
||||
err_no_busclks:
|
||||
clk_disable(sc->clk_io);
|
||||
clk_put(sc->clk_io);
|
||||
|
||||
err_io_clk:
|
||||
sdhci_free_host(host);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm)
|
||||
{
|
||||
struct sdhci_host *host = platform_get_drvdata(dev);
|
||||
|
||||
sdhci_suspend_host(host, pm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sdhci_s3c_resume(struct platform_device *dev)
|
||||
{
|
||||
struct sdhci_host *host = platform_get_drvdata(dev);
|
||||
|
||||
sdhci_resume_host(host);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#else
|
||||
#define sdhci_s3c_suspend NULL
|
||||
#define sdhci_s3c_resume NULL
|
||||
#endif
|
||||
|
||||
static struct platform_driver sdhci_s3c_driver = {
|
||||
.probe = sdhci_s3c_probe,
|
||||
.remove = __devexit_p(sdhci_s3c_remove),
|
||||
.suspend = sdhci_s3c_suspend,
|
||||
.resume = sdhci_s3c_resume,
|
||||
.driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "s3c-sdhci",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init sdhci_s3c_init(void)
|
||||
{
|
||||
return platform_driver_register(&sdhci_s3c_driver);
|
||||
}
|
||||
|
||||
static void __exit sdhci_s3c_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&sdhci_s3c_driver);
|
||||
}
|
||||
|
||||
module_init(sdhci_s3c_init);
|
||||
module_exit(sdhci_s3c_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
|
||||
MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:s3c-sdhci");
|
||||
|
|
@ -584,7 +584,7 @@ static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
|
|||
* longer to time out, but that's much better than having a too-short
|
||||
* timeout value.
|
||||
*/
|
||||
if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL))
|
||||
if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL)
|
||||
return 0xE;
|
||||
|
||||
/* timeout in us */
|
||||
|
|
@ -1051,12 +1051,19 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
|
|||
* At least the Marvell CaFe chip gets confused if we set the voltage
|
||||
* and set turn on power at the same time, so set the voltage first.
|
||||
*/
|
||||
if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
|
||||
if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)
|
||||
sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
|
||||
|
||||
pwr |= SDHCI_POWER_ON;
|
||||
|
||||
sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
|
||||
|
||||
/*
|
||||
* Some controllers need an extra 10ms delay of 10ms before they
|
||||
* can apply clock after applying power
|
||||
*/
|
||||
if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER)
|
||||
mdelay(10);
|
||||
}
|
||||
|
||||
/*****************************************************************************\
|
||||
|
|
@ -1382,6 +1389,35 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
|
|||
sdhci_finish_command(host);
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
static void sdhci_show_adma_error(struct sdhci_host *host)
|
||||
{
|
||||
const char *name = mmc_hostname(host->mmc);
|
||||
u8 *desc = host->adma_desc;
|
||||
__le32 *dma;
|
||||
__le16 *len;
|
||||
u8 attr;
|
||||
|
||||
sdhci_dumpregs(host);
|
||||
|
||||
while (true) {
|
||||
dma = (__le32 *)(desc + 4);
|
||||
len = (__le16 *)(desc + 2);
|
||||
attr = *desc;
|
||||
|
||||
DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n",
|
||||
name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr);
|
||||
|
||||
desc += 8;
|
||||
|
||||
if (attr & 2)
|
||||
break;
|
||||
}
|
||||
}
|
||||
#else
|
||||
static void sdhci_show_adma_error(struct sdhci_host *host) { }
|
||||
#endif
|
||||
|
||||
static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
|
||||
{
|
||||
BUG_ON(intmask == 0);
|
||||
|
|
@ -1411,8 +1447,11 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
|
|||
host->data->error = -ETIMEDOUT;
|
||||
else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
|
||||
host->data->error = -EILSEQ;
|
||||
else if (intmask & SDHCI_INT_ADMA_ERROR)
|
||||
else if (intmask & SDHCI_INT_ADMA_ERROR) {
|
||||
printk(KERN_ERR "%s: ADMA error\n", mmc_hostname(host->mmc));
|
||||
sdhci_show_adma_error(host);
|
||||
host->data->error = -EIO;
|
||||
}
|
||||
|
||||
if (host->data->error)
|
||||
sdhci_finish_data(host);
|
||||
|
|
@ -1729,7 +1768,10 @@ int sdhci_add_host(struct sdhci_host *host)
|
|||
mmc->ops = &sdhci_ops;
|
||||
mmc->f_min = host->max_clk / 256;
|
||||
mmc->f_max = host->max_clk;
|
||||
mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
|
||||
mmc->caps = MMC_CAP_SDIO_IRQ;
|
||||
|
||||
if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA;
|
||||
|
||||
if (caps & SDHCI_CAN_DO_HISPD)
|
||||
mmc->caps |= MMC_CAP_SD_HIGHSPEED;
|
||||
|
|
@ -1802,7 +1844,7 @@ int sdhci_add_host(struct sdhci_host *host)
|
|||
/*
|
||||
* Maximum block count.
|
||||
*/
|
||||
mmc->max_blk_count = 65535;
|
||||
mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535;
|
||||
|
||||
/*
|
||||
* Init tasklets.
|
||||
|
|
|
|||
|
|
@ -226,6 +226,12 @@ struct sdhci_host {
|
|||
#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19)
|
||||
/* Controller has to be forced to use block size of 2048 bytes */
|
||||
#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20)
|
||||
/* Controller cannot do multi-block transfers */
|
||||
#define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21)
|
||||
/* Controller can only handle 1-bit data transfers */
|
||||
#define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22)
|
||||
/* Controller needs 10ms delay between applying power and clock */
|
||||
#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23)
|
||||
|
||||
int irq; /* Device IRQ */
|
||||
void __iomem * ioaddr; /* Mapped address */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue