mirror of https://gitee.com/openkylin/linux.git
mx51: add SSI3
Add SSI3 to MX51 Signed-off-by: Peter Horton <phorton@bitbox.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -1040,6 +1040,10 @@ DEFINE_CLOCK(ssi2_ipg_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG10_OFFSET,
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NULL, NULL, &ipg_clk, NULL);
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DEFINE_CLOCK(ssi2_clk, 1, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG11_OFFSET,
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NULL, NULL, &pll3_sw_clk, &ssi2_ipg_clk);
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DEFINE_CLOCK(ssi3_ipg_clk, 2, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG12_OFFSET,
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NULL, NULL, &ipg_clk, NULL);
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DEFINE_CLOCK(ssi3_clk, 2, MXC_CCM_CCGR3, MXC_CCM_CCGRx_CG13_OFFSET,
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NULL, NULL, &pll3_sw_clk, &ssi3_ipg_clk);
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/* eCSPI */
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DEFINE_CLOCK_FULL(ecspi1_ipg_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG9_OFFSET,
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@ -1099,6 +1103,7 @@ static struct clk_lookup mx51_lookups[] = {
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_REGISTER_CLOCK("mxc_nand", NULL, nfc_clk)
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_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
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_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
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_REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
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_REGISTER_CLOCK("imx-sdma", NULL, sdma_clk)
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_REGISTER_CLOCK(NULL, "ckih", ckih_clk)
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_REGISTER_CLOCK(NULL, "ckih2", ckih2_clk)
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@ -72,6 +72,7 @@ const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = {
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imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_4K)
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imx51_imx_ssi_data_entry(0, 1),
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imx51_imx_ssi_data_entry(1, 2),
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imx51_imx_ssi_data_entry(2, 3),
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};
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#endif /* ifdef CONFIG_SOC_IMX51 */
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@ -109,7 +109,7 @@
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#define MX51_MIPI_HSC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xdc000)
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#define MX51_ATA_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe0000)
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#define MX51_SIM_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe4000)
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#define MX51_SSI3BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe8000)
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#define MX51_SSI3_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xe8000)
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#define MX51_FEC_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xec000)
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#define MX51_TVE_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf0000)
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#define MX51_VPU_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0xf4000)
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@ -223,9 +223,9 @@
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#define MX51_DMA_REQ_EMI_WR 32
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#define MX51_DMA_REQ_CTI2_1 33
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#define MX51_DMA_REQ_EPIT2 34
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#define MX51_DMA_REQ_SSI3_RX2 35
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#define MX51_DMA_REQ_SSI3_RX1 35
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#define MX51_DMA_REQ_IPU 36
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#define MX51_DMA_REQ_SSI3_TX2 37
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#define MX51_DMA_REQ_SSI3_TX1 37
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#define MX51_DMA_REQ_CSPI_RX 38
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#define MX51_DMA_REQ_CSPI_TX 39
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#define MX51_DMA_REQ_SDHC3 40
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@ -234,8 +234,8 @@
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#define MX51_DMA_REQ_UART3_RX 43
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#define MX51_DMA_REQ_UART3_TX 44
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#define MX51_DMA_REQ_SPDIF 45
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#define MX51_DMA_REQ_SSI3_RX1 46
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#define MX51_DMA_REQ_SSI3_TX1 47
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#define MX51_DMA_REQ_SSI3_RX0 46
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#define MX51_DMA_REQ_SSI3_TX0 47
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/*
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* Interrupt numbers
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@ -337,7 +337,7 @@
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#define MX51_MXC_INT_FIRI 93
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#define MX51_MXC_INT_PWM2 94
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#define MX51_MXC_INT_SLIM_EXP 95
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#define MX51_MXC_INT_SSI3 96
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#define MX51_INT_SSI3 96
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#define MX51_MXC_INT_EMI_BOOT 97
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#define MX51_MXC_INT_CTI1_TG3 98
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#define MX51_MXC_INT_SMC_RX 99
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