mirror of https://gitee.com/openkylin/linux.git
ath9k: Fix TX IQ calibration for SoC chips
Since calibration data reuse is not enabled in SoC chips, simplify the IQ calibration code. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1255,22 +1255,19 @@ static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
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/*
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* For AR9485 or later chips, TxIQ cal runs as part of
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* AGC calibration
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* AGC calibration. Specifically, AR9550 in SoC chips.
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*/
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if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
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if (caldata && !test_bit(TXIQCAL_DONE, &caldata->cal_flags))
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REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
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AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
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else
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REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
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AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
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txiqcal_done = run_agc_cal = true;
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} else if (caldata && !test_bit(TXIQCAL_DONE, &caldata->cal_flags)) {
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txiqcal_done = true;
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run_agc_cal = true;
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} else {
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sep_iq_cal = true;
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run_agc_cal = true;
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}
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skip_tx_iqcal:
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/*
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* In the SoC family, this will run for AR9300, AR9331 and AR9340.
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*/
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if (sep_iq_cal) {
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txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
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REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
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@ -1278,6 +1275,7 @@ static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
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REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
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}
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skip_tx_iqcal:
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if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
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/* Calibrate the AGC */
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REG_WRITE(ah, AR_PHY_AGC_CONTROL,
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@ -1299,8 +1297,6 @@ static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
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if (txiqcal_done)
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ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
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else if (caldata && test_bit(TXIQCAL_DONE, &caldata->cal_flags))
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ar9003_hw_tx_iq_cal_reload(ah);
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/* Revert chainmask to runtime parameters */
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ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
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