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clk: bcm2835: Fix ->fixed_divider of pllh_aux 

There is no fixed divider on pllh_aux.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Boris Brezillon 2016-11-22 12:45:28 -08:00 committed by Stephen Boyd
parent c260524aba
commit f2a46926ab
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/bcm/clk-bcm2835.c
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@ -1596,7 +1596,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.a2w_reg = A2W_PLLH_AUX, .a2w_reg = A2W_PLLH_AUX,
.load_mask = CM_PLLH_LOADAUX, .load_mask = CM_PLLH_LOADAUX,
.hold_mask = 0, .hold_mask = 0,
.fixed_divider = 10), .fixed_divider = 1),
[BCM2835_PLLH_PIX] = REGISTER_PLL_DIV( [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
.name = "pllh_pix", .name = "pllh_pix",
.source_pll = "pllh", .source_pll = "pllh",