mirror of https://gitee.com/openkylin/linux.git
ARM: tegra: Add Tegra124 USB support
The USB controllers on Tegra124 are backwards-compatible with those found on Tegra30. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
parent
40e231c770
commit
f2d50158eb
|
@ -591,6 +591,105 @@ tegra_i2s4: i2s@70301400 {
|
|||
};
|
||||
};
|
||||
|
||||
usb@7d000000 {
|
||||
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
|
||||
reg = <0x7d000000 0x4000>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phy_type = "utmi";
|
||||
clocks = <&tegra_car TEGRA124_CLK_USBD>;
|
||||
resets = <&tegra_car 22>;
|
||||
reset-names = "usb";
|
||||
nvidia,phy = <&phy1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
phy1: usb-phy@7d000000 {
|
||||
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
|
||||
reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
|
||||
phy_type = "utmi";
|
||||
clocks = <&tegra_car TEGRA124_CLK_USBD>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
nvidia,elastic-limit = <16>;
|
||||
nvidia,term-range-adj = <6>;
|
||||
nvidia,xcvr-setup = <9>;
|
||||
nvidia,xcvr-lsfslew = <0>;
|
||||
nvidia,xcvr-lsrslew = <3>;
|
||||
nvidia,hssquelch-level = <2>;
|
||||
nvidia,hsdiscon-level = <5>;
|
||||
nvidia,xcvr-hsslew = <12>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@7d004000 {
|
||||
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
|
||||
reg = <0x7d004000 0x4000>;
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phy_type = "utmi";
|
||||
clocks = <&tegra_car TEGRA124_CLK_USB2>;
|
||||
resets = <&tegra_car 58>;
|
||||
reset-names = "usb";
|
||||
nvidia,phy = <&phy2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
phy2: usb-phy@7d004000 {
|
||||
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
|
||||
reg = <0x7d004000 0x4000 0x7d000000 0x4000>;
|
||||
phy_type = "utmi";
|
||||
clocks = <&tegra_car TEGRA124_CLK_USB2>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
nvidia,elastic-limit = <16>;
|
||||
nvidia,term-range-adj = <6>;
|
||||
nvidia,xcvr-setup = <9>;
|
||||
nvidia,xcvr-lsfslew = <0>;
|
||||
nvidia,xcvr-lsrslew = <3>;
|
||||
nvidia,hssquelch-level = <2>;
|
||||
nvidia,hsdiscon-level = <5>;
|
||||
nvidia,xcvr-hsslew = <12>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@7d008000 {
|
||||
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
|
||||
reg = <0x7d008000 0x4000>;
|
||||
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phy_type = "utmi";
|
||||
clocks = <&tegra_car TEGRA124_CLK_USB3>;
|
||||
resets = <&tegra_car 59>;
|
||||
reset-names = "usb";
|
||||
nvidia,phy = <&phy3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
phy3: usb-phy@7d008000 {
|
||||
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
|
||||
reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
|
||||
phy_type = "utmi";
|
||||
clocks = <&tegra_car TEGRA124_CLK_USB3>,
|
||||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
nvidia,elastic-limit = <16>;
|
||||
nvidia,term-range-adj = <6>;
|
||||
nvidia,xcvr-setup = <9>;
|
||||
nvidia,xcvr-lsfslew = <0>;
|
||||
nvidia,xcvr-lsrslew = <3>;
|
||||
nvidia,hssquelch-level = <2>;
|
||||
nvidia,hsdiscon-level = <5>;
|
||||
nvidia,xcvr-hsslew = <12>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
Loading…
Reference in New Issue