mirror of https://gitee.com/openkylin/linux.git
net: dsa: mv88e6xxx: introduce .port_set_policy
Introduce a new .port_set_policy operation to configure a port's Policy Control List, based on mapping such as DA, SA, Etype and so on. Models similar to 88E6352 and 88E6390 are supported at the moment. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vivien Didelot
David S. Miller
parent
d8291a956a
commit
f3a2cd326e
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@ -3132,6 +3132,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6352_port_set_speed,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3218,6 +3219,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6352_port_set_speed,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3303,6 +3305,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
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.port_set_speed = mv88e6390_port_set_speed,
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.port_max_speed_mode = mv88e6390_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3351,6 +3354,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
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.port_set_speed = mv88e6390x_port_set_speed,
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.port_max_speed_mode = mv88e6390x_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3448,6 +3452,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6352_port_set_speed,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3539,6 +3544,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
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.port_set_speed = mv88e6390_port_set_speed,
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.port_max_speed_mode = mv88e6390_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3809,6 +3815,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6352_port_set_speed,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3863,6 +3870,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
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.port_set_speed = mv88e6390_port_set_speed,
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.port_max_speed_mode = mv88e6390_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -3915,6 +3923,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
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.port_set_speed = mv88e6390x_port_set_speed,
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.port_max_speed_mode = mv88e6390x_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_set_ether_type = mv88e6351_port_set_ether_type,
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@ -189,6 +189,24 @@ struct mv88e6xxx_port_hwtstamp {
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struct hwtstamp_config tstamp_config;
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};
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enum mv88e6xxx_policy_mapping {
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MV88E6XXX_POLICY_MAPPING_DA,
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MV88E6XXX_POLICY_MAPPING_SA,
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MV88E6XXX_POLICY_MAPPING_VTU,
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MV88E6XXX_POLICY_MAPPING_ETYPE,
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MV88E6XXX_POLICY_MAPPING_PPPOE,
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MV88E6XXX_POLICY_MAPPING_VBAS,
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MV88E6XXX_POLICY_MAPPING_OPT82,
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MV88E6XXX_POLICY_MAPPING_UDP,
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};
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enum mv88e6xxx_policy_action {
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MV88E6XXX_POLICY_ACTION_NORMAL,
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MV88E6XXX_POLICY_ACTION_MIRROR,
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MV88E6XXX_POLICY_ACTION_TRAP,
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MV88E6XXX_POLICY_ACTION_DISCARD,
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};
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struct mv88e6xxx_port {
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struct mv88e6xxx_chip *chip;
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int port;
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@ -381,6 +399,10 @@ struct mv88e6xxx_ops {
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int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
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int (*port_set_policy)(struct mv88e6xxx_chip *chip, int port,
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enum mv88e6xxx_policy_mapping mapping,
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enum mv88e6xxx_policy_action action);
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int (*port_set_frame_mode)(struct mv88e6xxx_chip *chip, int port,
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enum mv88e6xxx_frame_mode mode);
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int (*port_set_egress_floods)(struct mv88e6xxx_chip *chip, int port,
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@ -1341,3 +1341,77 @@ int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port)
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return 0;
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}
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/* Offset 0x0E: Policy Control Register */
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int mv88e6352_port_set_policy(struct mv88e6xxx_chip *chip, int port,
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enum mv88e6xxx_policy_mapping mapping,
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enum mv88e6xxx_policy_action action)
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{
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u16 reg, mask, val;
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int shift;
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int err;
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switch (mapping) {
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case MV88E6XXX_POLICY_MAPPING_DA:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_DA_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_DA_MASK;
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break;
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case MV88E6XXX_POLICY_MAPPING_SA:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_SA_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_SA_MASK;
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break;
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case MV88E6XXX_POLICY_MAPPING_VTU:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VTU_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_VTU_MASK;
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break;
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case MV88E6XXX_POLICY_MAPPING_ETYPE:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK;
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break;
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case MV88E6XXX_POLICY_MAPPING_PPPOE:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK;
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break;
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case MV88E6XXX_POLICY_MAPPING_VBAS:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK;
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break;
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case MV88E6XXX_POLICY_MAPPING_OPT82:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK;
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break;
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case MV88E6XXX_POLICY_MAPPING_UDP:
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shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_UDP_MASK);
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mask = MV88E6XXX_PORT_POLICY_CTL_UDP_MASK;
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break;
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default:
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return -EOPNOTSUPP;
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}
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switch (action) {
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case MV88E6XXX_POLICY_ACTION_NORMAL:
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val = MV88E6XXX_PORT_POLICY_CTL_NORMAL;
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break;
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case MV88E6XXX_POLICY_ACTION_MIRROR:
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val = MV88E6XXX_PORT_POLICY_CTL_MIRROR;
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break;
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case MV88E6XXX_POLICY_ACTION_TRAP:
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val = MV88E6XXX_PORT_POLICY_CTL_TRAP;
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break;
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case MV88E6XXX_POLICY_ACTION_DISCARD:
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val = MV88E6XXX_PORT_POLICY_CTL_DISCARD;
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break;
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default:
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return -EOPNOTSUPP;
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}
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err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_POLICY_CTL, ®);
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if (err)
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return err;
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reg &= ~mask;
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reg |= (val << shift) & mask;
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return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_POLICY_CTL, reg);
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}
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@ -222,7 +222,19 @@
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#define MV88E6XXX_PORT_PRI_OVERRIDE 0x0d
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/* Offset 0x0E: Policy Control Register */
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#define MV88E6XXX_PORT_POLICY_CTL 0x0e
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#define MV88E6XXX_PORT_POLICY_CTL 0x0e
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#define MV88E6XXX_PORT_POLICY_CTL_DA_MASK 0xc000
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#define MV88E6XXX_PORT_POLICY_CTL_SA_MASK 0x3000
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#define MV88E6XXX_PORT_POLICY_CTL_VTU_MASK 0x0c00
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#define MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK 0x0300
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#define MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK 0x00c0
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#define MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK 0x0030
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#define MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK 0x000c
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#define MV88E6XXX_PORT_POLICY_CTL_UDP_MASK 0x0003
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#define MV88E6XXX_PORT_POLICY_CTL_NORMAL 0x0000
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#define MV88E6XXX_PORT_POLICY_CTL_MIRROR 0x0001
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#define MV88E6XXX_PORT_POLICY_CTL_TRAP 0x0002
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#define MV88E6XXX_PORT_POLICY_CTL_DISCARD 0x0003
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/* Offset 0x0F: Port Special Ether Type */
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#define MV88E6XXX_PORT_ETH_TYPE 0x0f
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@ -324,6 +336,9 @@ int mv88e6185_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
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bool unicast, bool multicast);
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int mv88e6352_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
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bool unicast, bool multicast);
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int mv88e6352_port_set_policy(struct mv88e6xxx_chip *chip, int port,
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enum mv88e6xxx_policy_mapping mapping,
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enum mv88e6xxx_policy_action action);
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int mv88e6351_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,
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u16 etype);
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int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,
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