mirror of https://gitee.com/openkylin/linux.git
enc28j60: Amend comments by fixing typos, adding periods, etc
Amend comments in the code: - adding periods to the multi-line comments - fixing typos - capitalize first word in the sentences - etc Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -40,7 +40,8 @@
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(NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN | NETIF_MSG_LINK)
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/* Buffer size required for the largest SPI transfer (i.e., reading a
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* frame). */
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* frame).
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*/
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#define SPI_TRANSFER_BUF_LEN (4 + MAX_FRAMELEN)
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#define TX_TIMEOUT (4 * HZ)
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@ -82,7 +83,7 @@ static struct {
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/*
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* SPI read buffer
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* wait for the SPI transfer and copy received data to destination
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* Wait for the SPI transfer and copy received data to destination.
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*/
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static int
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spi_read_buf(struct enc28j60_net *priv, int len, u8 *data)
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@ -191,7 +192,7 @@ static void enc28j60_soft_reset(struct enc28j60_net *priv)
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{
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spi_write_op(priv, ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
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/* Errata workaround #1, CLKRDY check is unreliable,
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* delay at least 1 mS instead */
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* delay at least 1 ms instead */
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udelay(2000);
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}
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@ -203,7 +204,7 @@ static void enc28j60_set_bank(struct enc28j60_net *priv, u8 addr)
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u8 b = (addr & BANK_MASK) >> 5;
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/* These registers (EIE, EIR, ESTAT, ECON2, ECON1)
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* are present in all banks, no need to switch bank
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* are present in all banks, no need to switch bank.
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*/
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if (addr >= EIE && addr <= ECON1)
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return;
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@ -364,7 +365,7 @@ static void locked_regw_write(struct enc28j60_net *priv,
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/*
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* Buffer memory read
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* Select the starting address and execute a SPI buffer read
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* Select the starting address and execute a SPI buffer read.
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*/
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static void enc28j60_mem_read(struct enc28j60_net *priv,
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u16 addr, int len, u8 *data)
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@ -452,7 +453,7 @@ static int wait_phy_ready(struct enc28j60_net *priv)
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/*
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* PHY register read
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* PHY registers are not accessed directly, but through the MII
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* PHY registers are not accessed directly, but through the MII.
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*/
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static u16 enc28j60_phy_read(struct enc28j60_net *priv, u8 address)
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{
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@ -640,7 +641,7 @@ static void nolock_txfifo_init(struct enc28j60_net *priv, u16 start, u16 end)
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/*
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* Low power mode shrinks power consumption about 100x, so we'd like
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* the chip to be in that mode whenever it's inactive. (However, we
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* can't stay in lowpower mode during suspend with WOL active.)
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* can't stay in low power mode during suspend with WOL active.)
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*/
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static void enc28j60_lowpower(struct enc28j60_net *priv, bool is_low)
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{
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@ -693,7 +694,7 @@ static int enc28j60_hw_init(struct enc28j60_net *priv)
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/*
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* Check the RevID.
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* If it's 0x00 or 0xFF probably the enc28j60 is not mounted or
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* damaged
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* damaged.
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*/
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reg = locked_regb_read(priv, EREVID);
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if (netif_msg_drv(priv))
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@ -734,7 +735,7 @@ static int enc28j60_hw_init(struct enc28j60_net *priv)
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/*
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* MACLCON1 (default)
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* MACLCON2 (default)
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* Set the maximum packet size which the controller will accept
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* Set the maximum packet size which the controller will accept.
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*/
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locked_regw_write(priv, MAMXFLL, MAX_FRAMELEN);
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@ -785,7 +786,7 @@ static void enc28j60_hw_enable(struct enc28j60_net *priv)
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static void enc28j60_hw_disable(struct enc28j60_net *priv)
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{
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mutex_lock(&priv->lock);
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/* disable interrutps and packet reception */
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/* disable interrupts and packet reception */
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nolock_regb_write(priv, EIE, 0x00);
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nolock_reg_bfclr(priv, ECON1, ECON1_RXEN);
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priv->hw_enable = false;
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@ -999,7 +1000,7 @@ static void enc28j60_hw_rx(struct net_device *ndev)
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/*
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* Move the RX read pointer to the start of the next
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* received packet.
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* This frees the memory we just read out
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* This frees the memory we just read out.
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*/
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erxrdpt = erxrdpt_workaround(next_packet, RXSTART_INIT, RXEND_INIT);
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if (netif_msg_hw(priv))
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@ -1107,8 +1108,8 @@ static void enc28j60_tx_clear(struct net_device *ndev, bool err)
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/*
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* RX handler
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* ignore PKTIF because is unreliable! (look at the errata datasheet)
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* check EPKTCNT is the suggested workaround.
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* Ignore PKTIF because is unreliable! (Look at the errata datasheet)
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* Check EPKTCNT is the suggested workaround.
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* We don't need to clear interrupt flag, automatically done when
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* enc28j60_hw_rx() decrements the packet counter.
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* Returns how many packet processed.
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