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ARM: mvebu: MPIC: read number of interrupts from control register
Read the number of MPIC interrupts from the controller and only register that many. [gregory.clement@free-electrons.com: rename armada symbol name to fit with new name: armada_370_xp] Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Lior Amsalem <alior@marvell.com>
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@ -29,13 +29,12 @@
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#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48)
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#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C)
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#define ARMADA_370_XP_INT_CONTROL (0x00)
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#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30)
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#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34)
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#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44)
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#define ARMADA_370_XP_NR_IRQS (115)
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static void __iomem *per_cpu_int_base;
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static void __iomem *main_int_base;
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static struct irq_domain *armada_370_xp_mpic_domain;
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@ -81,14 +80,18 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
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static int __init armada_370_xp_mpic_of_init(struct device_node *node,
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struct device_node *parent)
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{
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u32 control;
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main_int_base = of_iomap(node, 0);
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per_cpu_int_base = of_iomap(node, 1);
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BUG_ON(!main_int_base);
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BUG_ON(!per_cpu_int_base);
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control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL);
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armada_370_xp_mpic_domain =
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irq_domain_add_linear(node, ARMADA_370_XP_NR_IRQS,
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irq_domain_add_linear(node, (control >> 2) & 0x3ff,
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&armada_370_xp_mpic_irq_ops, NULL);
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if (!armada_370_xp_mpic_domain)
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