mirror of https://gitee.com/openkylin/linux.git
drm/i915: Start using output_types for DPLL selection
encoder->type is not realiable for DP/HDMI so let's switch the DPLL selection over to using output_types. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171019133721.11794-4-ville.syrjala@linux.intel.com Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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@ -813,15 +813,11 @@ hsw_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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memset(&crtc_state->dpll_hw_state, 0,
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sizeof(crtc_state->dpll_hw_state));
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if (encoder->type == INTEL_OUTPUT_HDMI) {
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
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pll = hsw_ddi_hdmi_get_dpll(clock, crtc, crtc_state);
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} else if (encoder->type == INTEL_OUTPUT_DP ||
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encoder->type == INTEL_OUTPUT_DP_MST ||
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encoder->type == INTEL_OUTPUT_EDP) {
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} else if (intel_crtc_has_dp_encoder(crtc_state)) {
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pll = hsw_ddi_dp_get_dpll(encoder, clock);
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} else if (encoder->type == INTEL_OUTPUT_ANALOG) {
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} else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) {
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if (WARN_ON(crtc_state->port_clock / 2 != 135000))
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return NULL;
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@ -1369,15 +1365,13 @@ skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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memset(&dpll_hw_state, 0, sizeof(dpll_hw_state));
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if (encoder->type == INTEL_OUTPUT_HDMI) {
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
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bret = skl_ddi_hdmi_pll_dividers(crtc, crtc_state, clock);
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if (!bret) {
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DRM_DEBUG_KMS("Could not get HDMI pll dividers.\n");
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return NULL;
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}
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} else if (encoder->type == INTEL_OUTPUT_DP ||
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encoder->type == INTEL_OUTPUT_DP_MST ||
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encoder->type == INTEL_OUTPUT_EDP) {
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} else if (intel_crtc_has_dp_encoder(crtc_state)) {
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bret = skl_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state);
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if (!bret) {
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DRM_DEBUG_KMS("Could not set DP dpll HW state.\n");
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@ -1388,7 +1382,7 @@ skl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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return NULL;
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}
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if (encoder->type == INTEL_OUTPUT_EDP)
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
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pll = intel_find_shared_dpll(crtc, crtc_state,
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DPLL_ID_SKL_DPLL0,
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DPLL_ID_SKL_DPLL0);
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@ -1812,14 +1806,12 @@ bxt_get_dpll(struct intel_crtc *crtc,
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struct intel_shared_dpll *pll;
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int i, clock = crtc_state->port_clock;
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if (encoder->type == INTEL_OUTPUT_HDMI &&
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&
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!bxt_ddi_hdmi_set_dpll_hw_state(crtc, crtc_state, clock,
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&dpll_hw_state))
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return NULL;
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if ((encoder->type == INTEL_OUTPUT_DP ||
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encoder->type == INTEL_OUTPUT_EDP ||
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encoder->type == INTEL_OUTPUT_DP_MST) &&
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if (intel_crtc_has_dp_encoder(crtc_state) &&
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!bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
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return NULL;
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@ -1828,7 +1820,7 @@ bxt_get_dpll(struct intel_crtc *crtc,
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crtc_state->dpll_hw_state = dpll_hw_state;
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if (encoder->type == INTEL_OUTPUT_DP_MST) {
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) {
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struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
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intel_dig_port = intel_mst->primary;
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@ -2345,15 +2337,13 @@ cnl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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memset(&dpll_hw_state, 0, sizeof(dpll_hw_state));
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if (encoder->type == INTEL_OUTPUT_HDMI) {
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if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
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bret = cnl_ddi_hdmi_pll_dividers(crtc, crtc_state, clock);
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if (!bret) {
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DRM_DEBUG_KMS("Could not get HDMI pll dividers.\n");
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return NULL;
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}
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} else if (encoder->type == INTEL_OUTPUT_DP ||
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encoder->type == INTEL_OUTPUT_DP_MST ||
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encoder->type == INTEL_OUTPUT_EDP) {
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} else if (intel_crtc_has_dp_encoder(crtc_state)) {
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bret = cnl_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state);
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if (!bret) {
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DRM_DEBUG_KMS("Could not set DP dpll HW state.\n");
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@ -2361,8 +2351,8 @@ cnl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
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}
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crtc_state->dpll_hw_state = dpll_hw_state;
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} else {
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DRM_DEBUG_KMS("Skip DPLL setup for encoder %d\n",
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encoder->type);
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DRM_DEBUG_KMS("Skip DPLL setup for output_types 0x%x\n",
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crtc_state->output_types);
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return NULL;
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}
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