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ARC: mm: TLB Miss optim: avoid re-reading ECR 

For setting PTE Dirty bit, reuse the prior test for ST miss.

No need to reload ECR and test for ST cause code as the prev
condition code is still valid (uncloberred)

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta 2015-10-29 15:47:57 +05:30
parent 0fb1f35ed9
commit f4e2f7cc69
1 changed files with 0 additions and 2 deletions
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arch/arc/mm/tlbex.S
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@ -380,9 +380,7 @@ ENTRY(EV_TLBMissD)
;----------------------------------------------------------------
; UPDATE_PTE: Let Linux VM know that page was accessed/dirty
lr r3, [ecr]
or r0, r0, _PAGE_ACCESSED ; Accessed bit always
btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ?
or.nz r0, r0, _PAGE_DIRTY ; if Write, set Dirty bit as well
st_s r0, [r1] ; Write back PTE