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drm/i915/icl: WaAllowUMDToModifySamplerMode 

Required for Bindless samplers.
Userspace consumer: mesa

V2: Rebase
V3: Update commit message

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181030084504.21537-4-radhakrishna.sripada@intel.com
This commit is contained in:
Oscar Mateo 2018-10-30 01:45:04 -07:00 committed by Rodrigo Vivi
parent 6a00b8feb8
commit f57f9371e2
2 changed files with 5 additions and 0 deletions
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2
drivers/gpu/drm/i915/i915_reg.h
View File

@ -8652,6 +8652,8 @@ enum {
#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
#define GEN10_SAMPLER_MODE _MMIO(0xE18C)
/* IVYBRIDGE DPF */
#define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */
#define GEN7_L3CDERRST1_ROW_MASK (0x7ff << 14)

3
drivers/gpu/drm/i915/intel_workarounds.c
View File

@ -1018,6 +1018,9 @@ static void icl_whitelist_build(struct whitelist *w)
{
/* WaAllowUMDToModifyHalfSliceChicken7:icl */
whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7);
/* WaAllowUMDToModifySamplerMode:icl */
whitelist_reg(w, GEN10_SAMPLER_MODE);
}
static struct whitelist *whitelist_build(struct intel_engine_cs *engine,