mirror of https://gitee.com/openkylin/linux.git
ARMv7 Vexpress updates/fixes for v4.7
1. Support for external expansion bus useful for additional hardware
e.g. LogicTile Express daughterboards (Brian Starkey)
2. Fix for device node name unit-address presence/absence warnings
enabled in recently update DTC (Sudeep Holla)
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Merge tag 'vexpress-for-v4.7/updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt
Merge "ARMv7 Vexpress updates/fixes for v4.7" from Sudeep Holla:
1. Support for external expansion bus useful for additional hardware
e.g. LogicTile Express daughterboards (Brian Starkey)
2. Fix for device node name unit-address presence/absence warnings
enabled in recently update DTC (Sudeep Holla)
* tag 'vexpress-for-v4.7/updates' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: Add external expansion bus to DT
ARM: dts: vexpress: fix node name unit-address presence warnings
This commit is contained in:
Arnd Bergmann
commit
f598f176fd
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@ -75,19 +75,19 @@ v2m_sysreg: sysreg@010000 {
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compatible = "arm,vexpress-sysreg";
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reg = <0x010000 0x1000>;
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v2m_led_gpios: sys_led@08 {
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v2m_led_gpios: sys_led {
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compatible = "arm,vexpress-sysreg,sys_led";
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gpio-controller;
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#gpio-cells = <2>;
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};
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v2m_mmc_gpios: sys_mci@48 {
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v2m_mmc_gpios: sys_mci {
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compatible = "arm,vexpress-sysreg,sys_mci";
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gpio-controller;
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#gpio-cells = <2>;
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};
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v2m_flash_gpios: sys_flash@4c {
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v2m_flash_gpios: sys_flash {
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compatible = "arm,vexpress-sysreg,sys_flash";
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gpio-controller;
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#gpio-cells = <2>;
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@ -286,7 +286,7 @@ panel-timing {
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};
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};
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v2m_fixed_3v3: fixedregulator@0 {
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v2m_fixed_3v3: fixed-regulator-0 {
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compatible = "regulator-fixed";
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regulator-name = "3V3";
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regulator-min-microvolt = <3300000>;
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@ -318,49 +318,49 @@ v2m_refclk32khz: refclk32khz {
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leds {
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compatible = "gpio-leds";
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user@1 {
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user1 {
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label = "v2m:green:user1";
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gpios = <&v2m_led_gpios 0 0>;
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linux,default-trigger = "heartbeat";
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};
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user@2 {
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user2 {
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label = "v2m:green:user2";
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gpios = <&v2m_led_gpios 1 0>;
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linux,default-trigger = "mmc0";
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};
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user@3 {
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user3 {
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label = "v2m:green:user3";
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gpios = <&v2m_led_gpios 2 0>;
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linux,default-trigger = "cpu0";
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};
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user@4 {
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user4 {
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label = "v2m:green:user4";
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gpios = <&v2m_led_gpios 3 0>;
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linux,default-trigger = "cpu1";
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};
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user@5 {
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user5 {
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label = "v2m:green:user5";
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gpios = <&v2m_led_gpios 4 0>;
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linux,default-trigger = "cpu2";
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};
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user@6 {
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user6 {
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label = "v2m:green:user6";
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gpios = <&v2m_led_gpios 5 0>;
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linux,default-trigger = "cpu3";
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};
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user@7 {
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user7 {
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label = "v2m:green:user7";
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gpios = <&v2m_led_gpios 6 0>;
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linux,default-trigger = "cpu4";
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};
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user@8 {
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user8 {
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label = "v2m:green:user8";
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gpios = <&v2m_led_gpios 7 0>;
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linux,default-trigger = "cpu5";
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@ -371,7 +371,7 @@ mcc {
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compatible = "arm,vexpress,config-bus";
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arm,vexpress,config-bridge = <&v2m_sysreg>;
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osc@0 {
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oscclk0 {
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/* MCC static memory clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 0>;
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@ -380,7 +380,7 @@ osc@0 {
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clock-output-names = "v2m:oscclk0";
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};
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v2m_oscclk1: osc@1 {
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v2m_oscclk1: oscclk1 {
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/* CLCD clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 1>;
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@ -389,7 +389,7 @@ v2m_oscclk1: osc@1 {
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clock-output-names = "v2m:oscclk1";
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};
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v2m_oscclk2: osc@2 {
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v2m_oscclk2: oscclk2 {
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/* IO FPGA peripheral clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 2>;
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@ -398,7 +398,7 @@ v2m_oscclk2: osc@2 {
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clock-output-names = "v2m:oscclk2";
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};
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volt@0 {
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volt-vio {
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/* Logic level voltage */
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compatible = "arm,vexpress-volt";
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arm,vexpress-sysreg,func = <2 0>;
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@ -407,34 +407,34 @@ volt@0 {
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label = "VIO";
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};
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temp@0 {
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temp-mcc {
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/* MCC internal operating temperature */
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compatible = "arm,vexpress-temp";
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arm,vexpress-sysreg,func = <4 0>;
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label = "MCC";
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};
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reset@0 {
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reset {
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compatible = "arm,vexpress-reset";
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arm,vexpress-sysreg,func = <5 0>;
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};
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muxfpga@0 {
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muxfpga {
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compatible = "arm,vexpress-muxfpga";
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arm,vexpress-sysreg,func = <7 0>;
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};
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shutdown@0 {
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shutdown {
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compatible = "arm,vexpress-shutdown";
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arm,vexpress-sysreg,func = <8 0>;
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};
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reboot@0 {
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reboot {
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compatible = "arm,vexpress-reboot";
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arm,vexpress-sysreg,func = <9 0>;
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};
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dvimode@0 {
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dvimode {
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compatible = "arm,vexpress-dvimode";
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arm,vexpress-sysreg,func = <11 0>;
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};
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@ -74,19 +74,19 @@ v2m_sysreg: sysreg@00000 {
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compatible = "arm,vexpress-sysreg";
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reg = <0x00000 0x1000>;
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v2m_led_gpios: sys_led@08 {
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v2m_led_gpios: sys_led {
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compatible = "arm,vexpress-sysreg,sys_led";
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gpio-controller;
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#gpio-cells = <2>;
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};
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v2m_mmc_gpios: sys_mci@48 {
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v2m_mmc_gpios: sys_mci {
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compatible = "arm,vexpress-sysreg,sys_mci";
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gpio-controller;
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#gpio-cells = <2>;
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};
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v2m_flash_gpios: sys_flash@4c {
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v2m_flash_gpios: sys_flash {
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compatible = "arm,vexpress-sysreg,sys_flash";
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gpio-controller;
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#gpio-cells = <2>;
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@ -285,7 +285,7 @@ panel-timing {
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};
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};
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v2m_fixed_3v3: fixedregulator@0 {
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v2m_fixed_3v3: fixed-regulator-0 {
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compatible = "regulator-fixed";
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regulator-name = "3V3";
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regulator-min-microvolt = <3300000>;
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@ -317,49 +317,49 @@ v2m_refclk32khz: refclk32khz {
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leds {
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compatible = "gpio-leds";
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user@1 {
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user1 {
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label = "v2m:green:user1";
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gpios = <&v2m_led_gpios 0 0>;
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linux,default-trigger = "heartbeat";
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};
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user@2 {
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user2 {
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label = "v2m:green:user2";
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gpios = <&v2m_led_gpios 1 0>;
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linux,default-trigger = "mmc0";
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};
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user@3 {
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user3 {
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label = "v2m:green:user3";
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gpios = <&v2m_led_gpios 2 0>;
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linux,default-trigger = "cpu0";
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};
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user@4 {
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user4 {
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label = "v2m:green:user4";
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gpios = <&v2m_led_gpios 3 0>;
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linux,default-trigger = "cpu1";
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};
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user@5 {
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user5 {
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label = "v2m:green:user5";
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gpios = <&v2m_led_gpios 4 0>;
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linux,default-trigger = "cpu2";
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};
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user@6 {
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user6 {
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label = "v2m:green:user6";
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gpios = <&v2m_led_gpios 5 0>;
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linux,default-trigger = "cpu3";
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};
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user@7 {
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user7 {
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label = "v2m:green:user7";
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gpios = <&v2m_led_gpios 6 0>;
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linux,default-trigger = "cpu4";
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};
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user@8 {
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user8 {
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label = "v2m:green:user8";
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gpios = <&v2m_led_gpios 7 0>;
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linux,default-trigger = "cpu5";
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|
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@ -370,7 +370,7 @@ mcc {
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compatible = "arm,vexpress,config-bus";
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arm,vexpress,config-bridge = <&v2m_sysreg>;
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osc@0 {
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oscclk0 {
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/* MCC static memory clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 0>;
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@ -379,7 +379,7 @@ osc@0 {
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clock-output-names = "v2m:oscclk0";
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};
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v2m_oscclk1: osc@1 {
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v2m_oscclk1: oscclk1 {
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/* CLCD clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 1>;
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@ -388,7 +388,7 @@ v2m_oscclk1: osc@1 {
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clock-output-names = "v2m:oscclk1";
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};
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v2m_oscclk2: osc@2 {
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v2m_oscclk2: oscclk2 {
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/* IO FPGA peripheral clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 2>;
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@ -397,7 +397,7 @@ v2m_oscclk2: osc@2 {
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clock-output-names = "v2m:oscclk2";
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};
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volt@0 {
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volt-vio {
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/* Logic level voltage */
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compatible = "arm,vexpress-volt";
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arm,vexpress-sysreg,func = <2 0>;
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|
|
@ -406,34 +406,34 @@ volt@0 {
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label = "VIO";
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};
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temp@0 {
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temp-mcc {
|
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/* MCC internal operating temperature */
|
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compatible = "arm,vexpress-temp";
|
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arm,vexpress-sysreg,func = <4 0>;
|
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label = "MCC";
|
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};
|
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reset@0 {
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||||
reset {
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||||
compatible = "arm,vexpress-reset";
|
||||
arm,vexpress-sysreg,func = <5 0>;
|
||||
};
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|
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muxfpga@0 {
|
||||
muxfpga {
|
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compatible = "arm,vexpress-muxfpga";
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||||
arm,vexpress-sysreg,func = <7 0>;
|
||||
};
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shutdown@0 {
|
||||
shutdown {
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||||
compatible = "arm,vexpress-shutdown";
|
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arm,vexpress-sysreg,func = <8 0>;
|
||||
};
|
||||
|
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reboot@0 {
|
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reboot {
|
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compatible = "arm,vexpress-reboot";
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||||
arm,vexpress-sysreg,func = <9 0>;
|
||||
};
|
||||
|
||||
dvimode@0 {
|
||||
dvimode {
|
||||
compatible = "arm,vexpress-dvimode";
|
||||
arm,vexpress-sysreg,func = <11 0>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -55,14 +55,14 @@ hdlcd@2b000000 {
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|||
compatible = "arm,hdlcd";
|
||||
reg = <0 0x2b000000 0 0x1000>;
|
||||
interrupts = <0 85 4>;
|
||||
clocks = <&oscclk5>;
|
||||
clocks = <&hdlcd_clk>;
|
||||
clock-names = "pxlclk";
|
||||
};
|
||||
|
||||
memory-controller@2b0a0000 {
|
||||
compatible = "arm,pl341", "arm,primecell";
|
||||
reg = <0 0x2b0a0000 0 0x1000>;
|
||||
clocks = <&oscclk7>;
|
||||
clocks = <&sys_pll>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
|
|
@ -71,7 +71,7 @@ wdt@2b060000 {
|
|||
status = "disabled";
|
||||
reg = <0 0x2b060000 0 0x1000>;
|
||||
interrupts = <0 98 4>;
|
||||
clocks = <&oscclk7>;
|
||||
clocks = <&sys_pll>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
|
|
@ -92,7 +92,7 @@ memory-controller@7ffd0000 {
|
|||
reg = <0 0x7ffd0000 0 0x1000>;
|
||||
interrupts = <0 86 4>,
|
||||
<0 87 4>;
|
||||
clocks = <&oscclk7>;
|
||||
clocks = <&sys_pll>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
|
|
@ -104,7 +104,7 @@ dma@7ffb0000 {
|
|||
<0 89 4>,
|
||||
<0 90 4>,
|
||||
<0 91 4>;
|
||||
clocks = <&oscclk7>;
|
||||
clocks = <&sys_pll>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
|
|
@ -126,7 +126,7 @@ dcc {
|
|||
compatible = "arm,vexpress,config-bus";
|
||||
arm,vexpress,config-bridge = <&v2m_sysreg>;
|
||||
|
||||
osc@0 {
|
||||
oscclk0 {
|
||||
/* CPU PLL reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 0>;
|
||||
|
|
@ -135,7 +135,7 @@ osc@0 {
|
|||
clock-output-names = "oscclk0";
|
||||
};
|
||||
|
||||
osc@4 {
|
||||
oscclk4 {
|
||||
/* Multiplexed AXI master clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 4>;
|
||||
|
|
@ -144,7 +144,7 @@ osc@4 {
|
|||
clock-output-names = "oscclk4";
|
||||
};
|
||||
|
||||
oscclk5: osc@5 {
|
||||
hdlcd_clk: oscclk5 {
|
||||
/* HDLCD PLL reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 5>;
|
||||
|
|
@ -153,7 +153,7 @@ oscclk5: osc@5 {
|
|||
clock-output-names = "oscclk5";
|
||||
};
|
||||
|
||||
smbclk: osc@6 {
|
||||
smbclk: oscclk6 {
|
||||
/* SMB clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 6>;
|
||||
|
|
@ -162,7 +162,7 @@ smbclk: osc@6 {
|
|||
clock-output-names = "oscclk6";
|
||||
};
|
||||
|
||||
oscclk7: osc@7 {
|
||||
sys_pll: oscclk7 {
|
||||
/* SYS PLL reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 7>;
|
||||
|
|
@ -171,7 +171,7 @@ oscclk7: osc@7 {
|
|||
clock-output-names = "oscclk7";
|
||||
};
|
||||
|
||||
osc@8 {
|
||||
oscclk8 {
|
||||
/* DDR2 PLL reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 8>;
|
||||
|
|
@ -180,7 +180,7 @@ osc@8 {
|
|||
clock-output-names = "oscclk8";
|
||||
};
|
||||
|
||||
volt@0 {
|
||||
volt-cores {
|
||||
/* CPU core voltage */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 0>;
|
||||
|
|
@ -191,28 +191,28 @@ volt@0 {
|
|||
label = "Cores";
|
||||
};
|
||||
|
||||
amp@0 {
|
||||
amp-cores {
|
||||
/* Total current for the two cores */
|
||||
compatible = "arm,vexpress-amp";
|
||||
arm,vexpress-sysreg,func = <3 0>;
|
||||
label = "Cores";
|
||||
};
|
||||
|
||||
temp@0 {
|
||||
temp-dcc {
|
||||
/* DCC internal temperature */
|
||||
compatible = "arm,vexpress-temp";
|
||||
arm,vexpress-sysreg,func = <4 0>;
|
||||
label = "DCC";
|
||||
};
|
||||
|
||||
power@0 {
|
||||
power-cores {
|
||||
/* Total power */
|
||||
compatible = "arm,vexpress-power";
|
||||
arm,vexpress-sysreg,func = <12 0>;
|
||||
label = "Cores";
|
||||
};
|
||||
|
||||
energy@0 {
|
||||
energy {
|
||||
/* Total energy */
|
||||
compatible = "arm,vexpress-energy";
|
||||
arm,vexpress-sysreg,func = <13 0>;
|
||||
|
|
@ -220,7 +220,7 @@ energy@0 {
|
|||
};
|
||||
};
|
||||
|
||||
smb {
|
||||
smb@08000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
|
|
@ -280,4 +280,17 @@ smb {
|
|||
|
||||
/include/ "vexpress-v2m-rs1.dtsi"
|
||||
};
|
||||
|
||||
site2: hsb@40000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40000000 0x3fef0000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 3>;
|
||||
interrupt-map = <0 0 &gic 0 36 4>,
|
||||
<0 1 &gic 0 37 4>,
|
||||
<0 2 &gic 0 38 4>,
|
||||
<0 3 &gic 0 39 4>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -109,7 +109,7 @@ hdlcd@2b000000 {
|
|||
compatible = "arm,hdlcd";
|
||||
reg = <0 0x2b000000 0 0x1000>;
|
||||
interrupts = <0 85 4>;
|
||||
clocks = <&oscclk5>;
|
||||
clocks = <&hdlcd_clk>;
|
||||
clock-names = "pxlclk";
|
||||
};
|
||||
|
||||
|
|
@ -227,7 +227,7 @@ dcc {
|
|||
compatible = "arm,vexpress,config-bus";
|
||||
arm,vexpress,config-bridge = <&v2m_sysreg>;
|
||||
|
||||
osc@0 {
|
||||
oscclk0 {
|
||||
/* A15 PLL 0 reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 0>;
|
||||
|
|
@ -236,7 +236,7 @@ osc@0 {
|
|||
clock-output-names = "oscclk0";
|
||||
};
|
||||
|
||||
osc@1 {
|
||||
oscclk1 {
|
||||
/* A15 PLL 1 reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 1>;
|
||||
|
|
@ -245,7 +245,7 @@ osc@1 {
|
|||
clock-output-names = "oscclk1";
|
||||
};
|
||||
|
||||
osc@2 {
|
||||
oscclk2 {
|
||||
/* A7 PLL 0 reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 2>;
|
||||
|
|
@ -254,7 +254,7 @@ osc@2 {
|
|||
clock-output-names = "oscclk2";
|
||||
};
|
||||
|
||||
osc@3 {
|
||||
oscclk3 {
|
||||
/* A7 PLL 1 reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 3>;
|
||||
|
|
@ -263,7 +263,7 @@ osc@3 {
|
|||
clock-output-names = "oscclk3";
|
||||
};
|
||||
|
||||
osc@4 {
|
||||
oscclk4 {
|
||||
/* External AXI master clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 4>;
|
||||
|
|
@ -272,7 +272,7 @@ osc@4 {
|
|||
clock-output-names = "oscclk4";
|
||||
};
|
||||
|
||||
oscclk5: osc@5 {
|
||||
hdlcd_clk: oscclk5 {
|
||||
/* HDLCD PLL reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 5>;
|
||||
|
|
@ -281,7 +281,7 @@ oscclk5: osc@5 {
|
|||
clock-output-names = "oscclk5";
|
||||
};
|
||||
|
||||
smbclk: osc@6 {
|
||||
smbclk: oscclk6 {
|
||||
/* Static memory controller clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 6>;
|
||||
|
|
@ -290,7 +290,7 @@ smbclk: osc@6 {
|
|||
clock-output-names = "oscclk6";
|
||||
};
|
||||
|
||||
osc@7 {
|
||||
oscclk7 {
|
||||
/* SYS PLL reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 7>;
|
||||
|
|
@ -299,7 +299,7 @@ osc@7 {
|
|||
clock-output-names = "oscclk7";
|
||||
};
|
||||
|
||||
osc@8 {
|
||||
oscclk8 {
|
||||
/* DDR2 PLL reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 8>;
|
||||
|
|
@ -308,7 +308,7 @@ osc@8 {
|
|||
clock-output-names = "oscclk8";
|
||||
};
|
||||
|
||||
volt@0 {
|
||||
volt-a15 {
|
||||
/* A15 CPU core voltage */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 0>;
|
||||
|
|
@ -319,7 +319,7 @@ volt@0 {
|
|||
label = "A15 Vcore";
|
||||
};
|
||||
|
||||
volt@1 {
|
||||
volt-a7 {
|
||||
/* A7 CPU core voltage */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 1>;
|
||||
|
|
@ -330,49 +330,49 @@ volt@1 {
|
|||
label = "A7 Vcore";
|
||||
};
|
||||
|
||||
amp@0 {
|
||||
amp-a15 {
|
||||
/* Total current for the two A15 cores */
|
||||
compatible = "arm,vexpress-amp";
|
||||
arm,vexpress-sysreg,func = <3 0>;
|
||||
label = "A15 Icore";
|
||||
};
|
||||
|
||||
amp@1 {
|
||||
amp-a7 {
|
||||
/* Total current for the three A7 cores */
|
||||
compatible = "arm,vexpress-amp";
|
||||
arm,vexpress-sysreg,func = <3 1>;
|
||||
label = "A7 Icore";
|
||||
};
|
||||
|
||||
temp@0 {
|
||||
temp-dcc {
|
||||
/* DCC internal temperature */
|
||||
compatible = "arm,vexpress-temp";
|
||||
arm,vexpress-sysreg,func = <4 0>;
|
||||
label = "DCC";
|
||||
};
|
||||
|
||||
power@0 {
|
||||
power-a15 {
|
||||
/* Total power for the two A15 cores */
|
||||
compatible = "arm,vexpress-power";
|
||||
arm,vexpress-sysreg,func = <12 0>;
|
||||
label = "A15 Pcore";
|
||||
};
|
||||
|
||||
power@1 {
|
||||
power-a7 {
|
||||
/* Total power for the three A7 cores */
|
||||
compatible = "arm,vexpress-power";
|
||||
arm,vexpress-sysreg,func = <12 1>;
|
||||
label = "A7 Pcore";
|
||||
};
|
||||
|
||||
energy@0 {
|
||||
energy-a15 {
|
||||
/* Total energy for the two A15 cores */
|
||||
compatible = "arm,vexpress-energy";
|
||||
arm,vexpress-sysreg,func = <13 0>, <13 1>;
|
||||
label = "A15 Jcore";
|
||||
};
|
||||
|
||||
energy@2 {
|
||||
energy-a7 {
|
||||
/* Total energy for the three A7 cores */
|
||||
compatible = "arm,vexpress-energy";
|
||||
arm,vexpress-sysreg,func = <13 2>, <13 3>;
|
||||
|
|
@ -387,7 +387,7 @@ etb@0,20010000 {
|
|||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
port {
|
||||
etb_in_port: endpoint@0 {
|
||||
etb_in_port: endpoint {
|
||||
slave-mode;
|
||||
remote-endpoint = <&replicator_out_port0>;
|
||||
};
|
||||
|
|
@ -401,7 +401,7 @@ tpiu@0,20030000 {
|
|||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
port {
|
||||
tpiu_in_port: endpoint@0 {
|
||||
tpiu_in_port: endpoint {
|
||||
slave-mode;
|
||||
remote-endpoint = <&replicator_out_port1>;
|
||||
};
|
||||
|
|
@ -578,7 +578,7 @@ etm2_out_port: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
smb {
|
||||
smb@08000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
|
|
@ -638,4 +638,17 @@ smb {
|
|||
|
||||
/include/ "vexpress-v2m-rs1.dtsi"
|
||||
};
|
||||
|
||||
site2: hsb@40000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40000000 0x3fef0000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 3>;
|
||||
interrupt-map = <0 0 &gic 0 36 4>,
|
||||
<0 1 &gic 0 37 4>,
|
||||
<0 2 &gic 0 38 4>,
|
||||
<0 3 &gic 0 39 4>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -57,14 +57,14 @@ hdlcd@2a110000 {
|
|||
compatible = "arm,hdlcd";
|
||||
reg = <0x2a110000 0x1000>;
|
||||
interrupts = <0 85 4>;
|
||||
clocks = <&oscclk3>;
|
||||
clocks = <&hdlcd_clk>;
|
||||
clock-names = "pxlclk";
|
||||
};
|
||||
|
||||
memory-controller@2a150000 {
|
||||
compatible = "arm,pl341", "arm,primecell";
|
||||
reg = <0x2a150000 0x1000>;
|
||||
clocks = <&oscclk1>;
|
||||
clocks = <&axi_clk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
|
|
@ -73,7 +73,7 @@ memory-controller@2a190000 {
|
|||
reg = <0x2a190000 0x1000>;
|
||||
interrupts = <0 86 4>,
|
||||
<0 87 4>;
|
||||
clocks = <&oscclk1>;
|
||||
clocks = <&axi_clk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
|
|
@ -93,7 +93,7 @@ timer@2c000200 {
|
|||
"arm,cortex-a9-global-timer";
|
||||
reg = <0x2c000200 0x20>;
|
||||
interrupts = <1 11 0x304>;
|
||||
clocks = <&oscclk0>;
|
||||
clocks = <&cpu_clk>;
|
||||
};
|
||||
|
||||
watchdog@2c000620 {
|
||||
|
|
@ -128,7 +128,7 @@ dcc {
|
|||
compatible = "arm,vexpress,config-bus";
|
||||
arm,vexpress,config-bridge = <&v2m_sysreg>;
|
||||
|
||||
oscclk0: osc@0 {
|
||||
cpu_clk: oscclk0 {
|
||||
/* CPU and internal AXI reference clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 0>;
|
||||
|
|
@ -137,7 +137,7 @@ oscclk0: osc@0 {
|
|||
clock-output-names = "oscclk0";
|
||||
};
|
||||
|
||||
oscclk1: osc@1 {
|
||||
axi_clk: oscclk1 {
|
||||
/* Multiplexed AXI master clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 1>;
|
||||
|
|
@ -146,7 +146,7 @@ oscclk1: osc@1 {
|
|||
clock-output-names = "oscclk1";
|
||||
};
|
||||
|
||||
osc@2 {
|
||||
oscclk2 {
|
||||
/* DDR2 */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 2>;
|
||||
|
|
@ -155,7 +155,7 @@ osc@2 {
|
|||
clock-output-names = "oscclk2";
|
||||
};
|
||||
|
||||
oscclk3: osc@3 {
|
||||
hdlcd_clk: oscclk3 {
|
||||
/* HDLCD */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 3>;
|
||||
|
|
@ -164,7 +164,7 @@ oscclk3: osc@3 {
|
|||
clock-output-names = "oscclk3";
|
||||
};
|
||||
|
||||
osc@4 {
|
||||
oscclk4 {
|
||||
/* Test chip gate configuration */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 4>;
|
||||
|
|
@ -173,7 +173,7 @@ osc@4 {
|
|||
clock-output-names = "oscclk4";
|
||||
};
|
||||
|
||||
smbclk: osc@5 {
|
||||
smbclk: oscclk5 {
|
||||
/* SMB clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 5>;
|
||||
|
|
@ -182,7 +182,7 @@ smbclk: osc@5 {
|
|||
clock-output-names = "oscclk5";
|
||||
};
|
||||
|
||||
temp@0 {
|
||||
temp-dcc {
|
||||
/* DCC internal operating temperature */
|
||||
compatible = "arm,vexpress-temp";
|
||||
arm,vexpress-sysreg,func = <4 0>;
|
||||
|
|
@ -190,7 +190,7 @@ temp@0 {
|
|||
};
|
||||
};
|
||||
|
||||
smb {
|
||||
smb@08000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
|
|
@ -250,4 +250,17 @@ smb {
|
|||
|
||||
/include/ "vexpress-v2m-rs1.dtsi"
|
||||
};
|
||||
|
||||
site2: hsb@40000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x40000000 0x40000000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 3>;
|
||||
interrupt-map = <0 0 &gic 0 36 4>,
|
||||
<0 1 &gic 0 37 4>,
|
||||
<0 2 &gic 0 38 4>,
|
||||
<0 3 &gic 0 39 4>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -190,7 +190,7 @@ dcc {
|
|||
compatible = "arm,vexpress,config-bus";
|
||||
arm,vexpress,config-bridge = <&v2m_sysreg>;
|
||||
|
||||
osc@0 {
|
||||
oscclk0: extsaxiclk {
|
||||
/* ACLK clock to the AXI master port on the test chip */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 0>;
|
||||
|
|
@ -199,7 +199,7 @@ osc@0 {
|
|||
clock-output-names = "extsaxiclk";
|
||||
};
|
||||
|
||||
oscclk1: osc@1 {
|
||||
oscclk1: clcdclk {
|
||||
/* Reference clock for the CLCD */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 1>;
|
||||
|
|
@ -208,7 +208,7 @@ oscclk1: osc@1 {
|
|||
clock-output-names = "clcdclk";
|
||||
};
|
||||
|
||||
smbclk: oscclk2: osc@2 {
|
||||
smbclk: oscclk2: tcrefclk {
|
||||
/* Reference clock for the test chip internal PLLs */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 2>;
|
||||
|
|
@ -217,7 +217,7 @@ smbclk: oscclk2: osc@2 {
|
|||
clock-output-names = "tcrefclk";
|
||||
};
|
||||
|
||||
volt@0 {
|
||||
volt-vd10 {
|
||||
/* Test Chip internal logic voltage */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 0>;
|
||||
|
|
@ -226,7 +226,7 @@ volt@0 {
|
|||
label = "VD10";
|
||||
};
|
||||
|
||||
volt@1 {
|
||||
volt-vd10-s2 {
|
||||
/* PL310, L2 cache, RAM cell supply (not PL310 logic) */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 1>;
|
||||
|
|
@ -235,7 +235,7 @@ volt@1 {
|
|||
label = "VD10_S2";
|
||||
};
|
||||
|
||||
volt@2 {
|
||||
volt-vd10-s3 {
|
||||
/* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 2>;
|
||||
|
|
@ -244,7 +244,7 @@ volt@2 {
|
|||
label = "VD10_S3";
|
||||
};
|
||||
|
||||
volt@3 {
|
||||
volt-vcc1v8 {
|
||||
/* DDR2 SDRAM and Test Chip DDR2 I/O supply */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 3>;
|
||||
|
|
@ -253,7 +253,7 @@ volt@3 {
|
|||
label = "VCC1V8";
|
||||
};
|
||||
|
||||
volt@4 {
|
||||
volt-ddr2vtt {
|
||||
/* DDR2 SDRAM VTT termination voltage */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 4>;
|
||||
|
|
@ -262,7 +262,7 @@ volt@4 {
|
|||
label = "DDR2VTT";
|
||||
};
|
||||
|
||||
volt@5 {
|
||||
volt-vcc3v3 {
|
||||
/* Local board supply for miscellaneous logic external to the Test Chip */
|
||||
arm,vexpress-sysreg,func = <2 5>;
|
||||
compatible = "arm,vexpress-volt";
|
||||
|
|
@ -271,28 +271,28 @@ volt@5 {
|
|||
label = "VCC3V3";
|
||||
};
|
||||
|
||||
amp@0 {
|
||||
amp-vd10-s2 {
|
||||
/* PL310, L2 cache, RAM cell supply (not PL310 logic) */
|
||||
compatible = "arm,vexpress-amp";
|
||||
arm,vexpress-sysreg,func = <3 0>;
|
||||
label = "VD10_S2";
|
||||
};
|
||||
|
||||
amp@1 {
|
||||
amp-vd10-s3 {
|
||||
/* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
|
||||
compatible = "arm,vexpress-amp";
|
||||
arm,vexpress-sysreg,func = <3 1>;
|
||||
label = "VD10_S3";
|
||||
};
|
||||
|
||||
power@0 {
|
||||
power-vd10-s2 {
|
||||
/* PL310, L2 cache, RAM cell supply (not PL310 logic) */
|
||||
compatible = "arm,vexpress-power";
|
||||
arm,vexpress-sysreg,func = <12 0>;
|
||||
label = "PVD10_S2";
|
||||
};
|
||||
|
||||
power@1 {
|
||||
power-vd10-s3 {
|
||||
/* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */
|
||||
compatible = "arm,vexpress-power";
|
||||
arm,vexpress-sysreg,func = <12 1>;
|
||||
|
|
@ -300,7 +300,7 @@ power@1 {
|
|||
};
|
||||
};
|
||||
|
||||
smb {
|
||||
smb@04000000 {
|
||||
compatible = "simple-bus";
|
||||
|
||||
#address-cells = <2>;
|
||||
|
|
@ -359,4 +359,17 @@ smb {
|
|||
|
||||
/include/ "vexpress-v2m.dtsi"
|
||||
};
|
||||
|
||||
site2: hsb@e0000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0xe0000000 0x20000000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 3>;
|
||||
interrupt-map = <0 0 &gic 0 36 4>,
|
||||
<0 1 &gic 0 37 4>,
|
||||
<0 2 &gic 0 38 4>,
|
||||
<0 3 &gic 0 39 4>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue