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msm: clock: Add support for more proc_comm clocks
Add support for the ce, codec_ssbi, uart clocks, and i2c clocks. Reviewed-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
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@ -132,8 +132,10 @@
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#define P_CSI1_P_CLK 97
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#define P_CSI1_P_CLK 97
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#define P_GSBI_CLK 98
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#define P_GSBI_CLK 98
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#define P_GSBI_P_CLK 99
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#define P_GSBI_P_CLK 99
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#define P_CE_CLK 100 /* Crypto engine */
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#define P_CODEC_SSBI_CLK 101
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#define P_NR_CLKS 100
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#define P_NR_CLKS 102
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struct clk_ops;
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struct clk_ops;
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extern struct clk_ops clk_ops_pcom;
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extern struct clk_ops clk_ops_pcom;
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@ -133,6 +133,8 @@ struct clk msm_clocks_7x30[] = {
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CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
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CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
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CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0),
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CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0),
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CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF),
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CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF),
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CLK_PCOM("ce_clk", CE_CLK, NULL, 0),
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CLK_PCOM("codec_ssbi_clk", CODEC_SSBI_CLK, NULL, 0),
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CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
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CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
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CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
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CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
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CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
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CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
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@ -127,12 +127,14 @@ struct platform_device msm_device_hsusb_host = {
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struct clk msm_clocks_8x50[] = {
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struct clk msm_clocks_8x50[] = {
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CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
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CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
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CLK_PCOM("ce_clk", CE_CLK, NULL, 0),
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CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
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CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
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CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
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CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
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CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
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CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
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CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
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CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
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CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
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CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
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CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
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CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
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CLK_PCOM("i2c_clk", I2C_CLK, NULL, 0),
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CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
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CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
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CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
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CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
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CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
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CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
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@ -150,7 +152,11 @@ struct clk msm_clocks_8x50[] = {
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CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
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CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
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CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
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CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
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CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
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CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
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CLK_PCOM("uart_clk", UART1_CLK, NULL, OFF),
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CLK_PCOM("uart_clk", UART2_CLK, NULL, 0),
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CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
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CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
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CLK_PCOM("uartdm_clk", UART1DM_CLK, NULL, OFF),
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CLK_PCOM("uartdm_clk", UART2DM_CLK, NULL, 0),
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CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
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CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
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CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
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CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
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CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
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CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
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