mirror of https://gitee.com/openkylin/linux.git
bnx2x: correct & clean 10G EEE requirements
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -10203,8 +10203,9 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy,
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MDIO_84833_TOP_CFG_FW_REV, &val);
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MDIO_84833_TOP_CFG_FW_REV, &val);
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/* Configure EEE support */
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/* Configure EEE support */
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if ((val >= MDIO_84833_TOP_CFG_FW_EEE) && bnx2x_eee_has_cap(params)) {
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if ((val >= MDIO_84833_TOP_CFG_FW_EEE) &&
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phy->flags |= FLAGS_EEE_10GBT;
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(val != MDIO_84833_TOP_CFG_FW_NO_EEE) &&
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bnx2x_eee_has_cap(params)) {
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rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_10G_ADV);
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rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_10G_ADV);
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if (rc) {
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if (rc) {
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DP(NETIF_MSG_LINK, "Failed to configure EEE timers\n");
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DP(NETIF_MSG_LINK, "Failed to configure EEE timers\n");
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@ -10224,7 +10225,6 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy,
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return rc;
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return rc;
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}
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}
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} else {
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} else {
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phy->flags &= ~FLAGS_EEE_10GBT;
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vars->eee_status &= ~SHMEM_EEE_SUPPORTED_MASK;
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vars->eee_status &= ~SHMEM_EEE_SUPPORTED_MASK;
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}
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}
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@ -11619,8 +11619,7 @@ static struct bnx2x_phy phy_84833 = {
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.def_md_devad = 0,
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.def_md_devad = 0,
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.flags = (FLAGS_FAN_FAILURE_DET_REQ |
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.flags = (FLAGS_FAN_FAILURE_DET_REQ |
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FLAGS_REARM_LATCH_SIGNAL |
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FLAGS_REARM_LATCH_SIGNAL |
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FLAGS_TX_ERROR_CHECK |
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FLAGS_TX_ERROR_CHECK),
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FLAGS_EEE_10GBT),
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.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
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.rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
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.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
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.tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
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.mdio_ctrl = 0,
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.mdio_ctrl = 0,
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@ -155,7 +155,6 @@ struct bnx2x_phy {
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#define FLAGS_DUMMY_READ (1<<9)
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#define FLAGS_DUMMY_READ (1<<9)
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#define FLAGS_MDC_MDIO_WA_B0 (1<<10)
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#define FLAGS_MDC_MDIO_WA_B0 (1<<10)
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#define FLAGS_TX_ERROR_CHECK (1<<12)
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#define FLAGS_TX_ERROR_CHECK (1<<12)
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#define FLAGS_EEE_10GBT (1<<13)
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/* preemphasis values for the rx side */
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/* preemphasis values for the rx side */
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u16 rx_preemphasis[4];
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u16 rx_preemphasis[4];
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@ -6992,6 +6992,7 @@ Theotherbitsarereservedandshouldbezero*/
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/* BCM84833 only */
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/* BCM84833 only */
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#define MDIO_84833_TOP_CFG_FW_REV 0x400f
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#define MDIO_84833_TOP_CFG_FW_REV 0x400f
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#define MDIO_84833_TOP_CFG_FW_EEE 0x10b1
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#define MDIO_84833_TOP_CFG_FW_EEE 0x10b1
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#define MDIO_84833_TOP_CFG_FW_NO_EEE 0x1f81
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#define MDIO_84833_TOP_CFG_XGPHY_STRAP1 0x401a
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#define MDIO_84833_TOP_CFG_XGPHY_STRAP1 0x401a
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#define MDIO_84833_SUPER_ISOLATE 0x8000
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#define MDIO_84833_SUPER_ISOLATE 0x8000
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/* These are mailbox register set used by 84833. */
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/* These are mailbox register set used by 84833. */
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