mirror of https://gitee.com/openkylin/linux.git
drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment
This allows controlling which of the 8 lanes are used for 6 bit color. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -38,6 +38,8 @@ Required properties:
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Optional properties:
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- clock-names: the following clocks are optional:
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* "lut_clk"
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- qcom,lcdc-align-lsb: Boolean value indicating that LSB alignment should be
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used for LCDC. This is only valid for 18bpp panels.
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Example:
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@ -377,20 +377,25 @@ static void mdp4_lcdc_encoder_enable(struct drm_encoder *encoder)
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unsigned long pc = mdp4_lcdc_encoder->pixclock;
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struct mdp4_kms *mdp4_kms = get_kms(encoder);
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struct drm_panel *panel;
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uint32_t config;
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int i, ret;
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if (WARN_ON(mdp4_lcdc_encoder->enabled))
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return;
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/* TODO: hard-coded for 18bpp: */
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mdp4_crtc_set_config(encoder->crtc,
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MDP4_DMA_CONFIG_R_BPC(BPC6) |
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MDP4_DMA_CONFIG_G_BPC(BPC6) |
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MDP4_DMA_CONFIG_B_BPC(BPC6) |
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MDP4_DMA_CONFIG_PACK_ALIGN_MSB |
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MDP4_DMA_CONFIG_PACK(0x21) |
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MDP4_DMA_CONFIG_DEFLKR_EN |
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MDP4_DMA_CONFIG_DITHER_EN);
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config =
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MDP4_DMA_CONFIG_R_BPC(BPC6) |
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MDP4_DMA_CONFIG_G_BPC(BPC6) |
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MDP4_DMA_CONFIG_B_BPC(BPC6) |
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MDP4_DMA_CONFIG_PACK(0x21) |
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MDP4_DMA_CONFIG_DEFLKR_EN |
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MDP4_DMA_CONFIG_DITHER_EN;
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if (!of_property_read_bool(dev->dev->of_node, "qcom,lcdc-align-lsb"))
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config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB;
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mdp4_crtc_set_config(encoder->crtc, config);
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mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);
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bs_set(mdp4_lcdc_encoder, 1);
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