mirror of https://gitee.com/openkylin/linux.git
imx: reorder mx27.h
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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@ -24,9 +24,6 @@
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#ifndef __ASM_ARCH_MXC_MX27_H__
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#define __ASM_ARCH_MXC_MX27_H__
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/* IRAM */
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#define IRAM_BASE_ADDR 0xFFFF4C00 /* internal ram */
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#define MSHC_BASE_ADDR (AIPI_BASE_ADDR + 0x18000)
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#define GPT5_BASE_ADDR (AIPI_BASE_ADDR + 0x19000)
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#define GPT4_BASE_ADDR (AIPI_BASE_ADDR + 0x1A000)
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@ -60,7 +57,6 @@
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#define CS3_BASE_ADDR 0xD2000000
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#define CS4_BASE_ADDR 0xD4000000
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#define CS5_BASE_ADDR 0xD6000000
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#define PCMCIA_MEM_BASE_ADDR 0xDC000000
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/* NAND, SDRAM, WEIM, M3IF, EMI controllers */
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#define X_MEMC_BASE_ADDR 0xD8000000
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@ -73,38 +69,43 @@
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#define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000)
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#define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000)
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#define PCMCIA_MEM_BASE_ADDR 0xDC000000
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/* IRAM */
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#define IRAM_BASE_ADDR 0xFFFF4C00 /* internal ram */
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/* fixed interrupt numbers */
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#define MXC_INT_CCM 63
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#define MXC_INT_IIM 62
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#define MXC_INT_SAHARA 59
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#define MXC_INT_SCC_SCM 58
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#define MXC_INT_SCC_SMN 57
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#define MXC_INT_USB3 56
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#define MXC_INT_USB2 55
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#define MXC_INT_USB1 54
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#define MXC_INT_VPU 53
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#define MXC_INT_FEC 50
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#define MXC_INT_UART5 49
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#define MXC_INT_UART6 48
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#define MXC_INT_ATA 30
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#define MXC_INT_SDHC3 9
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#define MXC_INT_SDHC 7
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#define MXC_INT_RTIC 5
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#define MXC_INT_GPT4 4
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#define MXC_INT_GPT5 3
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#define MXC_INT_GPT6 2
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#define MXC_INT_I2C2 1
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#define MXC_INT_GPT6 2
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#define MXC_INT_GPT5 3
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#define MXC_INT_GPT4 4
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#define MXC_INT_RTIC 5
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#define MXC_INT_SDHC 7
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#define MXC_INT_SDHC3 9
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#define MXC_INT_ATA 30
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#define MXC_INT_UART6 48
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#define MXC_INT_UART5 49
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#define MXC_INT_FEC 50
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#define MXC_INT_VPU 53
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#define MXC_INT_USB1 54
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#define MXC_INT_USB2 55
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#define MXC_INT_USB3 56
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#define MXC_INT_SCC_SMN 57
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#define MXC_INT_SCC_SCM 58
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#define MXC_INT_SAHARA 59
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#define MXC_INT_IIM 62
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#define MXC_INT_CCM 63
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/* fixed DMA request numbers */
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#define DMA_REQ_NFC 37
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#define DMA_REQ_SDHC3 36
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#define DMA_REQ_UART6_RX 35
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#define DMA_REQ_UART6_TX 34
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#define DMA_REQ_UART5_RX 33
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#define DMA_REQ_UART5_TX 32
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#define DMA_REQ_ATA_RCV 29
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#define DMA_REQ_ATA_TX 28
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#define DMA_REQ_MSHC 4
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#define DMA_REQ_ATA_TX 28
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#define DMA_REQ_ATA_RCV 29
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#define DMA_REQ_UART5_TX 32
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#define DMA_REQ_UART5_RX 33
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#define DMA_REQ_UART6_TX 34
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#define DMA_REQ_UART6_RX 35
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#define DMA_REQ_SDHC3 36
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#define DMA_REQ_NFC 37
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/* silicon revisions specific to i.MX27 */
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#define CHIP_REV_1_0 0x00
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