mirror of https://gitee.com/openkylin/linux.git
x86: cacheinfo: replace sysfs interface for cache_disable feature
Impact: replace sysfs attribute Current interface violates against "one-value-per-sysfs-attribute rule". This patch replaces current attribute with two attributes -- one for each L3 Cache Index Disable register. Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <20090409131849.GJ31527@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -697,74 +697,70 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf)
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#define to_object(k) container_of(k, struct _index_kobject, kobj)
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#define to_object(k) container_of(k, struct _index_kobject, kobj)
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#define to_attr(a) container_of(a, struct _cache_attr, attr)
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#define to_attr(a) container_of(a, struct _cache_attr, attr)
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static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
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static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
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unsigned int index)
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{
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{
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const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
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int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
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int node = cpu_to_node(cpumask_first(mask));
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int node = cpu_to_node(cpu);
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struct pci_dev *dev = NULL;
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struct pci_dev *dev = node_to_k8_nb_misc(node);
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ssize_t ret = 0;
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unsigned int reg = 0;
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int i;
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if (!this_leaf->can_disable)
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if (!this_leaf->can_disable)
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return sprintf(buf, "Feature not enabled\n");
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dev = node_to_k8_nb_misc(node);
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if (!dev) {
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printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
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return -EINVAL;
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return -EINVAL;
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}
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for (i = 0; i < 2; i++) {
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if (!dev)
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unsigned int reg;
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return -EINVAL;
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pci_read_config_dword(dev, 0x1BC + i * 4, ®);
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pci_read_config_dword(dev, 0x1BC + index * 4, ®);
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return sprintf(buf, "%x\n", reg);
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ret += sprintf(buf, "%sEntry: %d\n", buf, i);
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ret += sprintf(buf, "%sReads: %s\tNew Entries: %s\n",
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buf,
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reg & 0x80000000 ? "Disabled" : "Allowed",
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reg & 0x40000000 ? "Disabled" : "Allowed");
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ret += sprintf(buf, "%sSubCache: %x\tIndex: %x\n",
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buf, (reg & 0x30000) >> 16, reg & 0xfff);
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}
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return ret;
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}
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}
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static ssize_t
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#define SHOW_CACHE_DISABLE(index) \
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store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf,
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static ssize_t \
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size_t count)
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show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf) \
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{ \
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return show_cache_disable(this_leaf, buf, index); \
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}
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SHOW_CACHE_DISABLE(0)
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SHOW_CACHE_DISABLE(1)
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static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
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const char *buf, size_t count, unsigned int index)
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{
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{
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const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
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int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
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int node = cpu_to_node(cpumask_first(mask));
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int node = cpu_to_node(cpu);
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struct pci_dev *dev = NULL;
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struct pci_dev *dev = node_to_k8_nb_misc(node);
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unsigned int ret, index, val;
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unsigned long val = 0;
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if (!this_leaf->can_disable)
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if (!this_leaf->can_disable)
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return -EINVAL;
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return -EINVAL;
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if (strlen(buf) > 15)
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if (!capable(CAP_SYS_ADMIN))
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return -EPERM;
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if (!dev)
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return -EINVAL;
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return -EINVAL;
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ret = sscanf(buf, "%x %x", &index, &val);
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if (strict_strtoul(buf, 10, &val) < 0)
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if (ret != 2)
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return -EINVAL;
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if (index > 1)
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return -EINVAL;
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return -EINVAL;
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val |= 0xc0000000;
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val |= 0xc0000000;
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dev = node_to_k8_nb_misc(node);
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if (!dev) {
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printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
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return -EINVAL;
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}
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pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
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pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
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wbinvd();
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wbinvd();
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pci_write_config_dword(dev, 0x1BC + index * 4, val);
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pci_write_config_dword(dev, 0x1BC + index * 4, val);
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return count;
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return 1;
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}
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}
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#define STORE_CACHE_DISABLE(index) \
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static ssize_t \
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store_cache_disable_##index(struct _cpuid4_info *this_leaf, \
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const char *buf, size_t count) \
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{ \
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return store_cache_disable(this_leaf, buf, count, index); \
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}
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STORE_CACHE_DISABLE(0)
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STORE_CACHE_DISABLE(1)
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struct _cache_attr {
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struct _cache_attr {
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struct attribute attr;
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struct attribute attr;
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ssize_t (*show)(struct _cpuid4_info *, char *);
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ssize_t (*show)(struct _cpuid4_info *, char *);
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@ -785,7 +781,10 @@ define_one_ro(size);
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define_one_ro(shared_cpu_map);
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define_one_ro(shared_cpu_map);
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define_one_ro(shared_cpu_list);
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define_one_ro(shared_cpu_list);
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static struct _cache_attr cache_disable = __ATTR(cache_disable, 0644, show_cache_disable, store_cache_disable);
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static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644,
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show_cache_disable_0, store_cache_disable_0);
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static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644,
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show_cache_disable_1, store_cache_disable_1);
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static struct attribute * default_attrs[] = {
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static struct attribute * default_attrs[] = {
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&type.attr,
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&type.attr,
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@ -797,7 +796,8 @@ static struct attribute * default_attrs[] = {
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&size.attr,
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&size.attr,
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&shared_cpu_map.attr,
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&shared_cpu_map.attr,
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&shared_cpu_list.attr,
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&shared_cpu_list.attr,
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&cache_disable.attr,
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&cache_disable_0.attr,
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&cache_disable_1.attr,
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NULL
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NULL
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};
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};
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