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irqchip: mips-gic: Add new functions to start/stop the GIC counter 

We add new functions to start and stop the GIC counter since there are no
guarantees the counter will be running after a CPU reset. The GIC counter
is stopped by setting the 29th bit on the GIC Config register and it is
started by clearing that bit.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: <linux-kernel@vger.kernel.org>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Link: https://lkml.kernel.org/r/1427113923-9840-2-git-send-email-markos.chandras@imgtec.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Markos Chandras 2015-03-23 12:32:01 +00:00 committed by Jason Cooper
parent 00e6743b5b
commit fa6ed4cb6f
2 changed files with 23 additions and 0 deletions
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21
drivers/irqchip/irq-mips-gic.c
View File

@ -166,6 +166,27 @@ cycle_t gic_read_compare(void)
return (((cycle_t) hi) << 32) + lo;
}
void gic_start_count(void)
{
u32 gicconfig;
/* Start the counter */
gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
gicconfig &= ~(1 << GIC_SH_CONFIG_COUNTSTOP_SHF);
gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
}
void gic_stop_count(void)
{
u32 gicconfig;
/* Stop the counter */
gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
gicconfig |= 1 << GIC_SH_CONFIG_COUNTSTOP_SHF;
gic_write(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
}
#endif
static bool gic_local_irq_is_routable(int intr)

2
include/linux/irqchip/mips-gic.h
View File

@ -240,6 +240,8 @@ extern unsigned int gic_get_count_width(void);
extern cycle_t gic_read_compare(void);
extern void gic_write_compare(cycle_t cnt);
extern void gic_write_cpu_compare(cycle_t cnt, int cpu);
extern void gic_start_count(void);
extern void gic_stop_count(void);
extern void gic_send_ipi(unsigned int intr);
extern unsigned int plat_ipi_call_int_xlate(unsigned int);
extern unsigned int plat_ipi_resched_int_xlate(unsigned int);