staging: rtl8188eu: fix typos in comments

Fix typos reported by checkpatch.pl

Signed-off-by: Sebastian Haas <sehaas@deebas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sebastian Haas 2017-03-04 23:06:17 +01:00 committed by Greg Kroah-Hartman
parent 3956c8ac39
commit fae4ab6b4b
7 changed files with 8 additions and 8 deletions

View File

@ -179,7 +179,7 @@
/* RxIQ DC offset, Rx digital filter, DC notch filter */
#define rOFDM0_XARxAFE 0xc10
#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */
#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */
#define rOFDM0_XBRxAFE 0xc18
#define rOFDM0_XBRxIQImbalance 0xc1c
#define rOFDM0_XCRxAFE 0xc20

View File

@ -37,7 +37,7 @@
/* resource allocation failed, unexpected HW behavior, HW BUG and so on. */
#define ODM_DBG_SERIOUS 2
/* Abnormal, rare, or unexpeted cases. */
/* Abnormal, rare, or unexpected cases. */
/* For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. */
#define ODM_DBG_WARNING 3

View File

@ -29,7 +29,7 @@
4: LPS--Low Power State
5: SUS--Suspend
The transision from different states are defined below
The transition from different states are defined below
TRANS_CARDEMU_TO_ACT
TRANS_ACT_TO_CARDEMU
TRANS_CARDEMU_TO_SUS

View File

@ -1350,7 +1350,7 @@ Current IOREG MAP
#define EEPROM_Default_CrystalCap_88E 0x20
#define EEPROM_Default_ThermalMeter_88E 0x18
/* New EFUSE deafult value */
/* New EFUSE default value */
#define EEPROM_DEFAULT_24G_INDEX 0x2D
#define EEPROM_DEFAULT_24G_HT20_DIFF 0X02
#define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04

View File

@ -214,7 +214,7 @@ struct set_assocsta_rsp {
mac[0] == 0
==> CMD mode, return H2C_SUCCESS.
The following condition must be ture under CMD mode
The following condition must be true under CMD mode
mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0;
s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7;
s2 == (b1 << 8 | b0);

View File

@ -198,7 +198,7 @@
#define rOFDM0_TRSWIsolation 0xc0c
#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */
#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */
#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */
#define rOFDM0_XBRxAFE 0xc18
#define rOFDM0_XBRxIQImbalance 0xc1c
#define rOFDM0_XCRxAFE 0xc20

View File

@ -106,7 +106,7 @@ struct rx_pkt_attrib {
u8 privacy; /* in frame_ctrl field */
u8 bdecrypted;
u8 encrypt; /* when 0 indicate no encrypt. when non-zero,
* indicate the encrypt algorith */
* indicate the encrypt algorithm */
u8 iv_len;
u8 icv_len;
u8 crc_err;
@ -176,7 +176,7 @@ struct recv_priv {
struct sk_buff_head rx_skb_queue;
struct recv_buf *precv_buf; /* 4 alignment */
struct __queue free_recv_buf_queue;
/* For display the phy informatiom */
/* For display the phy information */
s8 rssi;
s8 rxpwdb;
u8 signal_strength;