mirror of https://gitee.com/openkylin/linux.git
arm-soc: bug fixes for 3.9-rc4
Four patches for arm-soc this week: - Kevin Hilman is no longer reachable under his previous email address. He submitted the patch earlier, but nobody felt responsible to pick it up. - One Tegra fix for an incorect register address in device tree. - IMX multiplatform support exposes a configuration option that leads to unbootable kernels on all other machines and that needs to depend on that platform. - A nontrivial bug fix for the setup of the mxs video output. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUVBQf2CrR//JCVInAQJwyRAA0qzt+jbn+ezvLpeWvrgdEVLikiAieVyt HmSex/pEWh2ytIkrX2maHv5Oov9QmX7v4ZEU2WtdvMv5YERsT7/y1hjHaZTLcdmH 11ogfVwTRbrNVWOb41ofdd3rUVgZfgzCGQ0rfEua3wLRK6AetZJxkqsuGXRaqjdm BBbmgKAmLsLeM3/aBzeuFint1+EDY74WBMxgqkwUretefKFMxzcBaqhoR+FNDIdV YaYbOocq45LsOa44gxlF6pmJkZsOsB2pqAjoANm5KtZlphTEpDD1C/wXvBaVAOBh 8mCuk2mHEyZsyLrufh/ZywaPcDaUMDwpO1zidATwaRCf6qWOr3jtWiCtQo4FeNYS o+kkYtELyAEvwDQuljghviq0p+z2vpnk52sYdXkYW8Pgz5TqhK+Gu2ywaeiqeT2B cbLGG32lVgJnmWOOXI7Z6MjekgKx5arx7z6Br+1pTT/fE44DgE+CtabEsCdcpFWG ftC7FdxZabDUhfynSaO43tgKhdVv2XpVobG3iW2RYJOWm2dJSxulZg9+jypdxITm VX3kPar+mjvwyf3svsGIc65SVaayR6pfiLzV8qBtR3trFRbIlrI7vo21d2tFtuS8 PfAR+9VHkeOdjVKDbu1sl7YycWz03xq4cM9XPFhvrobeFXb5OFwDwLWn4DZR5ZWY iJSMJkaBSww= =F6UW -----END PGP SIGNATURE----- Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC bug fixes from Arnd Bergmann: "Four patches for arm-soc this week: - Kevin Hilman is no longer reachable under his previous email address. He submitted the patch earlier, but nobody felt responsible to pick it up. - One Tegra fix for an incorect register address in device tree. - IMX multiplatform support exposes a configuration option that leads to unbootable kernels on all other machines and that needs to depend on that platform. - A nontrivial bug fix for the setup of the mxs video output." * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: MAINTAINERS: update email address for Kevin Hilman ARM: tegra: fix register address of slink controller ARM: imx: add dependency check for DEBUG_IMX_UART_PORT ARM: video: mxs: Fix mxsfb misconfiguring VDCTRL0
This commit is contained in:
commit
fb9bb1829d
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@ -5683,7 +5683,7 @@ S: Maintained
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F: arch/arm/*omap*/*clock*
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F: arch/arm/*omap*/*clock*
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OMAP POWER MANAGEMENT SUPPORT
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OMAP POWER MANAGEMENT SUPPORT
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M: Kevin Hilman <khilman@ti.com>
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M: Kevin Hilman <khilman@deeprootsystems.com>
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L: linux-omap@vger.kernel.org
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L: linux-omap@vger.kernel.org
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S: Maintained
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S: Maintained
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F: arch/arm/*omap*/*pm*
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F: arch/arm/*omap*/*pm*
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@ -5777,7 +5777,7 @@ F: arch/arm/*omap*/usb*
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OMAP GPIO DRIVER
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OMAP GPIO DRIVER
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M: Santosh Shilimkar <santosh.shilimkar@ti.com>
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M: Santosh Shilimkar <santosh.shilimkar@ti.com>
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M: Kevin Hilman <khilman@ti.com>
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M: Kevin Hilman <khilman@deeprootsystems.com>
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L: linux-omap@vger.kernel.org
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L: linux-omap@vger.kernel.org
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S: Maintained
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S: Maintained
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F: drivers/gpio/gpio-omap.c
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F: drivers/gpio/gpio-omap.c
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@ -7173,7 +7173,7 @@ F: arch/arm/mach-s3c2410/bast-irq.c
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TI DAVINCI MACHINE SUPPORT
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TI DAVINCI MACHINE SUPPORT
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M: Sekhar Nori <nsekhar@ti.com>
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M: Sekhar Nori <nsekhar@ti.com>
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M: Kevin Hilman <khilman@ti.com>
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M: Kevin Hilman <khilman@deeprootsystems.com>
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L: davinci-linux-open-source@linux.davincidsp.com (moderated for non-subscribers)
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L: davinci-linux-open-source@linux.davincidsp.com (moderated for non-subscribers)
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T: git git://gitorious.org/linux-davinci/linux-davinci.git
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T: git git://gitorious.org/linux-davinci/linux-davinci.git
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Q: http://patchwork.kernel.org/project/linux-davinci/list/
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Q: http://patchwork.kernel.org/project/linux-davinci/list/
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@ -495,6 +495,7 @@ config DEBUG_IMX_UART_PORT
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DEBUG_IMX53_UART || \
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DEBUG_IMX53_UART || \
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DEBUG_IMX6Q_UART
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DEBUG_IMX6Q_UART
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default 1
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default 1
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depends on ARCH_MXC
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help
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help
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Choose UART port on which kernel low-level debug messages
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Choose UART port on which kernel low-level debug messages
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should be output.
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should be output.
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@ -385,7 +385,7 @@ spi@7000d600 {
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spi@7000d800 {
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spi@7000d800 {
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compatible = "nvidia,tegra20-slink";
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compatible = "nvidia,tegra20-slink";
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reg = <0x7000d480 0x200>;
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reg = <0x7000d800 0x200>;
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interrupts = <0 83 0x04>;
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interrupts = <0 83 0x04>;
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nvidia,dma-request-selector = <&apbdma 17>;
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nvidia,dma-request-selector = <&apbdma 17>;
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#address-cells = <1>;
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#address-cells = <1>;
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@ -372,7 +372,7 @@ spi@7000d600 {
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spi@7000d800 {
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spi@7000d800 {
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compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
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compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
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reg = <0x7000d480 0x200>;
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reg = <0x7000d800 0x200>;
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interrupts = <0 83 0x04>;
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interrupts = <0 83 0x04>;
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nvidia,dma-request-selector = <&apbdma 17>;
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nvidia,dma-request-selector = <&apbdma 17>;
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#address-cells = <1>;
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#address-cells = <1>;
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@ -41,8 +41,6 @@ static struct fb_videomode mx23evk_video_modes[] = {
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.lower_margin = 4,
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.lower_margin = 4,
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.hsync_len = 1,
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.hsync_len = 1,
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.vsync_len = 1,
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.vsync_len = 1,
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.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
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FB_SYNC_DOTCLK_FAILING_ACT,
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},
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},
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};
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};
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@ -59,8 +57,6 @@ static struct fb_videomode mx28evk_video_modes[] = {
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.lower_margin = 10,
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.lower_margin = 10,
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.hsync_len = 10,
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.hsync_len = 10,
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.vsync_len = 10,
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.vsync_len = 10,
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.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
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FB_SYNC_DOTCLK_FAILING_ACT,
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},
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},
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};
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};
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@ -77,7 +73,6 @@ static struct fb_videomode m28evk_video_modes[] = {
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.lower_margin = 45,
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.lower_margin = 45,
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.hsync_len = 1,
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.hsync_len = 1,
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.vsync_len = 1,
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.vsync_len = 1,
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.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
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},
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},
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};
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};
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@ -94,9 +89,7 @@ static struct fb_videomode apx4devkit_video_modes[] = {
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.lower_margin = 13,
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.lower_margin = 13,
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.hsync_len = 48,
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.hsync_len = 48,
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.vsync_len = 3,
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.vsync_len = 3,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_SYNC_DATA_ENABLE_HIGH_ACT |
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FB_SYNC_DOTCLK_FAILING_ACT,
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},
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},
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};
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};
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@ -113,9 +106,7 @@ static struct fb_videomode apf28dev_video_modes[] = {
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.lower_margin = 0x15,
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.lower_margin = 0x15,
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.hsync_len = 64,
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.hsync_len = 64,
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.vsync_len = 4,
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.vsync_len = 4,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_SYNC_DATA_ENABLE_HIGH_ACT |
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FB_SYNC_DOTCLK_FAILING_ACT,
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},
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},
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};
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};
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@ -132,7 +123,6 @@ static struct fb_videomode cfa10049_video_modes[] = {
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.lower_margin = 2,
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.lower_margin = 2,
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.hsync_len = 15,
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.hsync_len = 15,
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.vsync_len = 15,
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.vsync_len = 15,
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.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT
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},
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},
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};
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};
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@ -259,6 +249,8 @@ static void __init imx23_evk_init(void)
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mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
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mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
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mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
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mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
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MXSFB_SYNC_DOTCLK_FAILING_ACT;
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}
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}
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static inline void enable_clk_enet_out(void)
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static inline void enable_clk_enet_out(void)
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@ -278,6 +270,8 @@ static void __init imx28_evk_init(void)
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mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
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mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
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mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
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mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
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MXSFB_SYNC_DOTCLK_FAILING_ACT;
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mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
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mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
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}
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}
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@ -297,6 +291,7 @@ static void __init m28evk_init(void)
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mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
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mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
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mxsfb_pdata.default_bpp = 16;
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mxsfb_pdata.default_bpp = 16;
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mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
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mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
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mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
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}
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}
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static void __init sc_sps1_init(void)
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static void __init sc_sps1_init(void)
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@ -322,6 +317,8 @@ static void __init apx4devkit_init(void)
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mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
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mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
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mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
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mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
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MXSFB_SYNC_DOTCLK_FAILING_ACT;
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}
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}
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#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
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#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
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@ -407,6 +404,7 @@ static void __init cfa10049_init(void)
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mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
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mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.default_bpp = 32;
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mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
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mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
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mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
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}
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}
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static void __init cfa10037_init(void)
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static void __init cfa10037_init(void)
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@ -423,6 +421,8 @@ static void __init apf28_init(void)
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mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
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mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
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mxsfb_pdata.default_bpp = 16;
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mxsfb_pdata.default_bpp = 16;
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mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
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mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
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mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
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MXSFB_SYNC_DOTCLK_FAILING_ACT;
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}
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}
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static void __init mxs_machine_init(void)
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static void __init mxs_machine_init(void)
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@ -169,6 +169,7 @@ struct mxsfb_info {
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unsigned dotclk_delay;
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unsigned dotclk_delay;
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const struct mxsfb_devdata *devdata;
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const struct mxsfb_devdata *devdata;
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int mapped;
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int mapped;
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u32 sync;
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};
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};
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#define mxsfb_is_v3(host) (host->devdata->ipversion == 3)
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#define mxsfb_is_v3(host) (host->devdata->ipversion == 3)
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@ -456,9 +457,9 @@ static int mxsfb_set_par(struct fb_info *fb_info)
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vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
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vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
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if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT)
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if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT)
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vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
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vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
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if (fb_info->var.sync & FB_SYNC_DATA_ENABLE_HIGH_ACT)
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if (host->sync & MXSFB_SYNC_DATA_ENABLE_HIGH_ACT)
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vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
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vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
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if (fb_info->var.sync & FB_SYNC_DOTCLK_FAILING_ACT)
|
if (host->sync & MXSFB_SYNC_DOTCLK_FAILING_ACT)
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vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING;
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vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING;
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writel(vdctrl0, host->base + LCDC_VDCTRL0);
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writel(vdctrl0, host->base + LCDC_VDCTRL0);
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@ -861,6 +862,8 @@ static int mxsfb_probe(struct platform_device *pdev)
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INIT_LIST_HEAD(&fb_info->modelist);
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INIT_LIST_HEAD(&fb_info->modelist);
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host->sync = pdata->sync;
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ret = mxsfb_init_fbinfo(host);
|
ret = mxsfb_init_fbinfo(host);
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if (ret != 0)
|
if (ret != 0)
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goto error_init_fb;
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goto error_init_fb;
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|
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@ -24,8 +24,8 @@
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#define STMLCDIF_18BIT 2 /** pixel data bus to the display is of 18 bit width */
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#define STMLCDIF_18BIT 2 /** pixel data bus to the display is of 18 bit width */
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#define STMLCDIF_24BIT 3 /** pixel data bus to the display is of 24 bit width */
|
#define STMLCDIF_24BIT 3 /** pixel data bus to the display is of 24 bit width */
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#define FB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6)
|
#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6)
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#define FB_SYNC_DOTCLK_FAILING_ACT (1 << 7) /* failing/negtive edge sampling */
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#define MXSFB_SYNC_DOTCLK_FAILING_ACT (1 << 7) /* failing/negtive edge sampling */
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|
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struct mxsfb_platform_data {
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struct mxsfb_platform_data {
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struct fb_videomode *mode_list;
|
struct fb_videomode *mode_list;
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@ -44,6 +44,9 @@ struct mxsfb_platform_data {
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* allocated. If specified,fb_size must also be specified.
|
* allocated. If specified,fb_size must also be specified.
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* fb_phys must be unused by Linux.
|
* fb_phys must be unused by Linux.
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*/
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*/
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u32 sync; /* sync mask, contains MXSFB specifics not
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* carried in fb_info->var.sync
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*/
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};
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};
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#endif /* __LINUX_MXSFB_H */
|
#endif /* __LINUX_MXSFB_H */
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|
|
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