mirror of https://gitee.com/openkylin/linux.git
Merge branch 'bcm_sf2'
Florian Fainelli says: ==================== net: dsa: bcm_sf2: misc bugfixes This patch series contains two bug fixes: - first patch fixes an issue on the error path of the driver where we could have left some of our registers mapped - second patch enforces the use of a software reset of the switch to guarantee the HW is in a consistent state prior to software initialization ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
fbe4d0d613
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@ -377,6 +377,29 @@ static irqreturn_t bcm_sf2_switch_1_isr(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static int bcm_sf2_sw_rst(struct bcm_sf2_priv *priv)
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{
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unsigned int timeout = 1000;
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u32 reg;
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reg = core_readl(priv, CORE_WATCHDOG_CTRL);
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reg |= SOFTWARE_RESET | EN_CHIP_RST | EN_SW_RESET;
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core_writel(priv, reg, CORE_WATCHDOG_CTRL);
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do {
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reg = core_readl(priv, CORE_WATCHDOG_CTRL);
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if (!(reg & SOFTWARE_RESET))
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break;
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usleep_range(1000, 2000);
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} while (timeout-- > 0);
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if (timeout == 0)
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return -ETIMEDOUT;
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return 0;
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}
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static int bcm_sf2_sw_setup(struct dsa_switch *ds)
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{
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const char *reg_names[BCM_SF2_REGS_NUM] = BCM_SF2_REGS_NAME;
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@ -404,11 +427,18 @@ static int bcm_sf2_sw_setup(struct dsa_switch *ds)
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*base = of_iomap(dn, i);
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if (*base == NULL) {
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pr_err("unable to find register: %s\n", reg_names[i]);
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return -ENODEV;
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ret = -ENOMEM;
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goto out_unmap;
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}
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base++;
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}
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ret = bcm_sf2_sw_rst(priv);
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if (ret) {
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pr_err("unable to software reset switch: %d\n", ret);
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goto out_unmap;
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}
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/* Disable all interrupts and request them */
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intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
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intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
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@ -484,7 +514,8 @@ static int bcm_sf2_sw_setup(struct dsa_switch *ds)
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out_unmap:
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base = &priv->core;
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for (i = 0; i < BCM_SF2_REGS_NUM; i++) {
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iounmap(*base);
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if (*base)
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iounmap(*base);
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base++;
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}
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return ret;
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@ -733,29 +764,6 @@ static int bcm_sf2_sw_suspend(struct dsa_switch *ds)
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return 0;
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}
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static int bcm_sf2_sw_rst(struct bcm_sf2_priv *priv)
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{
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unsigned int timeout = 1000;
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u32 reg;
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reg = core_readl(priv, CORE_WATCHDOG_CTRL);
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reg |= SOFTWARE_RESET | EN_CHIP_RST | EN_SW_RESET;
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core_writel(priv, reg, CORE_WATCHDOG_CTRL);
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do {
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reg = core_readl(priv, CORE_WATCHDOG_CTRL);
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if (!(reg & SOFTWARE_RESET))
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break;
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usleep_range(1000, 2000);
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} while (timeout-- > 0);
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if (timeout == 0)
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return -ETIMEDOUT;
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return 0;
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}
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static int bcm_sf2_sw_resume(struct dsa_switch *ds)
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{
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struct bcm_sf2_priv *priv = ds_to_priv(ds);
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