mirror of https://gitee.com/openkylin/linux.git
ASoC: rockchip: add support for pdm controller
The Pulse Density Modulation Interface Controller (PDMC) is a PDM interface controller and decoder that support PDM format. It integrates a clock generator driving the PDM microphone and embeds filters which decimate the incoming bit stream to obtain most common audio rates. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sugar Zhang
Mark Brown
parent
2ea659a9ef
commit
fc05a5b222
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@ -0,0 +1,39 @@
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* Rockchip PDM controller
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Required properties:
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- compatible: "rockchip,pdm"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- dmas: DMA specifiers for rx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: should include "rx".
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- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
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- clock-names: should contain following:
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- "pdm_hclk": clock for PDM BUS
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- "pdm_clk" : clock for PDM controller
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- pinctrl-names: Must contain a "default" entry.
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- pinctrl-N: One property must exist for each entry in
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pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
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for details of the property values.
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Example for rk3328 PDM controller:
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pdm: pdm@ff040000 {
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compatible = "rockchip,pdm";
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reg = <0x0 0xff040000 0x0 0x1000>;
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clocks = <&clk_pdm>, <&clk_gates28 0>;
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clock-names = "pdm_clk", "pdm_hclk";
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dmas = <&pdma 16>;
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#dma-cells = <1>;
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dma-names = "rx";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&pdmm0_clk
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&pdmm0_fsync
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&pdmm0_sdi0
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&pdmm0_sdi1
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&pdmm0_sdi2
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&pdmm0_sdi3>;
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pinctrl-1 = <&pdmm0_sleep>;
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status = "disabled";
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};
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@ -15,6 +15,15 @@ config SND_SOC_ROCKCHIP_I2S
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Rockchip I2S device. The device supports upto maximum of
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8 channels each for play and record.
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config SND_SOC_ROCKCHIP_PDM
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tristate "Rockchip PDM Controller Driver"
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depends on CLKDEV_LOOKUP && SND_SOC_ROCKCHIP
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select SND_SOC_GENERIC_DMAENGINE_PCM
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help
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Say Y or M if you want to add support for PDM driver for
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Rockchip PDM Controller. The Controller supports up to maximum of
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8 channels record.
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config SND_SOC_ROCKCHIP_SPDIF
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tristate "Rockchip SPDIF Device Driver"
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depends on CLKDEV_LOOKUP && SND_SOC_ROCKCHIP
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@ -1,8 +1,10 @@
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# ROCKCHIP Platform Support
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snd-soc-rockchip-i2s-objs := rockchip_i2s.o
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snd-soc-rockchip-pdm-objs := rockchip_pdm.o
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snd-soc-rockchip-spdif-objs := rockchip_spdif.o
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obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S) += snd-soc-rockchip-i2s.o
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obj-$(CONFIG_SND_SOC_ROCKCHIP_PDM) += snd-soc-rockchip-pdm.o
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obj-$(CONFIG_SND_SOC_ROCKCHIP_SPDIF) += snd-soc-rockchip-spdif.o
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snd-soc-rockchip-max98090-objs := rockchip_max98090.o
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@ -0,0 +1,516 @@
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/*
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* Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver
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*
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* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm_params.h>
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#include "rockchip_pdm.h"
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#define PDM_DMA_BURST_SIZE (16) /* size * width: 16*4 = 64 bytes */
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struct rk_pdm_dev {
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struct device *dev;
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struct clk *clk;
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struct clk *hclk;
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struct regmap *regmap;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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};
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struct rk_pdm_clkref {
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unsigned int sr;
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unsigned int clk;
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};
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static struct rk_pdm_clkref clkref[] = {
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{ 8000, 40960000 },
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{ 11025, 56448000 },
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{ 12000, 61440000 },
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};
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static unsigned int get_pdm_clk(unsigned int sr)
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{
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unsigned int i, count, clk, div;
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clk = 0;
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if (!sr)
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return clk;
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count = ARRAY_SIZE(clkref);
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for (i = 0; i < count; i++) {
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if (sr % clkref[i].sr)
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continue;
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div = sr / clkref[i].sr;
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if ((div & (div - 1)) == 0) {
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clk = clkref[i].clk;
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break;
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}
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}
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return clk;
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}
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static inline struct rk_pdm_dev *to_info(struct snd_soc_dai *dai)
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{
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return snd_soc_dai_get_drvdata(dai);
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}
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static void rockchip_pdm_rxctrl(struct rk_pdm_dev *pdm, int on)
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{
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if (on) {
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regmap_update_bits(pdm->regmap, PDM_DMA_CTRL,
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PDM_DMA_RD_MSK, PDM_DMA_RD_EN);
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regmap_update_bits(pdm->regmap, PDM_SYSCONFIG,
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PDM_RX_MASK, PDM_RX_START);
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} else {
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regmap_update_bits(pdm->regmap, PDM_DMA_CTRL,
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PDM_DMA_RD_MSK, PDM_DMA_RD_DIS);
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regmap_update_bits(pdm->regmap, PDM_SYSCONFIG,
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PDM_RX_MASK | PDM_RX_CLR_MASK,
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PDM_RX_STOP | PDM_RX_CLR_WR);
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}
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}
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static int rockchip_pdm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct rk_pdm_dev *pdm = to_info(dai);
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unsigned int val = 0;
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unsigned int clk_rate, clk_div, samplerate;
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int ret;
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samplerate = params_rate(params);
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clk_rate = get_pdm_clk(samplerate);
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if (!clk_rate)
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return -EINVAL;
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ret = clk_set_rate(pdm->clk, clk_rate);
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if (ret)
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return -EINVAL;
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clk_div = DIV_ROUND_CLOSEST(clk_rate, samplerate);
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switch (clk_div) {
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case 320:
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val = PDM_CLK_320FS;
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break;
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case 640:
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val = PDM_CLK_640FS;
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break;
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case 1280:
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val = PDM_CLK_1280FS;
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break;
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case 2560:
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val = PDM_CLK_2560FS;
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break;
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case 5120:
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val = PDM_CLK_5120FS;
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break;
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default:
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dev_err(pdm->dev, "unsupported div: %d\n", clk_div);
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return -EINVAL;
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}
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regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_DS_RATIO_MSK, val);
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regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
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PDM_HPF_CF_MSK, PDM_HPF_60HZ);
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regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
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PDM_HPF_LE | PDM_HPF_RE, PDM_HPF_LE | PDM_HPF_RE);
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regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_CLK_EN, PDM_CLK_EN);
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val = 0;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8:
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val |= PDM_VDW(8);
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break;
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case SNDRV_PCM_FORMAT_S16_LE:
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val |= PDM_VDW(16);
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break;
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case SNDRV_PCM_FORMAT_S20_3LE:
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val |= PDM_VDW(20);
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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val |= PDM_VDW(24);
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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val |= PDM_VDW(32);
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break;
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default:
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return -EINVAL;
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}
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switch (params_channels(params)) {
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case 8:
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val |= PDM_PATH3_EN;
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/* fallthrough */
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case 6:
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val |= PDM_PATH2_EN;
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/* fallthrough */
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case 4:
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val |= PDM_PATH1_EN;
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/* fallthrough */
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case 2:
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val |= PDM_PATH0_EN;
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break;
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default:
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dev_err(pdm->dev, "invalid channel: %d\n",
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params_channels(params));
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return -EINVAL;
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}
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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regmap_update_bits(pdm->regmap, PDM_CTRL0,
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PDM_PATH_MSK | PDM_VDW_MSK,
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val);
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regmap_update_bits(pdm->regmap, PDM_DMA_CTRL, PDM_DMA_RDL_MSK,
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PDM_DMA_RDL(16));
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regmap_update_bits(pdm->regmap, PDM_SYSCONFIG,
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PDM_RX_MASK | PDM_RX_CLR_MASK,
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PDM_RX_STOP | PDM_RX_CLR_WR);
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}
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return 0;
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}
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static int rockchip_pdm_set_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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struct rk_pdm_dev *pdm = to_info(cpu_dai);
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unsigned int mask = 0, val = 0;
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mask = PDM_CKP_MSK;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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val = PDM_CKP_NORMAL;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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val = PDM_CKP_INVERTED;
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break;
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default:
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return -EINVAL;
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}
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regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, mask, val);
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return 0;
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}
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static int rockchip_pdm_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct rk_pdm_dev *pdm = to_info(dai);
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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rockchip_pdm_rxctrl(pdm, 1);
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break;
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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rockchip_pdm_rxctrl(pdm, 0);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int rockchip_pdm_dai_probe(struct snd_soc_dai *dai)
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{
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struct rk_pdm_dev *pdm = to_info(dai);
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dai->capture_dma_data = &pdm->capture_dma_data;
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return 0;
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}
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static struct snd_soc_dai_ops rockchip_pdm_dai_ops = {
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.set_fmt = rockchip_pdm_set_fmt,
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.trigger = rockchip_pdm_trigger,
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.hw_params = rockchip_pdm_hw_params,
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};
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#define ROCKCHIP_PDM_RATES SNDRV_PCM_RATE_8000_192000
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#define ROCKCHIP_PDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE)
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static struct snd_soc_dai_driver rockchip_pdm_dai = {
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.probe = rockchip_pdm_dai_probe,
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.capture = {
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.stream_name = "Capture",
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.channels_min = 2,
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.channels_max = 8,
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.rates = ROCKCHIP_PDM_RATES,
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.formats = ROCKCHIP_PDM_FORMATS,
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},
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.ops = &rockchip_pdm_dai_ops,
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.symmetric_rates = 1,
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};
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static const struct snd_soc_component_driver rockchip_pdm_component = {
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.name = "rockchip-pdm",
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};
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static int rockchip_pdm_runtime_suspend(struct device *dev)
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{
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struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
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clk_disable_unprepare(pdm->clk);
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clk_disable_unprepare(pdm->hclk);
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return 0;
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}
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static int rockchip_pdm_runtime_resume(struct device *dev)
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{
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struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(pdm->clk);
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if (ret) {
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dev_err(pdm->dev, "clock enable failed %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(pdm->hclk);
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if (ret) {
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dev_err(pdm->dev, "hclock enable failed %d\n", ret);
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return ret;
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}
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return 0;
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}
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static bool rockchip_pdm_wr_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case PDM_SYSCONFIG:
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case PDM_CTRL0:
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case PDM_CTRL1:
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case PDM_CLK_CTRL:
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case PDM_HPF_CTRL:
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case PDM_FIFO_CTRL:
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case PDM_DMA_CTRL:
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case PDM_INT_EN:
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case PDM_INT_CLR:
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case PDM_DATA_VALID:
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return true;
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default:
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return false;
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}
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}
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static bool rockchip_pdm_rd_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case PDM_SYSCONFIG:
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case PDM_CTRL0:
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case PDM_CTRL1:
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case PDM_CLK_CTRL:
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case PDM_HPF_CTRL:
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case PDM_FIFO_CTRL:
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case PDM_DMA_CTRL:
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case PDM_INT_EN:
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case PDM_INT_CLR:
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case PDM_INT_ST:
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case PDM_DATA_VALID:
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case PDM_VERSION:
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return true;
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default:
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return false;
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}
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}
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static bool rockchip_pdm_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case PDM_SYSCONFIG:
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case PDM_INT_CLR:
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case PDM_INT_ST:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config rockchip_pdm_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = PDM_VERSION,
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.writeable_reg = rockchip_pdm_wr_reg,
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.readable_reg = rockchip_pdm_rd_reg,
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.volatile_reg = rockchip_pdm_volatile_reg,
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.cache_type = REGCACHE_FLAT,
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};
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static int rockchip_pdm_probe(struct platform_device *pdev)
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{
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struct rk_pdm_dev *pdm;
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struct resource *res;
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void __iomem *regs;
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int ret;
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pdm = devm_kzalloc(&pdev->dev, sizeof(*pdm), GFP_KERNEL);
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if (!pdm)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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pdm->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
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&rockchip_pdm_regmap_config);
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if (IS_ERR(pdm->regmap))
|
||||
return PTR_ERR(pdm->regmap);
|
||||
|
||||
pdm->capture_dma_data.addr = res->start + PDM_RXFIFO_DATA;
|
||||
pdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
|
||||
pdm->capture_dma_data.maxburst = PDM_DMA_BURST_SIZE;
|
||||
|
||||
pdm->dev = &pdev->dev;
|
||||
dev_set_drvdata(&pdev->dev, pdm);
|
||||
|
||||
pdm->clk = devm_clk_get(&pdev->dev, "pdm_clk");
|
||||
if (IS_ERR(pdm->clk))
|
||||
return PTR_ERR(pdm->clk);
|
||||
|
||||
pdm->hclk = devm_clk_get(&pdev->dev, "pdm_hclk");
|
||||
if (IS_ERR(pdm->hclk))
|
||||
return PTR_ERR(pdm->hclk);
|
||||
|
||||
ret = clk_prepare_enable(pdm->hclk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
if (!pm_runtime_enabled(&pdev->dev)) {
|
||||
ret = rockchip_pdm_runtime_resume(&pdev->dev);
|
||||
if (ret)
|
||||
goto err_pm_disable;
|
||||
}
|
||||
|
||||
ret = devm_snd_soc_register_component(&pdev->dev,
|
||||
&rockchip_pdm_component,
|
||||
&rockchip_pdm_dai, 1);
|
||||
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "could not register dai: %d\n", ret);
|
||||
goto err_suspend;
|
||||
}
|
||||
|
||||
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
|
||||
goto err_suspend;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_suspend:
|
||||
if (!pm_runtime_status_suspended(&pdev->dev))
|
||||
rockchip_pdm_runtime_suspend(&pdev->dev);
|
||||
err_pm_disable:
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
clk_disable_unprepare(pdm->hclk);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rockchip_pdm_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rk_pdm_dev *pdm = dev_get_drvdata(&pdev->dev);
|
||||
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
if (!pm_runtime_status_suspended(&pdev->dev))
|
||||
rockchip_pdm_runtime_suspend(&pdev->dev);
|
||||
|
||||
clk_disable_unprepare(pdm->clk);
|
||||
clk_disable_unprepare(pdm->hclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int rockchip_pdm_suspend(struct device *dev)
|
||||
{
|
||||
struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
|
||||
|
||||
regcache_mark_dirty(pdm->regmap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rockchip_pdm_resume(struct device *dev)
|
||||
{
|
||||
struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = pm_runtime_get_sync(dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = regcache_sync(pdm->regmap);
|
||||
|
||||
pm_runtime_put(dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops rockchip_pdm_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(rockchip_pdm_runtime_suspend,
|
||||
rockchip_pdm_runtime_resume, NULL)
|
||||
SET_SYSTEM_SLEEP_PM_OPS(rockchip_pdm_suspend, rockchip_pdm_resume)
|
||||
};
|
||||
|
||||
static const struct of_device_id rockchip_pdm_match[] = {
|
||||
{ .compatible = "rockchip,pdm", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, rockchip_pdm_match);
|
||||
|
||||
static struct platform_driver rockchip_pdm_driver = {
|
||||
.probe = rockchip_pdm_probe,
|
||||
.remove = rockchip_pdm_remove,
|
||||
.driver = {
|
||||
.name = "rockchip-pdm",
|
||||
.of_match_table = of_match_ptr(rockchip_pdm_match),
|
||||
.pm = &rockchip_pdm_pm_ops,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(rockchip_pdm_driver);
|
||||
|
||||
MODULE_AUTHOR("Sugar <sugar.zhang@rock-chips.com>");
|
||||
MODULE_DESCRIPTION("Rockchip PDM Controller Driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/*
|
||||
* Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver
|
||||
*
|
||||
* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ROCKCHIP_PDM_H
|
||||
#define _ROCKCHIP_PDM_H
|
||||
|
||||
/* PDM REGS */
|
||||
#define PDM_SYSCONFIG (0x0000)
|
||||
#define PDM_CTRL0 (0x0004)
|
||||
#define PDM_CTRL1 (0x0008)
|
||||
#define PDM_CLK_CTRL (0x000c)
|
||||
#define PDM_HPF_CTRL (0x0010)
|
||||
#define PDM_FIFO_CTRL (0x0014)
|
||||
#define PDM_DMA_CTRL (0x0018)
|
||||
#define PDM_INT_EN (0x001c)
|
||||
#define PDM_INT_CLR (0x0020)
|
||||
#define PDM_INT_ST (0x0024)
|
||||
#define PDM_RXFIFO_DATA (0x0030)
|
||||
#define PDM_DATA_VALID (0x0054)
|
||||
#define PDM_VERSION (0x0058)
|
||||
|
||||
/* PDM_SYSCONFIG */
|
||||
#define PDM_RX_MASK (0x1 << 2)
|
||||
#define PDM_RX_START (0x1 << 2)
|
||||
#define PDM_RX_STOP (0x0 << 2)
|
||||
#define PDM_RX_CLR_MASK (0x1 << 0)
|
||||
#define PDM_RX_CLR_WR (0x1 << 0)
|
||||
#define PDM_RX_CLR_DONE (0x0 << 0)
|
||||
|
||||
/* PDM CTRL0 */
|
||||
#define PDM_PATH_MSK (0xf << 27)
|
||||
#define PDM_PATH3_EN BIT(30)
|
||||
#define PDM_PATH2_EN BIT(29)
|
||||
#define PDM_PATH1_EN BIT(28)
|
||||
#define PDM_PATH0_EN BIT(27)
|
||||
#define PDM_HWT_EN BIT(26)
|
||||
#define PDM_VDW_MSK (0x1f << 0)
|
||||
#define PDM_VDW(X) ((X - 1) << 0)
|
||||
|
||||
/* PDM CLK CTRL */
|
||||
#define PDM_CLK_MSK BIT(5)
|
||||
#define PDM_CLK_EN BIT(5)
|
||||
#define PDM_CLK_DIS (0x0 << 5)
|
||||
#define PDM_CKP_MSK BIT(3)
|
||||
#define PDM_CKP_NORMAL (0x0 << 3)
|
||||
#define PDM_CKP_INVERTED BIT(3)
|
||||
#define PDM_DS_RATIO_MSK (0x7 << 0)
|
||||
#define PDM_CLK_320FS (0x0 << 0)
|
||||
#define PDM_CLK_640FS (0x1 << 0)
|
||||
#define PDM_CLK_1280FS (0x2 << 0)
|
||||
#define PDM_CLK_2560FS (0x3 << 0)
|
||||
#define PDM_CLK_5120FS (0x4 << 0)
|
||||
|
||||
/* PDM HPF CTRL */
|
||||
#define PDM_HPF_LE BIT(3)
|
||||
#define PDM_HPF_RE BIT(2)
|
||||
#define PDM_HPF_CF_MSK (0x3 << 0)
|
||||
#define PDM_HPF_3P79HZ (0x0 << 0)
|
||||
#define PDM_HPF_60HZ (0x1 << 0)
|
||||
#define PDM_HPF_243HZ (0x2 << 0)
|
||||
#define PDM_HPF_493HZ (0x3 << 0)
|
||||
|
||||
/* PDM DMA CTRL */
|
||||
#define PDM_DMA_RD_MSK BIT(8)
|
||||
#define PDM_DMA_RD_EN BIT(8)
|
||||
#define PDM_DMA_RD_DIS (0x0 << 8)
|
||||
#define PDM_DMA_RDL_MSK (0x7f << 0)
|
||||
#define PDM_DMA_RDL(X) ((X - 1) << 0)
|
||||
|
||||
#endif /* _ROCKCHIP_PDM_H */
|
||||
Loading…
Reference in New Issue