mirror of https://gitee.com/openkylin/linux.git
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: ata: add CFA specific identify data words remove stale comment from <linux/hdreg.h> AT91: initialize Compact Flash on AT91SAM9263 cpu ide: add at91_ide driver ide: allow to wrap interrupt handler ide-iops: fix odd-length ATAPI PIO transfers ide: NULL noise: drivers/ide/ide-*.c ide: expiry() returns int, negative expiry() return values won't be noticed
This commit is contained in:
Linus Torvalds
commit
fd6ec5f3ac
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@ -347,6 +347,111 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
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void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* Compact Flash (PCMCIA or IDE)
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \
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defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
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static struct at91_cf_data cf0_data;
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static struct resource cf0_resources[] = {
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[0] = {
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.start = AT91_CHIPSELECT_4,
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.end = AT91_CHIPSELECT_4 + SZ_256M - 1,
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
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}
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};
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static struct platform_device cf0_device = {
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.id = 0,
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.dev = {
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.platform_data = &cf0_data,
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},
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.resource = cf0_resources,
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.num_resources = ARRAY_SIZE(cf0_resources),
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};
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static struct at91_cf_data cf1_data;
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static struct resource cf1_resources[] = {
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[0] = {
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.start = AT91_CHIPSELECT_5,
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.end = AT91_CHIPSELECT_5 + SZ_256M - 1,
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
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}
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};
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static struct platform_device cf1_device = {
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.id = 1,
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.dev = {
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.platform_data = &cf1_data,
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},
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.resource = cf1_resources,
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.num_resources = ARRAY_SIZE(cf1_resources),
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};
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void __init at91_add_device_cf(struct at91_cf_data *data)
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{
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unsigned long ebi0_csa;
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struct platform_device *pdev;
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if (!data)
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return;
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/*
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* assign CS4 or CS5 to SMC with Compact Flash logic support,
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* we assume SMC timings are configured by board code,
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* except True IDE where timings are controlled by driver
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*/
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ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
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switch (data->chipselect) {
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case 4:
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at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */
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ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1;
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cf0_data = *data;
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pdev = &cf0_device;
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break;
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case 5:
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at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */
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ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2;
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cf1_data = *data;
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pdev = &cf1_device;
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break;
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default:
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printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
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data->chipselect);
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return;
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}
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at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
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if (data->det_pin) {
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at91_set_gpio_input(data->det_pin, 1);
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at91_set_deglitch(data->det_pin, 1);
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}
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if (data->irq_pin) {
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at91_set_gpio_input(data->irq_pin, 1);
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at91_set_deglitch(data->irq_pin, 1);
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}
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if (data->vcc_pin)
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/* initially off */
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at91_set_gpio_output(data->vcc_pin, 0);
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/* enable EBI controlled pins */
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at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */
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at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */
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at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */
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at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */
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pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf";
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platform_device_register(pdev);
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}
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#else
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void __init at91_add_device_cf(struct at91_cf_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* NAND / SmartMedia
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@ -56,6 +56,9 @@ struct at91_cf_data {
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u8 vcc_pin; /* power switching */
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u8 rst_pin; /* card reset */
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u8 chipselect; /* EBI Chip Select number */
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u8 flags;
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#define AT91_CF_TRUE_IDE 0x01
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#define AT91_IDE_SWAP_A0_A2 0x02
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};
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extern void __init at91_add_device_cf(struct at91_cf_data *data);
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@ -721,6 +721,11 @@ config BLK_DEV_IDE_TX4939
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depends on SOC_TX4939
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select BLK_DEV_IDEDMA_SFF
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config BLK_DEV_IDE_AT91
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tristate "Atmel AT91 (SAM9, CAP9, AT572D940HF) IDE support"
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depends on ARM && ARCH_AT91 && !ARCH_AT91RM9200 && !ARCH_AT91X40
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select IDE_TIMINGS
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config IDE_ARM
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tristate "ARM IDE support"
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depends on ARM && (ARCH_RPC || ARCH_SHARK)
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@ -116,3 +116,4 @@ obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
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obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o
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obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o
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obj-$(CONFIG_BLK_DEV_IDE_AT91) += at91_ide.o
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@ -0,0 +1,467 @@
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/*
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* IDE host driver for AT91 (SAM9, CAP9, AT572D940HF) Static Memory Controller
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* with Compact Flash True IDE logic
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*
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* Copyright (c) 2008, 2009 Kelvatek Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/version.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/ide.h>
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#include <linux/platform_device.h>
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#include <mach/board.h>
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#include <mach/gpio.h>
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#include <mach/at91sam9263.h>
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#include <mach/at91sam9_smc.h>
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#include <mach/at91sam9263_matrix.h>
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#define DRV_NAME "at91_ide"
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#define perr(fmt, args...) pr_err(DRV_NAME ": " fmt, ##args)
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#define pdbg(fmt, args...) pr_debug("%s " fmt, __func__, ##args)
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/*
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* Access to IDE device is possible through EBI Static Memory Controller
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* with Compact Flash logic. For details see EBI and SMC datasheet sections
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* of any microcontroller from AT91SAM9 family.
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*
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* Within SMC chip select address space, lines A[23:21] distinguish Compact
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* Flash modes (I/O, common memory, attribute memory, True IDE). IDE modes are:
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* 0x00c0000 - True IDE
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* 0x00e0000 - Alternate True IDE (Alt Status Register)
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*
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* On True IDE mode Task File and Data Register are mapped at the same address.
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* To distinguish access between these two different bus data width is used:
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* 8Bit for Task File, 16Bit for Data I/O.
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*
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* After initialization we do 8/16 bit flipping (changes in SMC MODE register)
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* only inside IDE callback routines which are serialized by IDE layer,
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* so no additional locking needed.
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*/
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#define TASK_FILE 0x00c00000
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#define ALT_MODE 0x00e00000
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#define REGS_SIZE 8
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#define enter_16bit(cs, mode) do { \
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mode = at91_sys_read(AT91_SMC_MODE(cs)); \
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at91_sys_write(AT91_SMC_MODE(cs), mode | AT91_SMC_DBW_16); \
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} while (0)
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#define leave_16bit(cs, mode) at91_sys_write(AT91_SMC_MODE(cs), mode);
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static void set_smc_timings(const u8 chipselect, const u16 cycle,
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const u16 setup, const u16 pulse,
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const u16 data_float, int use_iordy)
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{
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unsigned long mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
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AT91_SMC_BAT_SELECT;
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/* disable or enable waiting for IORDY signal */
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if (use_iordy)
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mode |= AT91_SMC_EXNWMODE_READY;
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/* add data float cycles if needed */
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if (data_float)
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mode |= AT91_SMC_TDF_(data_float);
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at91_sys_write(AT91_SMC_MODE(chipselect), mode);
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/* setup timings in SMC */
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at91_sys_write(AT91_SMC_SETUP(chipselect), AT91_SMC_NWESETUP_(setup) |
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AT91_SMC_NCS_WRSETUP_(0) |
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AT91_SMC_NRDSETUP_(setup) |
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AT91_SMC_NCS_RDSETUP_(0));
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at91_sys_write(AT91_SMC_PULSE(chipselect), AT91_SMC_NWEPULSE_(pulse) |
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AT91_SMC_NCS_WRPULSE_(cycle) |
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AT91_SMC_NRDPULSE_(pulse) |
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AT91_SMC_NCS_RDPULSE_(cycle));
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at91_sys_write(AT91_SMC_CYCLE(chipselect), AT91_SMC_NWECYCLE_(cycle) |
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AT91_SMC_NRDCYCLE_(cycle));
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}
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static unsigned int calc_mck_cycles(unsigned int ns, unsigned int mck_hz)
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{
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u64 tmp = ns;
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tmp *= mck_hz;
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tmp += 1000*1000*1000 - 1; /* round up */
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do_div(tmp, 1000*1000*1000);
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return (unsigned int) tmp;
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}
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static void apply_timings(const u8 chipselect, const u8 pio,
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const struct ide_timing *timing, int use_iordy)
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{
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unsigned int t0, t1, t2, t6z;
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unsigned int cycle, setup, pulse, data_float;
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unsigned int mck_hz;
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struct clk *mck;
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/* see table 22 of Compact Flash standard 4.1 for the meaning,
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* we do not stretch active (t2) time, so setup (t1) + hold time (th)
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* assure at least minimal recovery (t2i) time */
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t0 = timing->cyc8b;
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t1 = timing->setup;
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t2 = timing->act8b;
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t6z = (pio < 5) ? 30 : 20;
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pdbg("t0=%u t1=%u t2=%u t6z=%u\n", t0, t1, t2, t6z);
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mck = clk_get(NULL, "mck");
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BUG_ON(IS_ERR(mck));
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mck_hz = clk_get_rate(mck);
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pdbg("mck_hz=%u\n", mck_hz);
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cycle = calc_mck_cycles(t0, mck_hz);
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setup = calc_mck_cycles(t1, mck_hz);
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pulse = calc_mck_cycles(t2, mck_hz);
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data_float = calc_mck_cycles(t6z, mck_hz);
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pdbg("cycle=%u setup=%u pulse=%u data_float=%u\n",
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cycle, setup, pulse, data_float);
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set_smc_timings(chipselect, cycle, setup, pulse, data_float, use_iordy);
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}
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static void at91_ide_input_data(ide_drive_t *drive, struct request *rq,
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void *buf, unsigned int len)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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u8 chipselect = hwif->select_data;
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unsigned long mode;
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pdbg("cs %u buf %p len %d\n", chipselect, buf, len);
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len++;
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enter_16bit(chipselect, mode);
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__ide_mm_insw((void __iomem *) io_ports->data_addr, buf, len / 2);
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leave_16bit(chipselect, mode);
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}
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static void at91_ide_output_data(ide_drive_t *drive, struct request *rq,
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void *buf, unsigned int len)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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u8 chipselect = hwif->select_data;
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unsigned long mode;
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pdbg("cs %u buf %p len %d\n", chipselect, buf, len);
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enter_16bit(chipselect, mode);
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__ide_mm_outsw((void __iomem *) io_ports->data_addr, buf, len / 2);
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leave_16bit(chipselect, mode);
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}
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static u8 ide_mm_inb(unsigned long port)
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{
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return readb((void __iomem *) port);
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}
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static void ide_mm_outb(u8 value, unsigned long port)
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{
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writeb(value, (void __iomem *) port);
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}
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static void at91_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
|
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{
|
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ide_hwif_t *hwif = drive->hwif;
|
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struct ide_io_ports *io_ports = &hwif->io_ports;
|
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struct ide_taskfile *tf = &task->tf;
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u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
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|
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if (task->tf_flags & IDE_TFLAG_FLAGGED)
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HIHI = 0xFF;
|
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if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
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u16 data = (tf->hob_data << 8) | tf->data;
|
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at91_ide_output_data(drive, NULL, &data, 2);
|
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}
|
||||
|
||||
if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
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ide_mm_outb(tf->hob_feature, io_ports->feature_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
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ide_mm_outb(tf->hob_nsect, io_ports->nsect_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
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ide_mm_outb(tf->hob_lbal, io_ports->lbal_addr);
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
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ide_mm_outb(tf->hob_lbam, io_ports->lbam_addr);
|
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if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
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ide_mm_outb(tf->hob_lbah, io_ports->lbah_addr);
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|
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if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
|
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ide_mm_outb(tf->feature, io_ports->feature_addr);
|
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if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
|
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ide_mm_outb(tf->nsect, io_ports->nsect_addr);
|
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if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
|
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ide_mm_outb(tf->lbal, io_ports->lbal_addr);
|
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if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
|
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ide_mm_outb(tf->lbam, io_ports->lbam_addr);
|
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if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
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ide_mm_outb(tf->lbah, io_ports->lbah_addr);
|
||||
|
||||
if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
|
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ide_mm_outb((tf->device & HIHI) | drive->select, io_ports->device_addr);
|
||||
}
|
||||
|
||||
static void at91_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
|
||||
{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
||||
struct ide_io_ports *io_ports = &hwif->io_ports;
|
||||
struct ide_taskfile *tf = &task->tf;
|
||||
|
||||
if (task->tf_flags & IDE_TFLAG_IN_DATA) {
|
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u16 data;
|
||||
|
||||
at91_ide_input_data(drive, NULL, &data, 2);
|
||||
tf->data = data & 0xff;
|
||||
tf->hob_data = (data >> 8) & 0xff;
|
||||
}
|
||||
|
||||
/* be sure we're looking at the low order bits */
|
||||
ide_mm_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
|
||||
|
||||
if (task->tf_flags & IDE_TFLAG_IN_FEATURE)
|
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tf->feature = ide_mm_inb(io_ports->feature_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_NSECT)
|
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tf->nsect = ide_mm_inb(io_ports->nsect_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_LBAL)
|
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tf->lbal = ide_mm_inb(io_ports->lbal_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_LBAM)
|
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tf->lbam = ide_mm_inb(io_ports->lbam_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_LBAH)
|
||||
tf->lbah = ide_mm_inb(io_ports->lbah_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
|
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tf->device = ide_mm_inb(io_ports->device_addr);
|
||||
|
||||
if (task->tf_flags & IDE_TFLAG_LBA48) {
|
||||
ide_mm_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
|
||||
|
||||
if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
|
||||
tf->hob_feature = ide_mm_inb(io_ports->feature_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
|
||||
tf->hob_nsect = ide_mm_inb(io_ports->nsect_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
|
||||
tf->hob_lbal = ide_mm_inb(io_ports->lbal_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
|
||||
tf->hob_lbam = ide_mm_inb(io_ports->lbam_addr);
|
||||
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
|
||||
tf->hob_lbah = ide_mm_inb(io_ports->lbah_addr);
|
||||
}
|
||||
}
|
||||
|
||||
static void at91_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
|
||||
{
|
||||
struct ide_timing *timing;
|
||||
u8 chipselect = drive->hwif->select_data;
|
||||
int use_iordy = 0;
|
||||
|
||||
pdbg("chipselect %u pio %u\n", chipselect, pio);
|
||||
|
||||
timing = ide_timing_find_mode(XFER_PIO_0 + pio);
|
||||
BUG_ON(!timing);
|
||||
|
||||
if ((pio > 2 || ata_id_has_iordy(drive->id)) &&
|
||||
!(ata_id_is_cfa(drive->id) && pio > 4))
|
||||
use_iordy = 1;
|
||||
|
||||
apply_timings(chipselect, pio, timing, use_iordy);
|
||||
}
|
||||
|
||||
static const struct ide_tp_ops at91_ide_tp_ops = {
|
||||
.exec_command = ide_exec_command,
|
||||
.read_status = ide_read_status,
|
||||
.read_altstatus = ide_read_altstatus,
|
||||
.set_irq = ide_set_irq,
|
||||
|
||||
.tf_load = at91_ide_tf_load,
|
||||
.tf_read = at91_ide_tf_read,
|
||||
|
||||
.input_data = at91_ide_input_data,
|
||||
.output_data = at91_ide_output_data,
|
||||
};
|
||||
|
||||
static const struct ide_port_ops at91_ide_port_ops = {
|
||||
.set_pio_mode = at91_ide_set_pio_mode,
|
||||
};
|
||||
|
||||
static const struct ide_port_info at91_ide_port_info __initdata = {
|
||||
.port_ops = &at91_ide_port_ops,
|
||||
.tp_ops = &at91_ide_tp_ops,
|
||||
.host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA | IDE_HFLAG_SINGLE |
|
||||
IDE_HFLAG_NO_IO_32BIT | IDE_HFLAG_UNMASK_IRQS,
|
||||
.pio_mask = ATA_PIO5,
|
||||
};
|
||||
|
||||
/*
|
||||
* If interrupt is delivered through GPIO, IRQ are triggered on falling
|
||||
* and rising edge of signal. Whereas IDE device request interrupt on high
|
||||
* level (rising edge in our case). This mean we have fake interrupts, so
|
||||
* we need to check interrupt pin and exit instantly from ISR when line
|
||||
* is on low level.
|
||||
*/
|
||||
|
||||
irqreturn_t at91_irq_handler(int irq, void *dev_id)
|
||||
{
|
||||
int ntries = 8;
|
||||
int pin_val1, pin_val2;
|
||||
|
||||
/* additional deglitch, line can be noisy in badly designed PCB */
|
||||
do {
|
||||
pin_val1 = at91_get_gpio_value(irq);
|
||||
pin_val2 = at91_get_gpio_value(irq);
|
||||
} while (pin_val1 != pin_val2 && --ntries > 0);
|
||||
|
||||
if (pin_val1 == 0 || ntries <= 0)
|
||||
return IRQ_HANDLED;
|
||||
|
||||
return ide_intr(irq, dev_id);
|
||||
}
|
||||
|
||||
static int __init at91_ide_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret;
|
||||
hw_regs_t hw;
|
||||
hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
|
||||
struct ide_host *host;
|
||||
struct resource *res;
|
||||
unsigned long tf_base = 0, ctl_base = 0;
|
||||
struct at91_cf_data *board = pdev->dev.platform_data;
|
||||
|
||||
if (!board)
|
||||
return -ENODEV;
|
||||
|
||||
if (board->det_pin && at91_get_gpio_value(board->det_pin) != 0) {
|
||||
perr("no device detected\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
perr("can't get memory resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!devm_request_mem_region(&pdev->dev, res->start + TASK_FILE,
|
||||
REGS_SIZE, "ide") ||
|
||||
!devm_request_mem_region(&pdev->dev, res->start + ALT_MODE,
|
||||
REGS_SIZE, "alt")) {
|
||||
perr("memory resources in use\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
pdbg("chipselect %u irq %u res %08lx\n", board->chipselect,
|
||||
board->irq_pin, (unsigned long) res->start);
|
||||
|
||||
tf_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + TASK_FILE,
|
||||
REGS_SIZE);
|
||||
ctl_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + ALT_MODE,
|
||||
REGS_SIZE);
|
||||
if (!tf_base || !ctl_base) {
|
||||
perr("can't map memory regions\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
memset(&hw, 0, sizeof(hw));
|
||||
|
||||
if (board->flags & AT91_IDE_SWAP_A0_A2) {
|
||||
/* workaround for stupid hardware bug */
|
||||
hw.io_ports.data_addr = tf_base + 0;
|
||||
hw.io_ports.error_addr = tf_base + 4;
|
||||
hw.io_ports.nsect_addr = tf_base + 2;
|
||||
hw.io_ports.lbal_addr = tf_base + 6;
|
||||
hw.io_ports.lbam_addr = tf_base + 1;
|
||||
hw.io_ports.lbah_addr = tf_base + 5;
|
||||
hw.io_ports.device_addr = tf_base + 3;
|
||||
hw.io_ports.command_addr = tf_base + 7;
|
||||
hw.io_ports.ctl_addr = ctl_base + 3;
|
||||
} else
|
||||
ide_std_init_ports(&hw, tf_base, ctl_base + 6);
|
||||
|
||||
hw.irq = board->irq_pin;
|
||||
hw.chipset = ide_generic;
|
||||
hw.dev = &pdev->dev;
|
||||
|
||||
host = ide_host_alloc(&at91_ide_port_info, hws);
|
||||
if (!host) {
|
||||
perr("failed to allocate ide host\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* setup Static Memory Controller - PIO 0 as default */
|
||||
apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0);
|
||||
|
||||
/* with GPIO interrupt we have to do quirks in handler */
|
||||
if (board->irq_pin >= PIN_BASE)
|
||||
host->irq_handler = at91_irq_handler;
|
||||
|
||||
host->ports[0]->select_data = board->chipselect;
|
||||
|
||||
ret = ide_host_register(host, &at91_ide_port_info, hws);
|
||||
if (ret) {
|
||||
perr("failed to register ide host\n");
|
||||
goto err_free_host;
|
||||
}
|
||||
platform_set_drvdata(pdev, host);
|
||||
return 0;
|
||||
|
||||
err_free_host:
|
||||
ide_host_free(host);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __exit at91_ide_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ide_host *host = platform_get_drvdata(pdev);
|
||||
|
||||
ide_host_remove(host);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver at91_ide_driver = {
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.remove = __exit_p(at91_ide_remove),
|
||||
};
|
||||
|
||||
static int __init at91_ide_init(void)
|
||||
{
|
||||
return platform_driver_probe(&at91_ide_driver, at91_ide_probe);
|
||||
}
|
||||
|
||||
static void __exit at91_ide_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&at91_ide_driver);
|
||||
}
|
||||
|
||||
module_init(at91_ide_init);
|
||||
module_exit(at91_ide_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Stanislaw Gruszka <stf_xl@wp.pl>");
|
||||
|
||||
|
|
@ -125,5 +125,5 @@ const struct ide_proc_devset ide_disk_settings[] = {
|
|||
IDE_PROC_DEVSET(multcount, 0, 16),
|
||||
IDE_PROC_DEVSET(nowerr, 0, 1),
|
||||
IDE_PROC_DEVSET(wcache, 0, 1),
|
||||
{ 0 },
|
||||
{ NULL },
|
||||
};
|
||||
|
|
|
|||
|
|
@ -29,5 +29,5 @@ const struct ide_proc_devset ide_floppy_settings[] = {
|
|||
IDE_PROC_DEVSET(bios_head, 0, 255),
|
||||
IDE_PROC_DEVSET(bios_sect, 0, 63),
|
||||
IDE_PROC_DEVSET(ticks, 0, 255),
|
||||
{ 0 },
|
||||
{ NULL },
|
||||
};
|
||||
|
|
|
|||
|
|
@ -908,7 +908,7 @@ void ide_timer_expiry (unsigned long data)
|
|||
ide_drive_t *uninitialized_var(drive);
|
||||
ide_handler_t *handler;
|
||||
unsigned long flags;
|
||||
unsigned long wait = -1;
|
||||
int wait = -1;
|
||||
int plug_device = 0;
|
||||
|
||||
spin_lock_irqsave(&hwif->lock, flags);
|
||||
|
|
@ -1162,6 +1162,7 @@ irqreturn_t ide_intr (int irq, void *dev_id)
|
|||
|
||||
return irq_ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ide_intr);
|
||||
|
||||
/**
|
||||
* ide_do_drive_cmd - issue IDE special command
|
||||
|
|
|
|||
|
|
@ -315,6 +315,8 @@ void ide_output_data(ide_drive_t *drive, struct request *rq, void *buf,
|
|||
u8 io_32bit = drive->io_32bit;
|
||||
u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
|
||||
|
||||
len++;
|
||||
|
||||
if (io_32bit) {
|
||||
unsigned long uninitialized_var(flags);
|
||||
|
||||
|
|
|
|||
|
|
@ -950,6 +950,7 @@ static int ide_port_setup_devices(ide_hwif_t *hwif)
|
|||
static int init_irq (ide_hwif_t *hwif)
|
||||
{
|
||||
struct ide_io_ports *io_ports = &hwif->io_ports;
|
||||
irq_handler_t irq_handler;
|
||||
int sa = 0;
|
||||
|
||||
mutex_lock(&ide_cfg_mtx);
|
||||
|
|
@ -959,6 +960,10 @@ static int init_irq (ide_hwif_t *hwif)
|
|||
hwif->timer.function = &ide_timer_expiry;
|
||||
hwif->timer.data = (unsigned long)hwif;
|
||||
|
||||
irq_handler = hwif->host->irq_handler;
|
||||
if (irq_handler == NULL)
|
||||
irq_handler = ide_intr;
|
||||
|
||||
#if defined(__mc68000__)
|
||||
sa = IRQF_SHARED;
|
||||
#endif /* __mc68000__ */
|
||||
|
|
@ -969,7 +974,7 @@ static int init_irq (ide_hwif_t *hwif)
|
|||
if (io_ports->ctl_addr)
|
||||
hwif->tp_ops->set_irq(hwif, 1);
|
||||
|
||||
if (request_irq(hwif->irq, &ide_intr, sa, hwif->name, hwif))
|
||||
if (request_irq(hwif->irq, irq_handler, sa, hwif->name, hwif))
|
||||
goto out_up;
|
||||
|
||||
if (!hwif->rqsize) {
|
||||
|
|
|
|||
|
|
@ -231,7 +231,7 @@ static const struct ide_proc_devset ide_generic_settings[] = {
|
|||
IDE_PROC_DEVSET(pio_mode, 0, 255),
|
||||
IDE_PROC_DEVSET(unmaskirq, 0, 1),
|
||||
IDE_PROC_DEVSET(using_dma, 0, 1),
|
||||
{ 0 },
|
||||
{ NULL },
|
||||
};
|
||||
|
||||
static void proc_ide_settings_warn(void)
|
||||
|
|
|
|||
|
|
@ -2166,7 +2166,7 @@ static const struct ide_proc_devset idetape_settings[] = {
|
|||
__IDE_PROC_DEVSET(speed, 0, 0xffff, NULL, NULL),
|
||||
__IDE_PROC_DEVSET(tdsc, IDETAPE_DSC_RW_MIN, IDETAPE_DSC_RW_MAX,
|
||||
mulf_tdsc, divf_tdsc),
|
||||
{ 0 },
|
||||
{ NULL },
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -89,6 +89,8 @@ enum {
|
|||
ATA_ID_DLF = 128,
|
||||
ATA_ID_CSFO = 129,
|
||||
ATA_ID_CFA_POWER = 160,
|
||||
ATA_ID_CFA_KEY_MGMT = 162,
|
||||
ATA_ID_CFA_MODES = 163,
|
||||
ATA_ID_ROT_SPEED = 217,
|
||||
ATA_ID_PIO4 = (1 << 1),
|
||||
|
||||
|
|
|
|||
|
|
@ -511,7 +511,6 @@ struct hd_driveid {
|
|||
unsigned short words69_70[2]; /* reserved words 69-70
|
||||
* future command overlap and queuing
|
||||
*/
|
||||
/* HDIO_GET_IDENTITY currently returns only words 0 through 70 */
|
||||
unsigned short words71_74[4]; /* reserved words 71-74
|
||||
* for IDENTIFY PACKET DEVICE command
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -866,6 +866,7 @@ struct ide_host {
|
|||
unsigned int n_ports;
|
||||
struct device *dev[2];
|
||||
unsigned int (*init_chipset)(struct pci_dev *);
|
||||
irq_handler_t irq_handler;
|
||||
unsigned long host_flags;
|
||||
void *host_priv;
|
||||
ide_hwif_t *cur_port; /* for hosts requiring serialization */
|
||||
|
|
|
|||
Loading…
Reference in New Issue