mirror of https://gitee.com/openkylin/linux.git
Qualcomm Device Tree Changes for v4.7
* Add DB600C support * Add IPQ4019 support * Add additional nodes for APQ8064 * Fix APQ8064 pinctrls for i2c/spi * Add MSM8974 nodes for smp2p and smd * Modify MSM8974 memory reserve for rfsa and rmtfs * Add support for BQ27541 on Nexus7 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXF+EAAAoJEFKiBbHx2RXV6/8P/jUWHwhQmd8NYvz/JVRjf+dP hpwOkx66OwXwgtIrPkvu6edUjd6p6ll7tdwo14PsIjH5wCpSweXlqM/j93ucV0y5 MhulwfbeGFsMCMjV+4/IeQd7C7dHwu1WFvxoJux+GHhd12cKM67s6/EPJmyc+sUG DET11PhwSi12KX1qoPkILNXs2Gtj4PCsqEYZ0gc1Q2vAlfqmNTOKgA7wBGWYby6Z 6fWrF0sBPEc/G2C4aAia+8Uq/Fh9s8CeGSX2oO6F/iRAag7SKR1j9bUl+/FNK5fR 6H0kVvmzrrKTnoCoftygy5brSm3OwU1SM3MpTc/QWC8AeHMk4fTItpDSrz4xyeTb 4+GzU1GWlnE0N3rnJFhPPDbybgJCJ9PrACoFDqIN4mLIyOFeWoT59vXmcJBOYZpJ 7XMLpooH3WX79vblvZne54BRLTo0LXrxr+FqtUeEljguK5nKKclNI6fijjnV3dU7 9dTd/xtW0YMta3uU/En+TSLzXXC3Sbx5MXKVhvcvClyhTNG2I3vY2mz7FuXUZpuY CAuvjYJdZxEmv8z649TTBG4pQ1oPzp6H/kVlywSIH+Bn0vw1Pn+eImp4cE4TVAuv YRaxjceYXTPSsVOdYVrztm4xM0NbZ91i0LiJrgxS0mvOJEmt/JkBF8/mUKWdI8SC D/lrNzp0b6QIJ7KU9Vln =C5LP -----END PGP SIGNATURE----- Merge tag 'qcom-dt-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt Merge "Qualcomm Device Tree Changes for v4.7" from Andy Gross: * Add DB600C support * Add IPQ4019 support * Add additional nodes for APQ8064 * Fix APQ8064 pinctrls for i2c/spi * Add MSM8974 nodes for smp2p and smd * Modify MSM8974 memory reserve for rfsa and rmtfs * Add support for BQ27541 on Nexus7 * tag 'qcom-dt-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (30 commits) device-tree: nexus7: Add bq27541 battery interface to dts ARM: dts: db600c: add support to magnetometer ARM: dts: db600c: add spi support ARM: dts: db600c: add i2c support ARM: dts: db600c: Add on board leds support ARM: dts: db600c: add on board sata support. ARM: dts: db600c: add pcie support ARM: dts: db600c: add usb support ARM: dts: db600c: Add eMMC and SD card support ARM: dts: db600c: add pmic regulator supplies ARM: dts: db600c: add board support with serial ARM: dts: apq8064: add gsbi7 i2c support ARM: dts: apq8064: add support to gsbi1 uart ARM: dts: apq8064: fix the pinctrls for i2c and spi ARM: dts: qcom: apq8064: Add smd node and all edges ARM: dts: qcom: apq8064: Add complete smsm node ARM: dts: qcom: apq8064: Add syscon for sic-non-secure ARM: dts: msm8974: Add modem smp2p and smd nodes ARM: dts: msm8974: Add node for second i2c from blsp1 ARM: dts: msm8974: Split efs in rfsa and rmtfs ...
This commit is contained in:
Arnd Bergmann
commit
fe0082d473
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@ -561,6 +561,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
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dtb-$(CONFIG_ARCH_PRIMA2) += \
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prima2-evb.dtb
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dtb-$(CONFIG_ARCH_QCOM) += \
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qcom-apq8064-arrow-db600c.dtb \
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qcom-apq8064-cm-qs600.dtb \
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qcom-apq8064-ifc6410.dtb \
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qcom-apq8064-sony-xperia-yuga.dtb \
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@ -568,6 +569,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
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qcom-apq8074-dragonboard.dtb \
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qcom-apq8084-ifc6540.dtb \
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qcom-apq8084-mtp.dtb \
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qcom-ipq4019-ap.dk01.1-c1.dtb \
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qcom-ipq8064-ap148.dtb \
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qcom-msm8660-surf.dtb \
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qcom-msm8960-cdp.dtb \
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@ -0,0 +1,52 @@
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&tlmm_pinmux {
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card_detect: card-detect {
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mux {
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pins = "gpio26";
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function = "gpio";
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bias-disable;
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};
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};
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pcie_pins: pcie-pinmux {
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mux {
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pins = "gpio27";
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function = "gpio";
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};
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conf {
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pins = "gpio27";
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drive-strength = <12>;
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bias-disable;
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};
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};
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user_leds: user-leds {
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mux {
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pins = "gpio3", "gpio7", "gpio10", "gpio11";
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function = "gpio";
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};
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conf {
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pins = "gpio3", "gpio7", "gpio10", "gpio11";
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function = "gpio";
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output-low;
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};
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};
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magneto_pins: magneto-pins {
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mux {
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pins = "gpio31", "gpio48";
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function = "gpio";
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bias-disable;
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};
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};
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};
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&pm8921_mpps {
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mpp_leds: mpp-leds {
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pinconf {
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pins = "mpp7", "mpp8";
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function = "digital";
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output-low;
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};
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};
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};
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@ -0,0 +1,349 @@
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#include "qcom-apq8064-v2.0.dtsi"
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#include "qcom-apq8064-arrow-db600c-pins.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Arrow Electronics, APQ8064 DB600c";
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compatible = "arrow,db600c", "qcom,apq8064";
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aliases {
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serial0 = &gsbi7_serial;
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serial1 = &gsbi1_serial;
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i2c0 = &gsbi2_i2c;
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i2c1 = &gsbi3_i2c;
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i2c2 = &gsbi4_i2c;
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i2c3 = &gsbi7_i2c;
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spi0 = &gsbi5_spi;
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};
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regulators {
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compatible = "simple-bus";
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vph: regulator-fixed@1 {
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compatible = "regulator-fixed";
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regulator-min-microvolt = <4500000>;
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regulator-max-microvolt = <4500000>;
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regulator-name = "VPH";
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regulator-type = "voltage";
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regulator-boot-on;
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};
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/* on board fixed 3.3v supply */
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vcc3v3: vcc3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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soc {
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rpm@108000 {
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regulators {
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vdd_s1-supply = <&vph>;
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vdd_s2-supply = <&vph>;
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vdd_s3-supply = <&vph>;
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vdd_s4-supply = <&vph>;
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vdd_s5-supply = <&vph>;
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vdd_s6-supply = <&vph>;
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vdd_s7-supply = <&vph>;
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vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
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vdd_l3_l15_l17-supply = <&vph>;
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vdd_l4_l14-supply = <&vph>;
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vdd_l5_l8_l16-supply = <&vph>;
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vdd_l6_l7-supply = <&vph>;
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vdd_l9_l11-supply = <&vph>;
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vdd_l10_l22-supply = <&vph>;
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vdd_l21_l23_l29-supply = <&vph>;
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vdd_l24-supply = <&pm8921_s1>;
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vdd_l25-supply = <&pm8921_s1>;
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vdd_l26-supply = <&pm8921_s7>;
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vdd_l27-supply = <&pm8921_s7>;
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vdd_l28-supply = <&pm8921_s7>;
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vin_lvs1_3_6-supply = <&pm8921_s4>;
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vin_lvs2-supply = <&pm8921_s1>;
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vin_lvs4_5_7-supply = <&pm8921_s4>;
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s1 {
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regulator-always-on;
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regulator-min-microvolt = <1225000>;
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regulator-max-microvolt = <1225000>;
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qcom,switch-mode-frequency = <3200000>;
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bias-pull-down;
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};
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s3 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1400000>;
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qcom,switch-mode-frequency = <4800000>;
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};
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s4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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qcom,switch-mode-frequency = <3200000>;
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bias-pull-down;
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regulator-always-on;
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};
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s7 {
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regulator-min-microvolt = <1300000>;
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regulator-max-microvolt = <1300000>;
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qcom,switch-mode-frequency = <3200000>;
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};
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l3 {
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regulator-min-microvolt = <3050000>;
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regulator-max-microvolt = <3300000>;
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bias-pull-down;
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};
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l4 {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1800000>;
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bias-pull-down;
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};
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l5 {
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regulator-min-microvolt = <2750000>;
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regulator-max-microvolt = <3000000>;
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bias-pull-down;
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regulator-boot-on;
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regulator-always-on;
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};
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l6 {
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regulator-min-microvolt = <2950000>;
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regulator-max-microvolt = <2950000>;
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bias-pull-down;
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};
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l23 {
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regulator-min-microvolt = <1700000>;
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regulator-max-microvolt = <1900000>;
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bias-pull-down;
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};
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lvs6 {
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bias-pull-down;
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};
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lvs7 {
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bias-pull-down;
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};
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};
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};
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gsbi@12440000 {
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status = "okay";
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qcom,mode = <GSBI_PROT_UART_W_FC>;
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serial@12450000 {
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label = "LS-UART1";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&gsbi1_uart_4pins>;
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};
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};
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gsbi@12480000 {
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status = "okay";
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qcom,mode = <GSBI_PROT_I2C>;
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i2c@124a0000 {
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/* On Low speed expansion and Sensors */
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label = "LS-I2C0";
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status = "okay";
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lis3mdl_mag@1e {
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compatible = "st,lis3mdl-magn";
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reg = <0x1e>;
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vdd-supply = <&vcc3v3>;
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vddio-supply = <&pm8921_s4>;
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pinctrl-names = "default";
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pinctrl-0 = <&magneto_pins>;
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interrupt-parent = <&tlmm_pinmux>;
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st,drdy-int-pin = <2>;
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interrupts = <48 IRQ_TYPE_EDGE_RISING>, /* DRDY line */
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<31 IRQ_TYPE_EDGE_RISING>; /* INT */
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};
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};
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};
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gsbi@16200000 {
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status = "okay";
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qcom,mode = <GSBI_PROT_I2C>;
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i2c@16280000 {
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/* On Low speed expansion */
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status = "okay";
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label = "LS-I2C1";
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clock-frequency = <200000>;
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eeprom@52 {
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compatible = "atmel,24c128";
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reg = <0x52>;
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pagesize = <64>;
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};
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};
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};
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gsbi@16300000 {
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status = "okay";
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qcom,mode = <GSBI_PROT_I2C>;
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i2c@16380000 {
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/* On High speed expansion */
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label = "HS-CAM-I2C3";
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status = "okay";
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};
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};
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gsbi@1a200000 {
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status = "okay";
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spi@1a280000 {
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/* On Low speed expansion */
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label = "LS-SPI0";
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status = "okay";
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};
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};
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/* DEBUG UART */
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gsbi@16600000 {
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status = "okay";
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qcom,mode = <GSBI_PROT_I2C_UART>;
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serial@16640000 {
|
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label = "LS-UART0";
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status = "okay";
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&gsbi7_uart_2pins>;
|
||||
};
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||||
|
||||
i2c@16680000 {
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||||
/* On High speed expansion */
|
||||
status = "okay";
|
||||
label = "HS-CAM-I2C2";
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
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pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds>, <&mpp_leds>;
|
||||
|
||||
compatible = "gpio-leds";
|
||||
|
||||
user-led0 {
|
||||
label = "user0-led";
|
||||
gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
user-led1 {
|
||||
label = "user1-led";
|
||||
gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
user-led2 {
|
||||
label = "user2-led";
|
||||
gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc1";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
user-led3 {
|
||||
label = "user3-led";
|
||||
gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "none";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
wifi-led {
|
||||
label = "WiFi-led";
|
||||
gpios = <&pm8921_mpps 7 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
bt-led {
|
||||
label = "BT-led";
|
||||
gpios = <&pm8921_mpps 8 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pci@1b500000 {
|
||||
status = "okay";
|
||||
vdda-supply = <&pm8921_s3>;
|
||||
vdda_phy-supply = <&pm8921_lvs6>;
|
||||
vdda_refclk-supply = <&vcc3v3>;
|
||||
pinctrl-0 = <&pcie_pins>;
|
||||
pinctrl-names = "default";
|
||||
perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
phy@1b400000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@29000000 {
|
||||
status = "okay";
|
||||
target-supply = <&pm8921_lvs7>;
|
||||
};
|
||||
|
||||
/* OTG */
|
||||
phy@12500000 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
vddcx-supply = <&pm8921_s3>;
|
||||
v3p3-supply = <&pm8921_l3>;
|
||||
v1p8-supply = <&pm8921_l4>;
|
||||
};
|
||||
|
||||
phy@12520000 {
|
||||
status = "okay";
|
||||
vddcx-supply = <&pm8921_s3>;
|
||||
v3p3-supply = <&pm8921_l3>;
|
||||
v1p8-supply = <&pm8921_l23>;
|
||||
};
|
||||
|
||||
phy@12530000 {
|
||||
status = "okay";
|
||||
vddcx-supply = <&pm8921_s3>;
|
||||
v3p3-supply = <&pm8921_l3>;
|
||||
v1p8-supply = <&pm8921_l23>;
|
||||
};
|
||||
|
||||
gadget@12500000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* OTG */
|
||||
usb@12500000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb@12520000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb@12530000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
amba {
|
||||
/* eMMC */
|
||||
sdcc@12400000 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&pm8921_l5>;
|
||||
vqmmc-supply = <&pm8921_s4>;
|
||||
};
|
||||
|
||||
/* External micro SD card */
|
||||
sdcc@12180000 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&pm8921_l6>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&card_detect>;
|
||||
cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -224,6 +224,12 @@ eeprom@52 {
|
|||
reg = <0x52>;
|
||||
pagesize = <32>;
|
||||
};
|
||||
|
||||
bq27541@55 {
|
||||
compatible = "ti,bq27541";
|
||||
reg = <0x55>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -39,6 +39,20 @@ pinconf {
|
|||
};
|
||||
};
|
||||
|
||||
gsbi1_uart_2pins: gsbi1_uart_2pins {
|
||||
mux {
|
||||
pins = "gpio18", "gpio19";
|
||||
function = "gsbi1";
|
||||
};
|
||||
};
|
||||
|
||||
gsbi1_uart_4pins: gsbi1_uart_4pins {
|
||||
mux {
|
||||
pins = "gpio18", "gpio19", "gpio20", "gpio21";
|
||||
function = "gsbi1";
|
||||
};
|
||||
};
|
||||
|
||||
i2c2_pins: i2c2 {
|
||||
mux {
|
||||
pins = "gpio24", "gpio25";
|
||||
|
|
@ -205,4 +219,29 @@ mux {
|
|||
function = "gsbi7";
|
||||
};
|
||||
};
|
||||
|
||||
i2c7_pins: i2c7 {
|
||||
mux {
|
||||
pins = "gpio84", "gpio85";
|
||||
function = "gsbi7";
|
||||
};
|
||||
|
||||
pinconf {
|
||||
pins = "gpio84", "gpio85";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
i2c7_pins_sleep: i2c7_pins_sleep {
|
||||
mux {
|
||||
pins = "gpio84", "gpio85";
|
||||
function = "gpio";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio84", "gpio85";
|
||||
drive-strength = <2>;
|
||||
bias-disable = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -124,6 +124,95 @@ smem {
|
|||
hwlocks = <&sfpb_mutex 3>;
|
||||
};
|
||||
|
||||
smd {
|
||||
compatible = "qcom,smd";
|
||||
|
||||
modem@0 {
|
||||
interrupts = <0 37 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&l2cc 8 3>;
|
||||
qcom,smd-edge = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
q6@1 {
|
||||
interrupts = <0 90 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&l2cc 8 15>;
|
||||
qcom,smd-edge = <1>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dsps@3 {
|
||||
interrupts = <0 138 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&sps_sic_non_secure 0x4080 0>;
|
||||
qcom,smd-edge = <3>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
riva@6 {
|
||||
interrupts = <0 198 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&l2cc 8 25>;
|
||||
qcom,smd-edge = <6>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
smsm {
|
||||
compatible = "qcom,smsm";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qcom,ipc-1 = <&l2cc 8 4>;
|
||||
qcom,ipc-2 = <&l2cc 8 14>;
|
||||
qcom,ipc-3 = <&l2cc 8 23>;
|
||||
qcom,ipc-4 = <&sps_sic_non_secure 0x4094 0>;
|
||||
|
||||
apps_smsm: apps@0 {
|
||||
reg = <0>;
|
||||
#qcom,state-cells = <1>;
|
||||
};
|
||||
|
||||
modem_smsm: modem@1 {
|
||||
reg = <1>;
|
||||
interrupts = <0 38 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
q6_smsm: q6@2 {
|
||||
reg = <2>;
|
||||
interrupts = <0 89 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
wcnss_smsm: wcnss@3 {
|
||||
reg = <3>;
|
||||
interrupts = <0 204 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
dsps_smsm: dsps@4 {
|
||||
reg = <4>;
|
||||
interrupts = <0 137 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -212,6 +301,11 @@ saw3: power-controller@20b9000 {
|
|||
regulator;
|
||||
};
|
||||
|
||||
sps_sic_non_secure: sps-sic-non-secure@12100000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x12100000 0x10000>;
|
||||
};
|
||||
|
||||
gsbi1: gsbi@12440000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,gsbi-v1.0.0";
|
||||
|
|
@ -225,9 +319,20 @@ gsbi1: gsbi@12440000 {
|
|||
|
||||
syscon-tcsr = <&tcsr>;
|
||||
|
||||
gsbi1_serial: serial@12450000 {
|
||||
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
|
||||
reg = <0x12450000 0x100>,
|
||||
<0x12400000 0x03>;
|
||||
interrupts = <0 193 0x0>;
|
||||
clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gsbi1_i2c: i2c@12460000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-1 = <&i2c1_pins_sleep>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x12460000 0x1000>;
|
||||
interrupts = <0 194 IRQ_TYPE_NONE>;
|
||||
|
|
@ -255,7 +360,8 @@ gsbi2: gsbi@12480000 {
|
|||
gsbi2_i2c: i2c@124a0000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
reg = <0x124a0000 0x1000>;
|
||||
pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
pinctrl-1 = <&i2c2_pins_sleep>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
interrupts = <0 196 IRQ_TYPE_NONE>;
|
||||
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
|
||||
|
|
@ -277,7 +383,8 @@ gsbi3: gsbi@16200000 {
|
|||
ranges;
|
||||
gsbi3_i2c: i2c@16280000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
pinctrl-1 = <&i2c3_pins_sleep>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16280000 0x1000>;
|
||||
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
|
||||
|
|
@ -302,7 +409,8 @@ gsbi4: gsbi@16300000 {
|
|||
|
||||
gsbi4_i2c: i2c@16380000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
|
||||
pinctrl-0 = <&i2c4_pins>;
|
||||
pinctrl-1 = <&i2c4_pins_sleep>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16380000 0x1000>;
|
||||
interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
|
||||
|
|
@ -337,7 +445,8 @@ gsbi5_spi: spi@1a280000 {
|
|||
compatible = "qcom,spi-qup-v1.1.1";
|
||||
reg = <0x1a280000 0x1000>;
|
||||
interrupts = <0 155 0>;
|
||||
pinctrl-0 = <&spi5_default &spi5_sleep>;
|
||||
pinctrl-0 = <&spi5_default>;
|
||||
pinctrl-1 = <&spi5_sleep>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
|
|
@ -370,7 +479,8 @@ gsbi6_serial: serial@16540000 {
|
|||
|
||||
gsbi6_i2c: i2c@16580000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
|
||||
pinctrl-0 = <&i2c6_pins>;
|
||||
pinctrl-1 = <&i2c6_pins_sleep>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16580000 0x1000>;
|
||||
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
|
||||
|
|
@ -401,6 +511,19 @@ gsbi7_serial: serial@16640000 {
|
|||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gsbi7_i2c: i2c@16680000 {
|
||||
compatible = "qcom,i2c-qup-v1.1.1";
|
||||
pinctrl-0 = <&i2c7_pins>;
|
||||
pinctrl-1 = <&i2c7_pins_sleep>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
reg = <0x16680000 0x1000>;
|
||||
interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
|
||||
clocks = <&gcc GSBI7_QUP_CLK>,
|
||||
<&gcc GSBI7_H_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
rng@1a500000 {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,22 @@
|
|||
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "qcom-ipq4019-ap.dk01.1.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
|
||||
|
||||
};
|
||||
|
|
@ -0,0 +1,112 @@
|
|||
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "qcom-ipq4019.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
|
||||
compatible = "qcom,ipq4019";
|
||||
|
||||
clocks {
|
||||
xo: xo {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <48000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv7-timer";
|
||||
interrupts = <1 2 0xf08>,
|
||||
<1 3 0xf08>,
|
||||
<1 4 0xf08>,
|
||||
<1 1 0xf08>;
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
pinctrl@0x01000000 {
|
||||
serial_pins: serial_pinmux {
|
||||
mux {
|
||||
pins = "gpio60", "gpio61";
|
||||
function = "blsp_uart0";
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
spi_0_pins: spi_0_pinmux {
|
||||
pinmux {
|
||||
function = "blsp_spi0";
|
||||
pins = "gpio55", "gpio56", "gpio57";
|
||||
};
|
||||
pinmux_cs {
|
||||
function = "gpio";
|
||||
pins = "gpio54";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio55", "gpio56", "gpio57";
|
||||
drive-strength = <12>;
|
||||
bias-disable;
|
||||
};
|
||||
pinconf_cs {
|
||||
pins = "gpio54";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
blsp_dma: dma@7884000 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
spi_0: spi@78b5000 {
|
||||
pinctrl-0 = <&spi_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "ok";
|
||||
cs-gpios = <&tlmm 54 0>;
|
||||
|
||||
mx25l25635e@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0>;
|
||||
compatible = "mx25l25635e";
|
||||
spi-max-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
|
||||
serial@78af000 {
|
||||
pinctrl-0 = <&serial_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
cryptobam: dma@8e04000 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
crypto@8e3a000 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
watchdog@b017000 {
|
||||
status = "ok";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,267 @@
|
|||
/*
|
||||
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. IPQ4019";
|
||||
compatible = "qcom,ipq4019";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
spi0 = &spi_0;
|
||||
i2c0 = &i2c_0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
enable-method = "qcom,kpss-acc-v1";
|
||||
qcom,acc = <&acc0>;
|
||||
qcom,saw = <&saw0>;
|
||||
reg = <0x0>;
|
||||
clocks = <&gcc GCC_APPS_CLK_SRC>;
|
||||
clock-frequency = <0>;
|
||||
operating-points = <
|
||||
/* kHz uV (fixed) */
|
||||
48000 1100000
|
||||
200000 1100000
|
||||
500000 1100000
|
||||
666000 1100000
|
||||
>;
|
||||
clock-latency = <256000>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
enable-method = "qcom,kpss-acc-v1";
|
||||
qcom,acc = <&acc1>;
|
||||
qcom,saw = <&saw1>;
|
||||
reg = <0x1>;
|
||||
clocks = <&gcc GCC_APPS_CLK_SRC>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
enable-method = "qcom,kpss-acc-v1";
|
||||
qcom,acc = <&acc2>;
|
||||
qcom,saw = <&saw2>;
|
||||
reg = <0x2>;
|
||||
clocks = <&gcc GCC_APPS_CLK_SRC>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
enable-method = "qcom,kpss-acc-v1";
|
||||
qcom,acc = <&acc3>;
|
||||
qcom,saw = <&saw3>;
|
||||
reg = <0x3>;
|
||||
clocks = <&gcc GCC_APPS_CLK_SRC>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
sleep_clk: sleep_clk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
compatible = "simple-bus";
|
||||
|
||||
intc: interrupt-controller@b000000 {
|
||||
compatible = "qcom,msm-qgic2";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
reg = <0x0b000000 0x1000>,
|
||||
<0x0b002000 0x1000>;
|
||||
};
|
||||
|
||||
gcc: clock-controller@1800000 {
|
||||
compatible = "qcom,gcc-ipq4019";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
reg = <0x1800000 0x60000>;
|
||||
};
|
||||
|
||||
tlmm: pinctrl@0x01000000 {
|
||||
compatible = "qcom,ipq4019-pinctrl";
|
||||
reg = <0x01000000 0x300000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <0 208 0>;
|
||||
};
|
||||
|
||||
blsp_dma: dma@7884000 {
|
||||
compatible = "qcom,bam-v1.7.0";
|
||||
reg = <0x07884000 0x23000>;
|
||||
interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
|
||||
clocks = <&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "bam_clk";
|
||||
#dma-cells = <1>;
|
||||
qcom,ee = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi_0: spi@78b5000 {
|
||||
compatible = "qcom,spi-qup-v2.2.1";
|
||||
reg = <0x78b5000 0x600>;
|
||||
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_0: i2c@78b7000 {
|
||||
compatible = "qcom,i2c-qup-v2.2.1";
|
||||
reg = <0x78b7000 0x6000>;
|
||||
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
|
||||
<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
|
||||
clock-names = "iface", "core";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
cryptobam: dma@8e04000 {
|
||||
compatible = "qcom,bam-v1.7.0";
|
||||
reg = <0x08e04000 0x20000>;
|
||||
interrupts = <GIC_SPI 207 0>;
|
||||
clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
|
||||
clock-names = "bam_clk";
|
||||
#dma-cells = <1>;
|
||||
qcom,ee = <1>;
|
||||
qcom,controlled-remotely;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
crypto@8e3a000 {
|
||||
compatible = "qcom,crypto-v5.1";
|
||||
reg = <0x08e3a000 0x6000>;
|
||||
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
|
||||
<&gcc GCC_CRYPTO_AXI_CLK>,
|
||||
<&gcc GCC_CRYPTO_CLK>;
|
||||
clock-names = "iface", "bus", "core";
|
||||
dmas = <&cryptobam 2>, <&cryptobam 3>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
acc0: clock-controller@b088000 {
|
||||
compatible = "qcom,kpss-acc-v1";
|
||||
reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
|
||||
};
|
||||
|
||||
acc1: clock-controller@b098000 {
|
||||
compatible = "qcom,kpss-acc-v1";
|
||||
reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
|
||||
};
|
||||
|
||||
acc2: clock-controller@b0a8000 {
|
||||
compatible = "qcom,kpss-acc-v1";
|
||||
reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
|
||||
};
|
||||
|
||||
acc3: clock-controller@b0b8000 {
|
||||
compatible = "qcom,kpss-acc-v1";
|
||||
reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
|
||||
};
|
||||
|
||||
saw0: regulator@b089000 {
|
||||
compatible = "qcom,saw2";
|
||||
reg = <0x02089000 0x1000>, <0x0b009000 0x1000>;
|
||||
regulator;
|
||||
};
|
||||
|
||||
saw1: regulator@b099000 {
|
||||
compatible = "qcom,saw2";
|
||||
reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
|
||||
regulator;
|
||||
};
|
||||
|
||||
saw2: regulator@b0a9000 {
|
||||
compatible = "qcom,saw2";
|
||||
reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
|
||||
regulator;
|
||||
};
|
||||
|
||||
saw3: regulator@b0b9000 {
|
||||
compatible = "qcom,saw2";
|
||||
reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
|
||||
regulator;
|
||||
};
|
||||
|
||||
serial@78af000 {
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0x78af000 0x200>;
|
||||
interrupts = <0 107 0>;
|
||||
status = "disabled";
|
||||
clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 1>, <&blsp_dma 0>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
|
||||
serial@78b0000 {
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0x78b0000 0x200>;
|
||||
interrupts = <0 108 0>;
|
||||
status = "disabled";
|
||||
clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
|
||||
<&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
dmas = <&blsp_dma 3>, <&blsp_dma 2>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
|
||||
watchdog@b017000 {
|
||||
compatible = "qcom,kpss-standalone";
|
||||
reg = <0xb017000 0x40>;
|
||||
clocks = <&sleep_clk>;
|
||||
timeout-sec = <10>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
restart@4ab000 {
|
||||
compatible = "qcom,pshold";
|
||||
reg = <0x4ab000 0x4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -49,8 +49,13 @@ tz@0fc00000 {
|
|||
no-map;
|
||||
};
|
||||
|
||||
efs@0fd600000 {
|
||||
reg = <0x0fd60000 0x1a0000>;
|
||||
rfsa@0fd60000 {
|
||||
reg = <0x0fd60000 0x20000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
rmtfs@0fd80000 {
|
||||
reg = <0x0fd80000 0x180000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
|
|
@ -163,6 +168,31 @@ smem {
|
|||
hwlocks = <&tcsr_mutex 3>;
|
||||
};
|
||||
|
||||
smp2p-modem {
|
||||
compatible = "qcom,smp2p";
|
||||
qcom,smem = <435>, <428>;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <0 27 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 8 14>;
|
||||
|
||||
qcom,local-pid = <0>;
|
||||
qcom,remote-pid = <1>;
|
||||
|
||||
modem_smp2p_out: master-kernel {
|
||||
qcom,entry-name = "master-kernel";
|
||||
#qcom,state-cells = <1>;
|
||||
};
|
||||
|
||||
modem_smp2p_in: slave-kernel {
|
||||
qcom,entry-name = "slave-kernel";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
smp2p-wcnss {
|
||||
compatible = "qcom,smp2p";
|
||||
qcom,smem = <451>, <431>;
|
||||
|
|
@ -440,6 +470,17 @@ msmgpio: pinctrl@fd510000 {
|
|||
interrupts = <0 208 0>;
|
||||
};
|
||||
|
||||
i2c@f9924000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,i2c-qup-v2.1.1";
|
||||
reg = <0xf9924000 0x1000>;
|
||||
interrupts = <0 96 IRQ_TYPE_NONE>;
|
||||
clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
blsp_i2c8: i2c@f9964000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,i2c-qup-v2.1.1";
|
||||
|
|
@ -494,6 +535,13 @@ blsp2_dma: dma-controller@f9944000 {
|
|||
smd {
|
||||
compatible = "qcom,smd";
|
||||
|
||||
modem {
|
||||
interrupts = <0 25 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 8 12>;
|
||||
qcom,smd-edge = <0>;
|
||||
};
|
||||
|
||||
rpm {
|
||||
interrupts = <0 168 1>;
|
||||
qcom,ipc = <&apcs 8 0>;
|
||||
|
|
|
|||
Loading…
Reference in New Issue