drm/amd/display: fix type of variable

Currently, the maximum value that *counter* can reach is 255, and
code at line 150: while (counter < 1000) { implies a bigger value
could be expected.

Fix this by changing the type of variable *counter* from uint8_t
to uint16_t.

Addresses-Coverity-ID: 1470030 ("Operands don't affect result")
Fixes: 2b6199a1d1 ("drm/amd/display: replace msleep with udelay in fbc path")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Gustavo A. R. Silva 2018-06-15 08:32:28 -05:00 committed by Alex Deucher
parent 5c21992702
commit fe78627d43
1 changed files with 1 additions and 1 deletions

View File

@ -143,7 +143,7 @@ static void wait_for_fbc_state_changed(
struct dce110_compressor *cp110,
bool enabled)
{
uint8_t counter = 0;
uint16_t counter = 0;
uint32_t addr = mmFBC_STATUS;
uint32_t value;