mirror of https://gitee.com/openkylin/linux.git
drm: omapdrm: Move FEAT_PARAM_DSI* features to dsi driver
The FEAT_PARAM_DSI* features are specific to the DSI, move them from the omap_dss_features structure to the dsi driver. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -326,6 +326,8 @@ struct dsi_of_data {
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enum dsi_model model;
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enum dsi_model model;
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const struct dss_pll_hw *pll_hw;
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const struct dss_pll_hw *pll_hw;
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const struct dsi_module_id_data *modules;
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const struct dsi_module_id_data *modules;
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unsigned int max_fck_freq;
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unsigned int max_pll_lpdiv;
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enum dsi_quirks quirks;
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enum dsi_quirks quirks;
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};
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};
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@ -1323,7 +1325,7 @@ static int dsi_set_lp_clk_divisor(struct platform_device *dsidev)
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unsigned long dsi_fclk;
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unsigned long dsi_fclk;
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unsigned lp_clk_div;
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unsigned lp_clk_div;
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unsigned long lp_clk;
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unsigned long lp_clk;
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unsigned lpdiv_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_LPDIV);
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unsigned lpdiv_max = dsi->data->max_pll_lpdiv;
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lp_clk_div = dsi->user_lp_cinfo.lp_clk_div;
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lp_clk_div = dsi->user_lp_cinfo.lp_clk_div;
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@ -1400,11 +1402,12 @@ static int dsi_pll_power(struct platform_device *dsidev,
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}
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}
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static void dsi_pll_calc_dsi_fck(struct dss_pll_clock_info *cinfo)
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static void dsi_pll_calc_dsi_fck(struct dsi_data *dsi,
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struct dss_pll_clock_info *cinfo)
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{
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{
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unsigned long max_dsi_fck;
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unsigned long max_dsi_fck;
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max_dsi_fck = dss_feat_get_param_max(FEAT_PARAM_DSI_FCK);
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max_dsi_fck = dsi->data->max_fck_freq;
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cinfo->mX[HSDIV_DSI] = DIV_ROUND_UP(cinfo->clkdco, max_dsi_fck);
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cinfo->mX[HSDIV_DSI] = DIV_ROUND_UP(cinfo->clkdco, max_dsi_fck);
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cinfo->clkout[HSDIV_DSI] = cinfo->clkdco / cinfo->mX[HSDIV_DSI];
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cinfo->clkout[HSDIV_DSI] = cinfo->clkdco / cinfo->mX[HSDIV_DSI];
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@ -4537,6 +4540,7 @@ static bool dsi_cm_calc_pll_cb(int n, int m, unsigned long fint,
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unsigned long clkdco, void *data)
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unsigned long clkdco, void *data)
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{
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{
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struct dsi_clk_calc_ctx *ctx = data;
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struct dsi_clk_calc_ctx *ctx = data;
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struct dsi_data *dsi = dsi_get_dsidrv_data(ctx->dsidev);
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ctx->dsi_cinfo.n = n;
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ctx->dsi_cinfo.n = n;
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ctx->dsi_cinfo.m = m;
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ctx->dsi_cinfo.m = m;
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@ -4544,7 +4548,7 @@ static bool dsi_cm_calc_pll_cb(int n, int m, unsigned long fint,
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ctx->dsi_cinfo.clkdco = clkdco;
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ctx->dsi_cinfo.clkdco = clkdco;
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return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
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return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
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dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
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dsi->data->max_fck_freq,
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dsi_cm_calc_hsdiv_cb, ctx);
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dsi_cm_calc_hsdiv_cb, ctx);
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}
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}
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@ -4836,6 +4840,7 @@ static bool dsi_vm_calc_pll_cb(int n, int m, unsigned long fint,
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unsigned long clkdco, void *data)
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unsigned long clkdco, void *data)
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{
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{
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struct dsi_clk_calc_ctx *ctx = data;
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struct dsi_clk_calc_ctx *ctx = data;
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struct dsi_data *dsi = dsi_get_dsidrv_data(ctx->dsidev);
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ctx->dsi_cinfo.n = n;
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ctx->dsi_cinfo.n = n;
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ctx->dsi_cinfo.m = m;
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ctx->dsi_cinfo.m = m;
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@ -4843,7 +4848,7 @@ static bool dsi_vm_calc_pll_cb(int n, int m, unsigned long fint,
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ctx->dsi_cinfo.clkdco = clkdco;
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ctx->dsi_cinfo.clkdco = clkdco;
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return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
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return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
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dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
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dsi->data->max_fck_freq,
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dsi_vm_calc_hsdiv_cb, ctx);
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dsi_vm_calc_hsdiv_cb, ctx);
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}
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}
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@ -4914,7 +4919,7 @@ static int dsi_set_config(struct omap_dss_device *dssdev,
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goto err;
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goto err;
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}
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}
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dsi_pll_calc_dsi_fck(&ctx.dsi_cinfo);
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dsi_pll_calc_dsi_fck(dsi, &ctx.dsi_cinfo);
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r = dsi_lp_clock_calc(ctx.dsi_cinfo.clkout[HSDIV_DSI],
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r = dsi_lp_clock_calc(ctx.dsi_cinfo.clkout[HSDIV_DSI],
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config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo);
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config->lp_clk_min, config->lp_clk_max, &dsi->user_lp_cinfo);
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@ -5335,6 +5340,8 @@ static const struct dsi_of_data dsi_of_data_omap34xx = {
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{ .address = 0x4804fc00, .id = 0, },
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{ .address = 0x4804fc00, .id = 0, },
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{ },
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{ },
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},
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},
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.max_fck_freq = 173000000,
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.max_pll_lpdiv = (1 << 13) - 1,
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.quirks = DSI_QUIRK_REVERSE_TXCLKESC,
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.quirks = DSI_QUIRK_REVERSE_TXCLKESC,
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};
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};
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@ -5345,6 +5352,8 @@ static const struct dsi_of_data dsi_of_data_omap36xx = {
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{ .address = 0x4804fc00, .id = 0, },
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{ .address = 0x4804fc00, .id = 0, },
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{ },
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{ },
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},
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},
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.max_fck_freq = 173000000,
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.max_pll_lpdiv = (1 << 13) - 1,
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.quirks = DSI_QUIRK_PLL_PWR_BUG,
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.quirks = DSI_QUIRK_PLL_PWR_BUG,
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};
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};
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@ -5356,6 +5365,8 @@ static const struct dsi_of_data dsi_of_data_omap4 = {
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{ .address = 0x58005000, .id = 1, },
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{ .address = 0x58005000, .id = 1, },
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{ },
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{ },
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},
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},
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.max_fck_freq = 170000000,
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.max_pll_lpdiv = (1 << 13) - 1,
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.quirks = DSI_QUIRK_DCS_CMD_CONFIG_VC | DSI_QUIRK_VC_OCP_WIDTH
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.quirks = DSI_QUIRK_DCS_CMD_CONFIG_VC | DSI_QUIRK_VC_OCP_WIDTH
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| DSI_QUIRK_GNQ,
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| DSI_QUIRK_GNQ,
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};
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};
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@ -5368,6 +5379,8 @@ static const struct dsi_of_data dsi_of_data_omap5 = {
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{ .address = 0x58009000, .id = 1, },
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{ .address = 0x58009000, .id = 1, },
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{ },
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{ },
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},
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},
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.max_fck_freq = 209250000,
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.max_pll_lpdiv = (1 << 13) - 1,
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.quirks = DSI_QUIRK_DCS_CMD_CONFIG_VC | DSI_QUIRK_VC_OCP_WIDTH
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.quirks = DSI_QUIRK_DCS_CMD_CONFIG_VC | DSI_QUIRK_VC_OCP_WIDTH
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| DSI_QUIRK_GNQ | DSI_QUIRK_PHY_DCC,
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| DSI_QUIRK_GNQ | DSI_QUIRK_PHY_DCC,
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};
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};
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@ -114,8 +114,6 @@ static const struct dss_param_range omap2_dss_param_range[] = {
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static const struct dss_param_range omap3_dss_param_range[] = {
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static const struct dss_param_range omap3_dss_param_range[] = {
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[FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
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[FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
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[FEAT_PARAM_DSI_FCK] = { 0, 173000000 },
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[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
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[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
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[FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
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[FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
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};
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};
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@ -130,8 +128,6 @@ static const struct dss_param_range am43xx_dss_param_range[] = {
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static const struct dss_param_range omap4_dss_param_range[] = {
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static const struct dss_param_range omap4_dss_param_range[] = {
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[FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
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[FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
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[FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
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[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
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[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
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[FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
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[FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
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};
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};
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@ -139,8 +135,6 @@ static const struct dss_param_range omap4_dss_param_range[] = {
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static const struct dss_param_range omap5_dss_param_range[] = {
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static const struct dss_param_range omap5_dss_param_range[] = {
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[FEAT_PARAM_DSS_FCK] = { 0, 209250000 },
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[FEAT_PARAM_DSS_FCK] = { 0, 209250000 },
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSS_PCD] = { 1, 255 },
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[FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
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[FEAT_PARAM_DSI_FCK] = { 0, 209250000 },
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[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
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[FEAT_PARAM_DOWNSCALE] = { 1, 4 },
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[FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
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[FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
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};
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};
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@ -28,8 +28,6 @@
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enum dss_range_param {
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enum dss_range_param {
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FEAT_PARAM_DSS_FCK,
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FEAT_PARAM_DSS_FCK,
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FEAT_PARAM_DSS_PCD,
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FEAT_PARAM_DSS_PCD,
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FEAT_PARAM_DSIPLL_LPDIV,
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FEAT_PARAM_DSI_FCK,
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FEAT_PARAM_DOWNSCALE,
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FEAT_PARAM_DOWNSCALE,
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FEAT_PARAM_LINEWIDTH,
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FEAT_PARAM_LINEWIDTH,
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};
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};
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