mirror of https://gitee.com/openkylin/linux.git
qlcnic: change all P3 references to P3P
This patch just rename all P3 #define to P3P. Signed-off-by: Sritej Velaga <sritej.velaga@qlogic.com> Signed-off-by: Amit Kumar Salecha <amit.salecha@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
ee07c1a701
commit
ff1b1bf867
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@ -94,12 +94,12 @@
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#define FIRST_PAGE_GROUP_START 0
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#define FIRST_PAGE_GROUP_START 0
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#define FIRST_PAGE_GROUP_END 0x100000
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#define FIRST_PAGE_GROUP_END 0x100000
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#define P3_MAX_MTU (9600)
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#define P3P_MAX_MTU (9600)
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#define P3_MIN_MTU (68)
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#define P3P_MIN_MTU (68)
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#define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
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#define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
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#define QLCNIC_P3_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
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#define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
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#define QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3_MAX_MTU)
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#define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
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#define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
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#define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
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#define QLCNIC_LRO_BUFFER_EXTRA 2048
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#define QLCNIC_LRO_BUFFER_EXTRA 2048
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@ -307,20 +307,20 @@ struct uni_data_desc{
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/* Magic number to let user know flash is programmed */
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/* Magic number to let user know flash is programmed */
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#define QLCNIC_BDINFO_MAGIC 0x12345678
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#define QLCNIC_BDINFO_MAGIC 0x12345678
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#define QLCNIC_BRDTYPE_P3_REF_QG 0x0021
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#define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
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#define QLCNIC_BRDTYPE_P3_HMEZ 0x0022
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#define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
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#define QLCNIC_BRDTYPE_P3_10G_CX4_LP 0x0023
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#define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
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#define QLCNIC_BRDTYPE_P3_4_GB 0x0024
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#define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
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#define QLCNIC_BRDTYPE_P3_IMEZ 0x0025
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#define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
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#define QLCNIC_BRDTYPE_P3_10G_SFP_PLUS 0x0026
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#define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
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#define QLCNIC_BRDTYPE_P3_10000_BASE_T 0x0027
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#define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
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#define QLCNIC_BRDTYPE_P3_XG_LOM 0x0028
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#define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
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#define QLCNIC_BRDTYPE_P3_4_GB_MM 0x0029
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#define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
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#define QLCNIC_BRDTYPE_P3_10G_SFP_CT 0x002a
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#define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
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#define QLCNIC_BRDTYPE_P3_10G_SFP_QT 0x002b
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#define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
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#define QLCNIC_BRDTYPE_P3_10G_CX4 0x0031
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#define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
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#define QLCNIC_BRDTYPE_P3_10G_XFP 0x0032
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#define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
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#define QLCNIC_BRDTYPE_P3_10G_TP 0x0080
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#define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
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#define QLCNIC_MSIX_TABLE_OFFSET 0x44
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#define QLCNIC_MSIX_TABLE_OFFSET 0x44
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@ -719,7 +719,7 @@ struct qlcnic_cardrsp_tx_ctx {
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/* MAC */
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/* MAC */
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#define MC_COUNT_P3 38
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#define MC_COUNT_P3P 38
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#define QLCNIC_MAC_NOOP 0
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#define QLCNIC_MAC_NOOP 0
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#define QLCNIC_MAC_ADD 1
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#define QLCNIC_MAC_ADD 1
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@ -96,7 +96,7 @@ static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
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static const u32 diag_registers[] = {
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static const u32 diag_registers[] = {
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CRB_CMDPEG_STATE,
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CRB_CMDPEG_STATE,
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CRB_RCVPEG_STATE,
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CRB_RCVPEG_STATE,
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CRB_XG_STATE_P3,
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CRB_XG_STATE_P3P,
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CRB_FW_CAPABILITIES_1,
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CRB_FW_CAPABILITIES_1,
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ISR_INT_STATE_REG,
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ISR_INT_STATE_REG,
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QLCNIC_CRB_DRV_ACTIVE,
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QLCNIC_CRB_DRV_ACTIVE,
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@ -189,9 +189,9 @@ qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
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goto skip;
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goto skip;
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}
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}
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val = QLCRD32(adapter, P3_LINK_SPEED_REG(pcifn));
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val = QLCRD32(adapter, P3P_LINK_SPEED_REG(pcifn));
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ecmd->speed = P3_LINK_SPEED_MHZ *
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ecmd->speed = P3P_LINK_SPEED_MHZ *
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P3_LINK_SPEED_VAL(pcifn, val);
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P3P_LINK_SPEED_VAL(pcifn, val);
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ecmd->duplex = DUPLEX_FULL;
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ecmd->duplex = DUPLEX_FULL;
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ecmd->autoneg = AUTONEG_DISABLE;
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ecmd->autoneg = AUTONEG_DISABLE;
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} else
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} else
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@ -202,42 +202,42 @@ qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
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ecmd->transceiver = XCVR_EXTERNAL;
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ecmd->transceiver = XCVR_EXTERNAL;
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switch (adapter->ahw.board_type) {
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switch (adapter->ahw.board_type) {
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case QLCNIC_BRDTYPE_P3_REF_QG:
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case QLCNIC_BRDTYPE_P3P_REF_QG:
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case QLCNIC_BRDTYPE_P3_4_GB:
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case QLCNIC_BRDTYPE_P3P_4_GB:
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case QLCNIC_BRDTYPE_P3_4_GB_MM:
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case QLCNIC_BRDTYPE_P3P_4_GB_MM:
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ecmd->supported |= SUPPORTED_Autoneg;
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ecmd->supported |= SUPPORTED_Autoneg;
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ecmd->advertising |= ADVERTISED_Autoneg;
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ecmd->advertising |= ADVERTISED_Autoneg;
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case QLCNIC_BRDTYPE_P3_10G_CX4:
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case QLCNIC_BRDTYPE_P3P_10G_CX4:
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case QLCNIC_BRDTYPE_P3_10G_CX4_LP:
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case QLCNIC_BRDTYPE_P3P_10G_CX4_LP:
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case QLCNIC_BRDTYPE_P3_10000_BASE_T:
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case QLCNIC_BRDTYPE_P3P_10000_BASE_T:
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ecmd->supported |= SUPPORTED_TP;
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ecmd->supported |= SUPPORTED_TP;
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ecmd->advertising |= ADVERTISED_TP;
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ecmd->advertising |= ADVERTISED_TP;
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ecmd->port = PORT_TP;
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ecmd->port = PORT_TP;
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ecmd->autoneg = adapter->link_autoneg;
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ecmd->autoneg = adapter->link_autoneg;
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break;
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break;
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case QLCNIC_BRDTYPE_P3_IMEZ:
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case QLCNIC_BRDTYPE_P3P_IMEZ:
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case QLCNIC_BRDTYPE_P3_XG_LOM:
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case QLCNIC_BRDTYPE_P3P_XG_LOM:
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case QLCNIC_BRDTYPE_P3_HMEZ:
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case QLCNIC_BRDTYPE_P3P_HMEZ:
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ecmd->supported |= SUPPORTED_MII;
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ecmd->supported |= SUPPORTED_MII;
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ecmd->advertising |= ADVERTISED_MII;
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ecmd->advertising |= ADVERTISED_MII;
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ecmd->port = PORT_MII;
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ecmd->port = PORT_MII;
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ecmd->autoneg = AUTONEG_DISABLE;
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ecmd->autoneg = AUTONEG_DISABLE;
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break;
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break;
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case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS:
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case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS:
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case QLCNIC_BRDTYPE_P3_10G_SFP_CT:
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case QLCNIC_BRDTYPE_P3P_10G_SFP_CT:
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case QLCNIC_BRDTYPE_P3_10G_SFP_QT:
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case QLCNIC_BRDTYPE_P3P_10G_SFP_QT:
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ecmd->advertising |= ADVERTISED_TP;
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ecmd->advertising |= ADVERTISED_TP;
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ecmd->supported |= SUPPORTED_TP;
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ecmd->supported |= SUPPORTED_TP;
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check_sfp_module = netif_running(dev) &&
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check_sfp_module = netif_running(dev) &&
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adapter->has_link_events;
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adapter->has_link_events;
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case QLCNIC_BRDTYPE_P3_10G_XFP:
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case QLCNIC_BRDTYPE_P3P_10G_XFP:
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ecmd->supported |= SUPPORTED_FIBRE;
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ecmd->supported |= SUPPORTED_FIBRE;
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ecmd->advertising |= ADVERTISED_FIBRE;
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ecmd->advertising |= ADVERTISED_FIBRE;
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ecmd->port = PORT_FIBRE;
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ecmd->port = PORT_FIBRE;
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ecmd->autoneg = AUTONEG_DISABLE;
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ecmd->autoneg = AUTONEG_DISABLE;
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break;
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break;
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case QLCNIC_BRDTYPE_P3_10G_TP:
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case QLCNIC_BRDTYPE_P3P_10G_TP:
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if (adapter->ahw.port_type == QLCNIC_XGBE) {
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if (adapter->ahw.port_type == QLCNIC_XGBE) {
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ecmd->autoneg = AUTONEG_DISABLE;
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ecmd->autoneg = AUTONEG_DISABLE;
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ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
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ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
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@ -381,9 +381,9 @@ static u32 qlcnic_test_link(struct net_device *dev)
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struct qlcnic_adapter *adapter = netdev_priv(dev);
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struct qlcnic_adapter *adapter = netdev_priv(dev);
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u32 val;
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u32 val;
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val = QLCRD32(adapter, CRB_XG_STATE_P3);
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val = QLCRD32(adapter, CRB_XG_STATE_P3P);
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val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
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val = XG_LINK_STATE_P3P(adapter->ahw.pci_func, val);
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return (val == XG_LINK_UP_P3) ? 0 : 1;
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return (val == XG_LINK_UP_P3P) ? 0 : 1;
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}
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}
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static int
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static int
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@ -556,18 +556,18 @@ enum {
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#define XG_LINK_UP 0x10
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#define XG_LINK_UP 0x10
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#define XG_LINK_DOWN 0x20
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#define XG_LINK_DOWN 0x20
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#define XG_LINK_UP_P3 0x01
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#define XG_LINK_UP_P3P 0x01
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#define XG_LINK_DOWN_P3 0x02
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#define XG_LINK_DOWN_P3P 0x02
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#define XG_LINK_STATE_P3_MASK 0xf
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#define XG_LINK_STATE_P3P_MASK 0xf
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#define XG_LINK_STATE_P3(pcifn, val) \
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#define XG_LINK_STATE_P3P(pcifn, val) \
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(((val) >> ((pcifn) * 4)) & XG_LINK_STATE_P3_MASK)
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(((val) >> ((pcifn) * 4)) & XG_LINK_STATE_P3P_MASK)
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#define P3_LINK_SPEED_MHZ 100
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#define P3P_LINK_SPEED_MHZ 100
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#define P3_LINK_SPEED_MASK 0xff
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#define P3P_LINK_SPEED_MASK 0xff
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#define P3_LINK_SPEED_REG(pcifn) \
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#define P3P_LINK_SPEED_REG(pcifn) \
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(CRB_PF_LINK_SPEED_1 + (((pcifn) / 4) * 4))
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(CRB_PF_LINK_SPEED_1 + (((pcifn) / 4) * 4))
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#define P3_LINK_SPEED_VAL(pcifn, reg) \
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#define P3P_LINK_SPEED_VAL(pcifn, reg) \
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(((reg) >> (8 * ((pcifn) & 0x3))) & P3_LINK_SPEED_MASK)
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(((reg) >> (8 * ((pcifn) & 0x3))) & P3P_LINK_SPEED_MASK)
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#define QLCNIC_CAM_RAM_BASE (QLCNIC_CRB_CAM + 0x02000)
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#define QLCNIC_CAM_RAM_BASE (QLCNIC_CRB_CAM + 0x02000)
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#define QLCNIC_CAM_RAM(reg) (QLCNIC_CAM_RAM_BASE + (reg))
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#define QLCNIC_CAM_RAM(reg) (QLCNIC_CAM_RAM_BASE + (reg))
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@ -592,7 +592,7 @@ enum {
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#define CRB_CMDPEG_STATE (QLCNIC_REG(0x50))
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#define CRB_CMDPEG_STATE (QLCNIC_REG(0x50))
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#define CRB_RCVPEG_STATE (QLCNIC_REG(0x13c))
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#define CRB_RCVPEG_STATE (QLCNIC_REG(0x13c))
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#define CRB_XG_STATE_P3 (QLCNIC_REG(0x98))
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#define CRB_XG_STATE_P3P (QLCNIC_REG(0x98))
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#define CRB_PF_LINK_SPEED_1 (QLCNIC_REG(0xe8))
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#define CRB_PF_LINK_SPEED_1 (QLCNIC_REG(0xe8))
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#define CRB_PF_LINK_SPEED_2 (QLCNIC_REG(0xec))
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#define CRB_PF_LINK_SPEED_2 (QLCNIC_REG(0xec))
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@ -754,9 +754,9 @@ int qlcnic_change_mtu(struct net_device *netdev, int mtu)
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struct qlcnic_adapter *adapter = netdev_priv(netdev);
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struct qlcnic_adapter *adapter = netdev_priv(netdev);
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int rc = 0;
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int rc = 0;
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if (mtu < P3_MIN_MTU || mtu > P3_MAX_MTU) {
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if (mtu < P3P_MIN_MTU || mtu > P3P_MAX_MTU) {
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dev_err(&adapter->netdev->dev, "%d bytes < mtu < %d bytes"
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dev_err(&adapter->netdev->dev, "%d bytes < mtu < %d bytes"
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" not supported\n", P3_MAX_MTU, P3_MIN_MTU);
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" not supported\n", P3P_MAX_MTU, P3P_MIN_MTU);
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -1161,31 +1161,31 @@ int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
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adapter->ahw.board_type = board_type;
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adapter->ahw.board_type = board_type;
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if (board_type == QLCNIC_BRDTYPE_P3_4_GB_MM) {
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if (board_type == QLCNIC_BRDTYPE_P3P_4_GB_MM) {
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u32 gpio = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_PAD_GPIO_I);
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u32 gpio = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_PAD_GPIO_I);
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if ((gpio & 0x8000) == 0)
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if ((gpio & 0x8000) == 0)
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board_type = QLCNIC_BRDTYPE_P3_10G_TP;
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board_type = QLCNIC_BRDTYPE_P3P_10G_TP;
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}
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}
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switch (board_type) {
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switch (board_type) {
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case QLCNIC_BRDTYPE_P3_HMEZ:
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case QLCNIC_BRDTYPE_P3P_HMEZ:
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case QLCNIC_BRDTYPE_P3_XG_LOM:
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case QLCNIC_BRDTYPE_P3P_XG_LOM:
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case QLCNIC_BRDTYPE_P3_10G_CX4:
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case QLCNIC_BRDTYPE_P3P_10G_CX4:
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case QLCNIC_BRDTYPE_P3_10G_CX4_LP:
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case QLCNIC_BRDTYPE_P3P_10G_CX4_LP:
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case QLCNIC_BRDTYPE_P3_IMEZ:
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case QLCNIC_BRDTYPE_P3P_IMEZ:
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case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS:
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case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS:
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case QLCNIC_BRDTYPE_P3_10G_SFP_CT:
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case QLCNIC_BRDTYPE_P3P_10G_SFP_CT:
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case QLCNIC_BRDTYPE_P3_10G_SFP_QT:
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case QLCNIC_BRDTYPE_P3P_10G_SFP_QT:
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case QLCNIC_BRDTYPE_P3_10G_XFP:
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case QLCNIC_BRDTYPE_P3P_10G_XFP:
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case QLCNIC_BRDTYPE_P3_10000_BASE_T:
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case QLCNIC_BRDTYPE_P3P_10000_BASE_T:
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adapter->ahw.port_type = QLCNIC_XGBE;
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adapter->ahw.port_type = QLCNIC_XGBE;
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break;
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break;
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case QLCNIC_BRDTYPE_P3_REF_QG:
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case QLCNIC_BRDTYPE_P3P_REF_QG:
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case QLCNIC_BRDTYPE_P3_4_GB:
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case QLCNIC_BRDTYPE_P3P_4_GB:
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case QLCNIC_BRDTYPE_P3_4_GB_MM:
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case QLCNIC_BRDTYPE_P3P_4_GB_MM:
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adapter->ahw.port_type = QLCNIC_GBE;
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adapter->ahw.port_type = QLCNIC_GBE;
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break;
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break;
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case QLCNIC_BRDTYPE_P3_10G_TP:
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case QLCNIC_BRDTYPE_P3P_10G_TP:
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adapter->ahw.port_type = (adapter->portnum < 2) ?
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adapter->ahw.port_type = (adapter->portnum < 2) ?
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QLCNIC_XGBE : QLCNIC_GBE;
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QLCNIC_XGBE : QLCNIC_GBE;
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break;
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break;
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@ -259,14 +259,14 @@ int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
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switch (ring) {
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switch (ring) {
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case RCV_RING_NORMAL:
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case RCV_RING_NORMAL:
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rds_ring->num_desc = adapter->num_rxd;
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rds_ring->num_desc = adapter->num_rxd;
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rds_ring->dma_size = QLCNIC_P3_RX_BUF_MAX_LEN;
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rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
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rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
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rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
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break;
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break;
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case RCV_RING_JUMBO:
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case RCV_RING_JUMBO:
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rds_ring->num_desc = adapter->num_jumbo_rxd;
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rds_ring->num_desc = adapter->num_jumbo_rxd;
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rds_ring->dma_size =
|
rds_ring->dma_size =
|
||||||
QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN;
|
QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
|
||||||
|
|
||||||
if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
|
if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
|
||||||
rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
|
rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
|
||||||
|
|
Loading…
Reference in New Issue