From ff2acd7d5da9c78ad6ffb7663c5d72d2a839f6df Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Fri, 21 Dec 2012 09:28:13 -0700 Subject: [PATCH] ARM: AM33XX: Add aes0 crypto clock data Add clock data for for the SHA0 crypto module on the am33xx SoC. CC: Paul Walmsley Signed-off-by: Mark A. Greer Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cclock33xx_data.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index ef0267ca2417..c8dcc523c31a 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -417,6 +417,10 @@ static struct clk sha0_fck; DEFINE_STRUCT_CLK_HW_OMAP(sha0_fck, NULL); DEFINE_STRUCT_CLK(sha0_fck, dpll_core_ck_parents, clk_ops_null); +static struct clk aes0_fck; +DEFINE_STRUCT_CLK_HW_OMAP(aes0_fck, NULL); +DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null); + /* * Modules clock nodes * @@ -883,6 +887,7 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "smartreflex0_fck", &smartreflex0_fck), CLK(NULL, "smartreflex1_fck", &smartreflex1_fck), CLK(NULL, "sha0_fck", &sha0_fck), + CLK(NULL, "aes0_fck", &aes0_fck), CLK(NULL, "timer1_fck", &timer1_fck), CLK(NULL, "timer2_fck", &timer2_fck), CLK(NULL, "timer3_fck", &timer3_fck),