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ARM: dts: socfpga: Remove I2C EEPROMs from VINING FPGA 

Remove the EEPROMs attached to the I2C expander ports which
lead to the backplane slots from the main VIN|ING DTS file.
These EEPROMs are bound using separate DTO files, which lets
us handle both two-slot and six-slot configuration of the
backplane.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Marek Vasut 2017-05-09 09:02:33 -05:00 committed by Dinh Nguyen
parent 79528279c0
commit ff3d90decb
1 changed files with 2 additions and 32 deletions
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34
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
View File

@ -203,69 +203,39 @@ i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
eeprom@51 {
compatible = "at,24c01";
pagesize = <8>;
reg = <0x51>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
eeprom@51 {
compatible = "at,24c01";
pagesize = <8>;
reg = <0x51>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
eeprom@51 {
compatible = "at,24c01";
pagesize = <8>;
reg = <0x51>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
eeprom@51 {
compatible = "at,24c01";
pagesize = <8>;
reg = <0x51>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
eeprom@51 {
compatible = "at,24c01";
pagesize = <8>;
reg = <0x51>;
};
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
eeprom@51 {
compatible = "at,24c01";
pagesize = <8>;
reg = <0x51>;
};
};
i2c@6 {
i2c@6 { /* Backplane EEPROM */
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
@ -276,7 +246,7 @@ eeprom@51 {
};
};
i2c@7 {
i2c@7 { /* Power board EEPROM */
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;