mirror of https://gitee.com/openkylin/linux.git
ath9k: Miscellaneous fixes
This patch removes ath_vap_listen() and dma wrapper macros. Also, Inline abuse is cleaned up and a few typos are fixed. Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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dc2222a85f
commit
ff9b662dab
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@ -114,21 +114,21 @@ static void ath_beacon_setup(struct ath_softc *sc,
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if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
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rate |= rt->info[rix].shortPreamble;
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ath9k_hw_set11n_txdesc(ah, ds
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, skb->len + FCS_LEN /* frame length */
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, ATH9K_PKT_TYPE_BEACON /* Atheros packet type */
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, avp->av_btxctl.txpower /* txpower XXX */
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, ATH9K_TXKEYIX_INVALID /* no encryption */
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, ATH9K_KEY_TYPE_CLEAR /* no encryption */
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, flags /* no ack, veol for beacons */
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ath9k_hw_set11n_txdesc(ah, ds,
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skb->len + FCS_LEN, /* frame length */
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ATH9K_PKT_TYPE_BEACON, /* Atheros packet type */
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avp->av_btxctl.txpower, /* txpower XXX */
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ATH9K_TXKEYIX_INVALID, /* no encryption */
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ATH9K_KEY_TYPE_CLEAR, /* no encryption */
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flags /* no ack, veol for beacons */
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);
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/* NB: beacon's BufLen must be a multiple of 4 bytes */
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ath9k_hw_filltxdesc(ah, ds
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, roundup(skb->len, 4) /* buffer length */
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, true /* first segment */
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, true /* last segment */
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, ds /* first descriptor */
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ath9k_hw_filltxdesc(ah, ds,
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roundup(skb->len, 4), /* buffer length */
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true, /* first segment */
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true, /* last segment */
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ds /* first descriptor */
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);
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memzero(series, sizeof(struct ath9k_11n_rate_series) * 4);
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@ -551,7 +551,7 @@ void ath_beacon_free(struct ath_softc *sc)
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void ath9k_beacon_tasklet(unsigned long data)
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{
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#define TSF_TO_TU(_h,_l) \
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#define TSF_TO_TU(_h,_l) \
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((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
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struct ath_softc *sc = (struct ath_softc *)data;
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@ -898,19 +898,19 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
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"cfp:period %u "
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"maxdur %u "
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"next %u "
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"timoffset %u\n"
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, __func__
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, (unsigned long long)tsf, tsftu
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, bs.bs_intval
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, bs.bs_nexttbtt
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, bs.bs_dtimperiod
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, bs.bs_nextdtim
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, bs.bs_bmissthreshold
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, bs.bs_sleepduration
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, bs.bs_cfpperiod
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, bs.bs_cfpmaxduration
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, bs.bs_cfpnext
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, bs.bs_timoffset
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"timoffset %u\n",
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__func__,
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(unsigned long long)tsf, tsftu,
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bs.bs_intval,
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bs.bs_nexttbtt,
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bs.bs_dtimperiod,
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bs.bs_nextdtim,
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bs.bs_bmissthreshold,
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bs.bs_sleepduration,
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bs.bs_cfpperiod,
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bs.bs_cfpmaxduration,
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bs.bs_cfpnext,
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bs.bs_timoffset
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);
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ath9k_hw_set_interrupts(ah, 0);
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@ -51,10 +51,8 @@ static void bus_read_cachesize(struct ath_softc *sc, int *csz)
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* Set current operating mode
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*
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* This function initializes and fills the rate table in the ATH object based
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* on the operating mode. The blink rates are also set up here, although
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* they have been superceeded by the ath_led module.
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* on the operating mode.
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*/
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static void ath_setcurmode(struct ath_softc *sc, enum wireless_mode mode)
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{
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const struct ath9k_rate_table *rt;
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@ -232,7 +230,7 @@ static int ath_setup_channels(struct ath_softc *sc)
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* Determine mode from channel flags
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*
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* This routine will provide the enumerated WIRELESSS_MODE value based
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* on the settings of the channel flags. If ho valid set of flags
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* on the settings of the channel flags. If no valid set of flags
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* exist, the lowest mode (11b) is selected.
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*/
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@ -257,7 +255,8 @@ static enum wireless_mode ath_chan2mode(struct ath9k_channel *chan)
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else if (chan->chanmode == CHANNEL_G_HT40MINUS)
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return ATH9K_MODE_11NG_HT40MINUS;
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/* NB: should not get here */
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WARN_ON(1); /* should not get here */
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return ATH9K_MODE_11B;
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}
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@ -278,8 +277,6 @@ static int ath_stop(struct ath_softc *sc)
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/*
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* Shutdown the hardware and driver:
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* stop output from above
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* reset 802.11 state machine
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* (sends station deassoc/deauth frames)
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* turn off timers
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* disable interrupts
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* clear transmit machinery
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@ -499,69 +496,6 @@ void ath_update_chainmask(struct ath_softc *sc, int is_ht)
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/* VAP management */
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/******************/
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/*
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* VAP in Listen mode
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*
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* This routine brings the VAP out of the down state into a "listen" state
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* where it waits for association requests. This is used in AP and AdHoc
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* modes.
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*/
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int ath_vap_listen(struct ath_softc *sc, int if_id)
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{
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struct ath_hal *ah = sc->sc_ah;
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struct ath_vap *avp;
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u32 rfilt = 0;
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DECLARE_MAC_BUF(mac);
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avp = sc->sc_vaps[if_id];
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if (avp == NULL) {
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DPRINTF(sc, ATH_DBG_FATAL, "%s: invalid interface id %u\n",
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__func__, if_id);
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return -EINVAL;
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}
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#ifdef CONFIG_SLOW_ANT_DIV
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ath_slow_ant_div_stop(&sc->sc_antdiv);
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#endif
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/* update ratectrl about the new state */
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ath_rate_newstate(sc, avp);
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rfilt = ath_calcrxfilter(sc);
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ath9k_hw_setrxfilter(ah, rfilt);
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if (sc->sc_ah->ah_opmode == ATH9K_M_STA ||
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sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
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memcpy(sc->sc_curbssid, ath_bcast_mac, ETH_ALEN);
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ath9k_hw_write_associd(ah, sc->sc_curbssid, sc->sc_curaid);
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} else
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sc->sc_curaid = 0;
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DPRINTF(sc, ATH_DBG_CONFIG,
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"%s: RX filter 0x%x bssid %s aid 0x%x\n",
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__func__, rfilt, print_mac(mac,
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sc->sc_curbssid), sc->sc_curaid);
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/*
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* XXXX
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* Disable BMISS interrupt when we're not associated
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*/
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if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP) {
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ath9k_hw_set_interrupts(ah, sc->sc_imask & ~ATH9K_INT_BMISS);
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sc->sc_imask &= ~ATH9K_INT_BMISS;
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} else {
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ath9k_hw_set_interrupts(
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ah,
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sc->sc_imask & ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
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sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
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}
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/* need to reconfigure the beacons when it moves to RUN */
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sc->sc_flags &= ~SC_OP_BEACONS;
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return 0;
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}
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int ath_vap_attach(struct ath_softc *sc,
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int if_id,
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struct ieee80211_vif *if_data,
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@ -82,9 +82,6 @@ struct ath_node;
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/* XXX: remove */
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#define memzero(_buf, _len) memset(_buf, 0, _len)
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#define get_dma_mem_context(var, field) (&((var)->field))
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#define copy_dma_mem_context(dst, src) (*dst = *src)
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#define ATH9K_BH_STATUS_INTACT 0
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#define ATH9K_BH_STATUS_CHANGE 1
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@ -769,8 +766,7 @@ int ath_vap_attach(struct ath_softc *sc,
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enum ath9k_opmode opmode);
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int ath_vap_detach(struct ath_softc *sc, int if_id);
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int ath_vap_config(struct ath_softc *sc,
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int if_id, struct ath_vap_config *if_config);
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int ath_vap_listen(struct ath_softc *sc, int if_id);
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int if_id, struct ath_vap_config *if_config);
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/*********************/
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/* Antenna diversity */
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@ -348,7 +348,7 @@ static void ath9k_hw_set_defaults(struct ath_hal *ah)
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ah->ah_config.intr_mitigation = 0;
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}
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static inline void ath9k_hw_override_ini(struct ath_hal *ah,
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static void ath9k_hw_override_ini(struct ath_hal *ah,
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struct ath9k_channel *chan)
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{
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if (!AR_SREV_5416_V20_OR_LATER(ah)
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@ -358,8 +358,8 @@ static inline void ath9k_hw_override_ini(struct ath_hal *ah,
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REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);
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}
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static inline void ath9k_hw_init_bb(struct ath_hal *ah,
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struct ath9k_channel *chan)
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static void ath9k_hw_init_bb(struct ath_hal *ah,
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struct ath9k_channel *chan)
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{
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u32 synthDelay;
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@ -374,8 +374,8 @@ static inline void ath9k_hw_init_bb(struct ath_hal *ah,
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udelay(synthDelay + BASE_ACTIVATE_DELAY);
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}
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static inline void ath9k_hw_init_interrupt_masks(struct ath_hal *ah,
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enum ath9k_opmode opmode)
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static void ath9k_hw_init_interrupt_masks(struct ath_hal *ah,
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enum ath9k_opmode opmode)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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@ -405,7 +405,7 @@ static inline void ath9k_hw_init_interrupt_masks(struct ath_hal *ah,
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}
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}
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static inline void ath9k_hw_init_qos(struct ath_hal *ah)
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static void ath9k_hw_init_qos(struct ath_hal *ah)
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{
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REG_WRITE(ah, AR_MIC_QOS_CONTROL, 0x100aa);
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REG_WRITE(ah, AR_MIC_QOS_SELECT, 0x3210);
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@ -500,7 +500,7 @@ static inline bool ath9k_hw_nvram_read(struct ath_hal *ah,
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return ath9k_hw_eeprom_read(ah, off, data);
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}
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static inline bool ath9k_hw_fill_eeprom(struct ath_hal *ah)
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static bool ath9k_hw_fill_eeprom(struct ath_hal *ah)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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struct ar5416_eeprom *eep = &ahp->ah_eeprom;
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@ -767,7 +767,7 @@ ath9k_hw_eeprom_set_board_values(struct ath_hal *ah,
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return true;
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}
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static inline int ath9k_hw_check_eeprom(struct ath_hal *ah)
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static int ath9k_hw_check_eeprom(struct ath_hal *ah)
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{
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u32 sum = 0, el;
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u16 *eepdata;
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@ -1272,7 +1272,7 @@ u32 ath9k_hw_get_eeprom(struct ath_hal_5416 *ahp,
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}
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}
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static inline int ath9k_hw_get_radiorev(struct ath_hal *ah)
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static int ath9k_hw_get_radiorev(struct ath_hal *ah)
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{
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u32 val;
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int i;
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@ -1285,7 +1285,7 @@ static inline int ath9k_hw_get_radiorev(struct ath_hal *ah)
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return ath9k_hw_reverse_bits(val, 8);
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}
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static inline int ath9k_hw_init_macaddr(struct ath_hal *ah)
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static int ath9k_hw_init_macaddr(struct ath_hal *ah)
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{
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u32 sum;
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int i;
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@ -1367,7 +1367,7 @@ static u16 ath9k_hw_eeprom_get_spur_chan(struct ath_hal *ah,
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return spur_val;
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}
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static inline int ath9k_hw_rfattach(struct ath_hal *ah)
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static int ath9k_hw_rfattach(struct ath_hal *ah)
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{
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bool rfStatus = false;
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int ecode = 0;
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@ -1412,8 +1412,8 @@ static int ath9k_hw_rf_claim(struct ath_hal *ah)
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return 0;
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}
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static inline void ath9k_hw_init_pll(struct ath_hal *ah,
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struct ath9k_channel *chan)
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static void ath9k_hw_init_pll(struct ath_hal *ah,
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struct ath9k_channel *chan)
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{
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u32 pll;
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@ -1531,7 +1531,7 @@ static void ath9k_hw_set_operating_mode(struct ath_hal *ah, int opmode)
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}
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}
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static inline void
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static void
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ath9k_hw_set_rfmode(struct ath_hal *ah, struct ath9k_channel *chan)
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{
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u32 rfMode = 0;
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@ -1601,7 +1601,7 @@ static bool ath9k_hw_set_reset(struct ath_hal *ah, int type)
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return true;
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}
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static inline bool ath9k_hw_set_reset_power_on(struct ath_hal *ah)
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static bool ath9k_hw_set_reset_power_on(struct ath_hal *ah)
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{
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REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
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AR_RTC_FORCE_WAKE_ON_INT);
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@ -1642,7 +1642,7 @@ static bool ath9k_hw_set_reset_reg(struct ath_hal *ah,
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}
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}
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static inline
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static
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struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
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struct ath9k_channel *chan)
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{
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@ -2076,7 +2076,7 @@ static void ath9k_hw_ani_attach(struct ath_hal *ah)
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ahp->ah_procPhyErr |= HAL_PROCESS_ANI;
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}
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static inline void ath9k_hw_ani_setup(struct ath_hal *ah)
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static void ath9k_hw_ani_setup(struct ath_hal *ah)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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int i;
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@ -2861,7 +2861,7 @@ static u32 ath9k_hw_gpio_get(struct ath_hal *ah, u32 gpio)
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}
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}
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static inline int ath9k_hw_post_attach(struct ath_hal *ah)
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static int ath9k_hw_post_attach(struct ath_hal *ah)
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{
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int ecode;
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@ -3573,7 +3573,7 @@ static inline bool ath9k_hw_fill_vpd_table(u8 pwrMin,
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return true;
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}
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static inline void
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static void
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ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hal *ah,
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struct ath9k_channel *chan,
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struct cal_data_per_freq *pRawDataSet,
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@ -3755,7 +3755,7 @@ ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hal *ah,
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return;
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}
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static inline bool
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static bool
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ath9k_hw_set_power_cal_table(struct ath_hal *ah,
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struct ar5416_eeprom *pEepData,
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struct ath9k_channel *chan,
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@ -3958,7 +3958,7 @@ void ath9k_hw_configpcipowersave(struct ath_hal *ah, int restore)
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}
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}
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static inline void
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static void
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ath9k_hw_get_legacy_target_powers(struct ath_hal *ah,
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struct ath9k_channel *chan,
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struct cal_target_power_leg *powInfo,
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@ -4024,7 +4024,7 @@ ath9k_hw_get_legacy_target_powers(struct ath_hal *ah,
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}
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}
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static inline void
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static void
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ath9k_hw_get_target_powers(struct ath_hal *ah,
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struct ath9k_channel *chan,
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struct cal_target_power_ht *powInfo,
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@ -4091,7 +4091,7 @@ ath9k_hw_get_target_powers(struct ath_hal *ah,
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}
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}
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static inline u16
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static u16
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ath9k_hw_get_max_edge_power(u16 freq,
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struct cal_ctl_edges *pRdEdgesPower,
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bool is2GHz)
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@ -4121,7 +4121,7 @@ ath9k_hw_get_max_edge_power(u16 freq,
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return twiceMaxEdgePower;
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}
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static inline bool
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static bool
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ath9k_hw_set_power_per_rate_table(struct ath_hal *ah,
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struct ar5416_eeprom *pEepData,
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struct ath9k_channel *chan,
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@ -5100,7 +5100,7 @@ static void ath9k_hw_spur_mitigate(struct ath_hal *ah,
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REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
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}
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static inline void ath9k_hw_init_chain_masks(struct ath_hal *ah)
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static void ath9k_hw_init_chain_masks(struct ath_hal *ah)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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int rx_chainmask, tx_chainmask;
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|
@ -5304,7 +5304,7 @@ bool ath9k_hw_setslottime(struct ath_hal *ah, u32 us)
|
|||
}
|
||||
}
|
||||
|
||||
static inline void ath9k_hw_init_user_settings(struct ath_hal *ah)
|
||||
static void ath9k_hw_init_user_settings(struct ath_hal *ah)
|
||||
{
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
|
||||
|
@ -5323,7 +5323,7 @@ static inline void ath9k_hw_init_user_settings(struct ath_hal *ah)
|
|||
ath9k_hw_set_global_txtimeout(ah, ahp->ah_globaltxtimeout);
|
||||
}
|
||||
|
||||
static inline int
|
||||
static int
|
||||
ath9k_hw_process_ini(struct ath_hal *ah,
|
||||
struct ath9k_channel *chan,
|
||||
enum ath9k_ht_macmode macmode)
|
||||
|
@ -5454,7 +5454,7 @@ ath9k_hw_process_ini(struct ath_hal *ah,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static inline void ath9k_hw_setup_calibration(struct ath_hal *ah,
|
||||
static void ath9k_hw_setup_calibration(struct ath_hal *ah,
|
||||
struct hal_cal_list *currCal)
|
||||
{
|
||||
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
|
||||
|
@ -5490,8 +5490,8 @@ static inline void ath9k_hw_setup_calibration(struct ath_hal *ah,
|
|||
AR_PHY_TIMING_CTRL4_DO_CAL);
|
||||
}
|
||||
|
||||
static inline void ath9k_hw_reset_calibration(struct ath_hal *ah,
|
||||
struct hal_cal_list *currCal)
|
||||
static void ath9k_hw_reset_calibration(struct ath_hal *ah,
|
||||
struct hal_cal_list *currCal)
|
||||
{
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
int i;
|
||||
|
@ -5510,7 +5510,7 @@ static inline void ath9k_hw_reset_calibration(struct ath_hal *ah,
|
|||
ahp->ah_CalSamples = 0;
|
||||
}
|
||||
|
||||
static inline void
|
||||
static void
|
||||
ath9k_hw_per_calibration(struct ath_hal *ah,
|
||||
struct ath9k_channel *ichan,
|
||||
u8 rxchainmask,
|
||||
|
@ -5600,7 +5600,7 @@ static inline bool ath9k_hw_run_init_cals(struct ath_hal *ah,
|
|||
return true;
|
||||
}
|
||||
|
||||
static inline bool
|
||||
static bool
|
||||
ath9k_hw_channel_change(struct ath_hal *ah,
|
||||
struct ath9k_channel *chan,
|
||||
enum ath9k_ht_macmode macmode)
|
||||
|
@ -5777,8 +5777,8 @@ static bool ath9k_hw_iscal_supported(struct ath_hal *ah,
|
|||
return retval;
|
||||
}
|
||||
|
||||
static inline bool ath9k_hw_init_cal(struct ath_hal *ah,
|
||||
struct ath9k_channel *chan)
|
||||
static bool ath9k_hw_init_cal(struct ath_hal *ah,
|
||||
struct ath9k_channel *chan)
|
||||
{
|
||||
struct ath_hal_5416 *ahp = AH5416(ah);
|
||||
struct ath9k_channel *ichan =
|
||||
|
|
|
@ -212,12 +212,10 @@ static int ath_key_config(struct ath_softc *sc,
|
|||
|
||||
static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
|
||||
{
|
||||
#define ATH_MAX_NUM_KEYS 4
|
||||
int freeslot;
|
||||
|
||||
freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
|
||||
freeslot = (key->keyidx >= 4) ? 1 : 0;
|
||||
ath_key_reset(sc, key->keyidx, freeslot);
|
||||
#undef ATH_MAX_NUM_KEYS
|
||||
}
|
||||
|
||||
static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
|
||||
|
@ -620,7 +618,8 @@ static int ath9k_config_interface(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
if ((conf->changed & IEEE80211_IFCC_BEACON) &&
|
||||
(vif->type == IEEE80211_IF_TYPE_IBSS)) {
|
||||
((vif->type == IEEE80211_IF_TYPE_IBSS) ||
|
||||
(vif->type == IEEE80211_IF_TYPE_AP))) {
|
||||
/*
|
||||
* Allocate and setup the beacon frame.
|
||||
*
|
||||
|
@ -638,18 +637,6 @@ static int ath9k_config_interface(struct ieee80211_hw *hw,
|
|||
ath_beacon_sync(sc, 0);
|
||||
}
|
||||
|
||||
if ((conf->changed & IEEE80211_IFCC_BEACON) &&
|
||||
(vif->type == IEEE80211_IF_TYPE_AP)) {
|
||||
ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
|
||||
|
||||
error = ath_beacon_alloc(sc, 0);
|
||||
if (error != 0)
|
||||
return error;
|
||||
|
||||
ath_beacon_config(sc, 0);
|
||||
sc->sc_flags |= SC_OP_BEACONS;
|
||||
}
|
||||
|
||||
/* Check for WLAN_CAPABILITY_PRIVACY ? */
|
||||
if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
|
||||
for (i = 0; i < IEEE80211_WEP_NKID; i++)
|
||||
|
|
|
@ -499,7 +499,6 @@ static void ath_tx_complete_buf(struct ath_softc *sc,
|
|||
{
|
||||
struct sk_buff *skb = bf->bf_mpdu;
|
||||
struct ath_xmit_status tx_status;
|
||||
dma_addr_t *pa;
|
||||
|
||||
/*
|
||||
* Set retry information.
|
||||
|
@ -519,9 +518,8 @@ static void ath_tx_complete_buf(struct ath_softc *sc,
|
|||
tx_status.flags |= ATH_TX_XRETRY;
|
||||
}
|
||||
/* Unmap this frame */
|
||||
pa = get_dma_mem_context(bf, bf_dmacontext);
|
||||
pci_unmap_single(sc->pdev,
|
||||
*pa,
|
||||
bf->bf_dmacontext,
|
||||
skb->len,
|
||||
PCI_DMA_TODEVICE);
|
||||
/* complete this frame */
|
||||
|
@ -1172,11 +1170,8 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
|
|||
tbf->bf_lastfrm->bf_desc);
|
||||
|
||||
/* copy the DMA context */
|
||||
copy_dma_mem_context(
|
||||
get_dma_mem_context(tbf,
|
||||
bf_dmacontext),
|
||||
get_dma_mem_context(bf_last,
|
||||
bf_dmacontext));
|
||||
tbf->bf_dmacontext =
|
||||
bf_last->bf_dmacontext;
|
||||
}
|
||||
list_add_tail(&tbf->list, &bf_head);
|
||||
} else {
|
||||
|
@ -1185,7 +1180,7 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
|
|||
* software retry
|
||||
*/
|
||||
ath9k_hw_cleartxdesc(sc->sc_ah,
|
||||
bf->bf_lastfrm->bf_desc);
|
||||
bf->bf_lastfrm->bf_desc);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -2045,8 +2040,7 @@ static int ath_tx_start_dma(struct ath_softc *sc,
|
|||
/*
|
||||
* Save the DMA context in the first ath_buf
|
||||
*/
|
||||
copy_dma_mem_context(get_dma_mem_context(bf, bf_dmacontext),
|
||||
get_dma_mem_context(txctl, dmacontext));
|
||||
bf->bf_dmacontext = txctl->dmacontext;
|
||||
|
||||
/*
|
||||
* Formulate first tx descriptor with tx controls.
|
||||
|
@ -2127,25 +2121,26 @@ static int ath_tx_start_dma(struct ath_softc *sc,
|
|||
|
||||
static void xmit_map_sg(struct ath_softc *sc,
|
||||
struct sk_buff *skb,
|
||||
dma_addr_t *pa,
|
||||
struct ath_tx_control *txctl)
|
||||
{
|
||||
struct ath_xmit_status tx_status;
|
||||
struct ath_atx_tid *tid;
|
||||
struct scatterlist sg;
|
||||
|
||||
*pa = pci_map_single(sc->pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
|
||||
txctl->dmacontext = pci_map_single(sc->pdev, skb->data,
|
||||
skb->len, PCI_DMA_TODEVICE);
|
||||
|
||||
/* setup S/G list */
|
||||
memset(&sg, 0, sizeof(struct scatterlist));
|
||||
sg_dma_address(&sg) = *pa;
|
||||
sg_dma_address(&sg) = txctl->dmacontext;
|
||||
sg_dma_len(&sg) = skb->len;
|
||||
|
||||
if (ath_tx_start_dma(sc, skb, &sg, 1, txctl) != 0) {
|
||||
/*
|
||||
* We have to do drop frame here.
|
||||
*/
|
||||
pci_unmap_single(sc->pdev, *pa, skb->len, PCI_DMA_TODEVICE);
|
||||
pci_unmap_single(sc->pdev, txctl->dmacontext,
|
||||
skb->len, PCI_DMA_TODEVICE);
|
||||
|
||||
tx_status.retries = 0;
|
||||
tx_status.flags = ATH_TX_ERROR;
|
||||
|
@ -2419,9 +2414,7 @@ int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb)
|
|||
* ath_tx_start_dma() will be called either synchronously
|
||||
* or asynchrounsly once DMA is complete.
|
||||
*/
|
||||
xmit_map_sg(sc, skb,
|
||||
get_dma_mem_context(&txctl, dmacontext),
|
||||
&txctl);
|
||||
xmit_map_sg(sc, skb, &txctl);
|
||||
else
|
||||
ath_node_put(sc, txctl.an, ATH9K_BH_STATUS_CHANGE);
|
||||
|
||||
|
|
Loading…
Reference in New Issue